1 /*********************************************************************
2 *
3 * Filename: w83977af_ir.c
4 * Version: 1.0
5 * Description: FIR driver for the Winbond W83977AF Super I/O chip
6 * Status: Experimental.
7 * Author: Paul VanderSpek
8 * Created at: Wed Nov 4 11:46:16 1998
9 * Modified at: Fri Jan 28 12:10:59 2000
10 * Modified by: Dag Brattli <dagb@cs.uit.no>
11 *
12 * Copyright (c) 1998-2000 Dag Brattli <dagb@cs.uit.no>
13 * Copyright (c) 1998-1999 Rebel.com
14 *
15 * This program is free software; you can redistribute it and/or
16 * modify it under the terms of the GNU General Public License as
17 * published by the Free Software Foundation; either version 2 of
18 * the License, or (at your option) any later version.
19 *
20 * Neither Paul VanderSpek nor Rebel.com admit liability nor provide
21 * warranty for any of this software. This material is provided "AS-IS"
22 * and at no charge.
23 *
24 * If you find bugs in this file, its very likely that the same bug
25 * will also be in pc87108.c since the implementations are quite
26 * similar.
27 *
28 * Notice that all functions that needs to access the chip in _any_
29 * way, must save BSR register on entry, and restore it on exit.
30 * It is _very_ important to follow this policy!
31 *
32 * __u8 bank;
33 *
34 * bank = inb( iobase+BSR);
35 *
36 * do_your_stuff_here();
37 *
38 * outb( bank, iobase+BSR);
39 *
40 ********************************************************************/
41
42 #include <linux/module.h>
43 #include <linux/config.h>
44 #include <linux/kernel.h>
45 #include <linux/types.h>
46 #include <linux/skbuff.h>
47 #include <linux/netdevice.h>
48 #include <linux/ioport.h>
49 #include <linux/delay.h>
50 #include <linux/malloc.h>
51 #include <linux/init.h>
52 #include <linux/rtnetlink.h>
53
54 #include <asm/io.h>
55 #include <asm/dma.h>
56 #include <asm/byteorder.h>
57
58 #include <net/irda/irda.h>
59 #include <net/irda/irmod.h>
60 #include <net/irda/wrapper.h>
61 #include <net/irda/irda_device.h>
62 #include <net/irda/w83977af.h>
63 #include <net/irda/w83977af_ir.h>
64
65 #ifdef CONFIG_ARCH_NETWINDER /* Adjust to NetWinder differences */
66 #undef CONFIG_NETWINDER_TX_DMA_PROBLEMS /* Not needed */
67 #define CONFIG_NETWINDER_RX_DMA_PROBLEMS /* Must have this one! */
68 #endif
69 #undef CONFIG_USE_INTERNAL_TIMER /* Just cannot make that timer work */
70 #define CONFIG_USE_W977_PNP /* Currently needed */
71 #define PIO_MAX_SPEED 115200
72
73 static char *driver_name = "w83977af_ir";
74 static int qos_mtt_bits = 0x07; /* 1 ms or more */
75
76 #define CHIP_IO_EXTENT 8
77
78 static unsigned int io[] = { 0x180, ~0, ~0, ~0 };
79 #ifdef CONFIG_ARCH_NETWINDER /* Adjust to NetWinder differences */
80 static unsigned int irq[] = { 6, 0, 0, 0 };
81 #else
82 static unsigned int irq[] = { 11, 0, 0, 0 };
83 #endif
84 static unsigned int dma[] = { 1, 0, 0, 0 };
85 static unsigned int efbase[] = { W977_EFIO_BASE, W977_EFIO2_BASE };
86 static unsigned int efio = W977_EFIO_BASE;
87
88 static struct w83977af_ir *dev_self[] = { NULL, NULL, NULL, NULL};
89
90 /* Some prototypes */
91 static int w83977af_open(int i, unsigned int iobase, unsigned int irq,
92 unsigned int dma);
93 static int w83977af_close(struct w83977af_ir *self);
94 static int w83977af_probe(int iobase, int irq, int dma);
95 static int w83977af_dma_receive(struct w83977af_ir *self);
96 static int w83977af_dma_receive_complete(struct w83977af_ir *self);
97 static int w83977af_hard_xmit(struct sk_buff *skb, struct net_device *dev);
98 static int w83977af_pio_write(int iobase, __u8 *buf, int len, int fifo_size);
99 static void w83977af_dma_write(struct w83977af_ir *self, int iobase);
100 static void w83977af_change_speed(struct w83977af_ir *self, __u32 speed);
101 static void w83977af_interrupt(int irq, void *dev_id, struct pt_regs *regs);
102 static int w83977af_is_receiving(struct w83977af_ir *self);
103
104 static int w83977af_net_init(struct net_device *dev);
105 static int w83977af_net_open(struct net_device *dev);
106 static int w83977af_net_close(struct net_device *dev);
107 static int w83977af_net_ioctl(struct net_device *dev, struct ifreq *rq, int cmd);
108 static struct net_device_stats *w83977af_net_get_stats(struct net_device *dev);
109
110 /*
111 * Function w83977af_init ()
112 *
113 * Initialize chip. Just try to find out how many chips we are dealing with
114 * and where they are
115 */
116 int __init w83977af_init(void)
117 {
118 int i;
119
120 IRDA_DEBUG(0, __FUNCTION__ "()\n");
121
122 for (i=0; (io[i] < 2000) && (i < 4); i++) {
123 int ioaddr = io[i];
124 if (check_region(ioaddr, CHIP_IO_EXTENT) < 0)
125 continue;
126 if (w83977af_open(i, io[i], irq[i], dma[i]) == 0)
127 return 0;
128 }
129 return -ENODEV;
130 }
131
132 /*
133 * Function w83977af_cleanup ()
134 *
135 * Close all configured chips
136 *
137 */
138 #ifdef MODULE
139 void w83977af_cleanup(void)
140 {
141 int i;
142
143 IRDA_DEBUG(4, __FUNCTION__ "()\n");
144
145 for (i=0; i < 4; i++) {
146 if (dev_self[i])
147 w83977af_close(dev_self[i]);
148 }
149 }
150 #endif /* MODULE */
151
152 /*
153 * Function w83977af_open (iobase, irq)
154 *
155 * Open driver instance
156 *
157 */
158 int w83977af_open(int i, unsigned int iobase, unsigned int irq,
159 unsigned int dma)
160 {
161 struct net_device *dev;
162 struct w83977af_ir *self;
163 int ret;
164 int err;
165
166 IRDA_DEBUG(0, __FUNCTION__ "()\n");
167
168 if (w83977af_probe(iobase, irq, dma) == -1)
169 return -1;
170
171 /*
172 * Allocate new instance of the driver
173 */
174 self = kmalloc(sizeof(struct w83977af_ir), GFP_KERNEL);
175 if (self == NULL) {
176 printk( KERN_ERR "IrDA: Can't allocate memory for "
177 "IrDA control block!\n");
178 return -ENOMEM;
179 }
180 memset(self, 0, sizeof(struct w83977af_ir));
181
182 /* Need to store self somewhere */
183 dev_self[i] = self;
184
185 /* Initialize IO */
186 self->io.fir_base = iobase;
187 self->io.irq = irq;
188 self->io.fir_ext = CHIP_IO_EXTENT;
189 self->io.dma = dma;
190 self->io.fifo_size = 32;
191
192 /* Lock the port that we need */
193 ret = check_region(self->io.fir_base, self->io.fir_ext);
194 if (ret < 0) {
195 IRDA_DEBUG(0, __FUNCTION__ "(), can't get iobase of 0x%03x\n",
196 self->io.fir_base);
197 /* w83977af_cleanup( self); */
198 return -ENODEV;
199 }
200 request_region(self->io.fir_base, self->io.fir_ext, driver_name);
201
202 /* Initialize QoS for this device */
203 irda_init_max_qos_capabilies(&self->qos);
204
205 /* The only value we must override it the baudrate */
206
207 /* FIXME: The HP HDLS-1100 does not support 1152000! */
208 self->qos.baud_rate.bits = IR_9600|IR_19200|IR_38400|IR_57600|
209 IR_115200|IR_576000|IR_1152000|(IR_4000000 << 8);
210
211 /* The HP HDLS-1100 needs 1 ms according to the specs */
212 self->qos.min_turn_time.bits = qos_mtt_bits;
213 irda_qos_bits_to_value(&self->qos);
214
215 self->flags = IFF_FIR|IFF_MIR|IFF_SIR|IFF_DMA|IFF_PIO;
216
217 /* Max DMA buffer size needed = (data_size + 6) * (window_size) + 6; */
218 self->rx_buff.truesize = 14384;
219 self->tx_buff.truesize = 4000;
220
221 /* Allocate memory if needed */
222 self->rx_buff.head = (__u8 *) kmalloc(self->rx_buff.truesize,
223 GFP_KERNEL|GFP_DMA);
224 if (self->rx_buff.head == NULL)
225 return -ENOMEM;
226
227 memset(self->rx_buff.head, 0, self->rx_buff.truesize);
228
229 self->tx_buff.head = (__u8 *) kmalloc(self->tx_buff.truesize,
230 GFP_KERNEL|GFP_DMA);
231 if (self->tx_buff.head == NULL) {
232 kfree(self->rx_buff.head);
233 return -ENOMEM;
234 }
235 memset(self->tx_buff.head, 0, self->tx_buff.truesize);
236
237 self->rx_buff.in_frame = FALSE;
238 self->rx_buff.state = OUTSIDE_FRAME;
239 self->tx_buff.data = self->tx_buff.head;
240 self->rx_buff.data = self->rx_buff.head;
241
242 if (!(dev = dev_alloc("irda%d", &err))) {
243 ERROR(__FUNCTION__ "(), dev_alloc() failed!\n");
244 return -ENOMEM;
245 }
246 dev->priv = (void *) self;
247 self->netdev = dev;
248
249 /* Override the network functions we need to use */
250 dev->init = w83977af_net_init;
251 dev->hard_start_xmit = w83977af_hard_xmit;
252 dev->open = w83977af_net_open;
253 dev->stop = w83977af_net_close;
254 dev->do_ioctl = w83977af_net_ioctl;
255 dev->get_stats = w83977af_net_get_stats;
256
257 rtnl_lock();
258 err = register_netdevice(dev);
259 rtnl_unlock();
260 if (err) {
261 ERROR(__FUNCTION__ "(), register_netdevice() failed!\n");
262 return -1;
263 }
264 MESSAGE("IrDA: Registered device %s\n", dev->name);
265
266 return 0;
267 }
268
269 /*
270 * Function w83977af_close (self)
271 *
272 * Close driver instance
273 *
274 */
275 static int w83977af_close(struct w83977af_ir *self)
276 {
277 int iobase;
278
279 IRDA_DEBUG(0, __FUNCTION__ "()\n");
280
281 iobase = self->io.fir_base;
282
283 #ifdef CONFIG_USE_W977_PNP
284 /* enter PnP configuration mode */
285 w977_efm_enter(efio);
286
287 w977_select_device(W977_DEVICE_IR, efio);
288
289 /* Deactivate device */
290 w977_write_reg(0x30, 0x00, efio);
291
292 w977_efm_exit(efio);
293 #endif /* CONFIG_USE_W977_PNP */
294
295 /* Remove netdevice */
296 if (self->netdev) {
297 rtnl_lock();
298 unregister_netdevice(self->netdev);
299 rtnl_unlock();
300 }
301
302 /* Release the PORT that this driver is using */
303 IRDA_DEBUG(0 , __FUNCTION__ "(), Releasing Region %03x\n",
304 self->io.fir_base);
305 release_region(self->io.fir_base, self->io.fir_ext);
306
307 if (self->tx_buff.head)
308 kfree(self->tx_buff.head);
309
310 if (self->rx_buff.head)
311 kfree(self->rx_buff.head);
312
313 kfree(self);
314
315 return 0;
316 }
317
318 int w83977af_probe( int iobase, int irq, int dma)
319 {
320 int version;
321 int i;
322
323 for (i=0; i < 2; i++) {
324 IRDA_DEBUG( 0, __FUNCTION__ "()\n");
325 #ifdef CONFIG_USE_W977_PNP
326 /* Enter PnP configuration mode */
327 w977_efm_enter(efbase[i]);
328
329 w977_select_device(W977_DEVICE_IR, efbase[i]);
330
331 /* Configure PnP port, IRQ, and DMA channel */
332 w977_write_reg(0x60, (iobase >> 8) & 0xff, efbase[i]);
333 w977_write_reg(0x61, (iobase) & 0xff, efbase[i]);
334
335 w977_write_reg(0x70, irq, efbase[i]);
336 #ifdef CONFIG_ARCH_NETWINDER
337 /* Netwinder uses 1 higher than Linux */
338 w977_write_reg(0x74, dma+1, efbase[i]);
339 #else
340 w977_write_reg(0x74, dma, efbase[i]);
341 #endif /*CONFIG_ARCH_NETWINDER */
342 w977_write_reg(0x75, 0x04, efbase[i]); /* Disable Tx DMA */
343
344 /* Set append hardware CRC, enable IR bank selection */
345 w977_write_reg(0xf0, APEDCRC|ENBNKSEL, efbase[i]);
346
347 /* Activate device */
348 w977_write_reg(0x30, 0x01, efbase[i]);
349
350 w977_efm_exit(efbase[i]);
351 #endif /* CONFIG_USE_W977_PNP */
352 /* Disable Advanced mode */
353 switch_bank(iobase, SET2);
354 outb(iobase+2, 0x00);
355
356 /* Turn on UART (global) interrupts */
357 switch_bank(iobase, SET0);
358 outb(HCR_EN_IRQ, iobase+HCR);
359
360 /* Switch to advanced mode */
361 switch_bank(iobase, SET2);
362 outb(inb(iobase+ADCR1) | ADCR1_ADV_SL, iobase+ADCR1);
363
364 /* Set default IR-mode */
365 switch_bank(iobase, SET0);
366 outb(HCR_SIR, iobase+HCR);
367
368 /* Read the Advanced IR ID */
369 switch_bank(iobase, SET3);
370 version = inb(iobase+AUID);
371
372 /* Should be 0x1? */
373 if (0x10 == (version & 0xf0)) {
374 efio = efbase[i];
375
376 /* Set FIFO size to 32 */
377 switch_bank(iobase, SET2);
378 outb(ADCR2_RXFS32|ADCR2_TXFS32, iobase+ADCR2);
379
380 /* Set FIFO threshold to TX17, RX16 */
381 switch_bank(iobase, SET0);
382 outb(UFR_RXTL|UFR_TXTL|UFR_TXF_RST|UFR_RXF_RST|
383 UFR_EN_FIFO,iobase+UFR);
384
385 /* Receiver frame length */
386 switch_bank(iobase, SET4);
387 outb(2048 & 0xff, iobase+6);
388 outb((2048 >> 8) & 0x1f, iobase+7);
389
390 /*
391 * Init HP HSDL-1100 transceiver.
392 *
393 * Set IRX_MSL since we have 2 * receive paths IRRX,
394 * and IRRXH. Clear IRSL0D since we want IRSL0 * to
395 * be a input pin used for IRRXH
396 *
397 * IRRX pin 37 connected to receiver
398 * IRTX pin 38 connected to transmitter
399 * FIRRX pin 39 connected to receiver (IRSL0)
400 * CIRRX pin 40 connected to pin 37
401 */
402 switch_bank(iobase, SET7);
403 outb(0x40, iobase+7);
404
405 MESSAGE("W83977AF (IR) driver loaded. "
406 "Version: 0x%02x\n", version);
407
408 return 0;
409 } else {
410 /* Try next extented function register address */
411 IRDA_DEBUG( 0, __FUNCTION__ "(), Wrong chip version");
412 }
413 }
414 return -1;
415 }
416
417 void w83977af_change_speed(struct w83977af_ir *self, __u32 speed)
418 {
419 int ir_mode = HCR_SIR;
420 int iobase;
421 __u8 set;
422
423 iobase = self->io.fir_base;
424
425 /* Update accounting for new speed */
426 self->io.speed = speed;
427
428 /* Save current bank */
429 set = inb(iobase+SSR);
430
431 /* Disable interrupts */
432 switch_bank(iobase, SET0);
433 outb(0, iobase+ICR);
434
435 /* Select Set 2 */
436 switch_bank(iobase, SET2);
437 outb(0x00, iobase+ABHL);
438
439 switch (speed) {
440 case 9600: outb(0x0c, iobase+ABLL); break;
441 case 19200: outb(0x06, iobase+ABLL); break;
442 case 38400: outb(0x03, iobase+ABLL); break;
443 case 57600: outb(0x02, iobase+ABLL); break;
444 case 115200: outb(0x01, iobase+ABLL); break;
445 case 576000:
446 ir_mode = HCR_MIR_576;
447 IRDA_DEBUG(0, __FUNCTION__ "(), handling baud of 576000\n");
448 break;
449 case 1152000:
450 ir_mode = HCR_MIR_1152;
451 IRDA_DEBUG(0, __FUNCTION__ "(), handling baud of 1152000\n");
452 break;
453 case 4000000:
454 ir_mode = HCR_FIR;
455 IRDA_DEBUG(0, __FUNCTION__ "(), handling baud of 4000000\n");
456 break;
457 default:
458 ir_mode = HCR_FIR;
459 IRDA_DEBUG(0, __FUNCTION__ "(), unknown baud rate of %d\n", speed);
460 break;
461 }
462
463 /* Set speed mode */
464 switch_bank(iobase, SET0);
465 outb(ir_mode, iobase+HCR);
466
467 /* set FIFO size to 32 */
468 switch_bank(iobase, SET2);
469 outb(ADCR2_RXFS32|ADCR2_TXFS32, iobase+ADCR2);
470
471 /* set FIFO threshold to TX17, RX16 */
472 switch_bank(iobase, SET0);
473 outb(0x00, iobase+UFR); /* Reset */
474 outb(UFR_EN_FIFO, iobase+UFR); /* First we must enable FIFO */
475 outb(0xa7, iobase+UFR);
476
477 netif_wake_queue(self->netdev);
478
479 /* Enable some interrupts so we can receive frames */
480 switch_bank(iobase, SET0);
481 if (speed > PIO_MAX_SPEED) {
482 outb(ICR_EFSFI, iobase+ICR);
483 w83977af_dma_receive(self);
484 } else
485 outb(ICR_ERBRI, iobase+ICR);
486
487 /* Restore SSR */
488 outb(set, iobase+SSR);
489 }
490
491 /*
492 * Function w83977af_hard_xmit (skb, dev)
493 *
494 * Sets up a DMA transfer to send the current frame.
495 *
496 */
497 int w83977af_hard_xmit(struct sk_buff *skb, struct net_device *dev)
498 {
499 struct w83977af_ir *self;
500 __u32 speed;
501 int iobase;
502 __u8 set;
503 int mtt;
504
505 self = (struct w83977af_ir *) dev->priv;
506
507 iobase = self->io.fir_base;
508
509 IRDA_DEBUG(4, __FUNCTION__ "(%ld), skb->len=%d\n", jiffies,
510 (int) skb->len);
511
512 /* Lock transmit buffer */
513 netif_stop_queue(dev);
514
515 /* Check if we need to change the speed */
516 if ((speed = irda_get_speed(skb)) != self->io.speed) {
517 /* Check for empty frame */
518 if (!skb->len) {
519 w83977af_change_speed(self, speed);
520 return 0;
521 } else
522 self->new_speed = speed;
523 }
524
525 /* Save current set */
526 set = inb(iobase+SSR);
527
528 /* Decide if we should use PIO or DMA transfer */
529 if (self->io.speed > PIO_MAX_SPEED) {
530 self->tx_buff.data = self->tx_buff.head;
531 memcpy(self->tx_buff.data, skb->data, skb->len);
532 self->tx_buff.len = skb->len;
533
534 mtt = irda_get_mtt(skb);
535 #ifdef CONFIG_USE_INTERNAL_TIMER
536 if (mtt > 50) {
537 /* Adjust for timer resolution */
538 mtt /= 1000+1;
539
540 /* Setup timer */
541 switch_bank(iobase, SET4);
542 outb(mtt & 0xff, iobase+TMRL);
543 outb((mtt >> 8) & 0x0f, iobase+TMRH);
544
545 /* Start timer */
546 outb(IR_MSL_EN_TMR, iobase+IR_MSL);
547 self->io.direction = IO_XMIT;
548
549 /* Enable timer interrupt */
550 switch_bank(iobase, SET0);
551 outb(ICR_ETMRI, iobase+ICR);
552 } else {
553 #endif
554 IRDA_DEBUG(4,__FUNCTION__ "(%ld), mtt=%d\n", jiffies, mtt);
555 if (mtt)
556 udelay(mtt);
557
558 /* Enable DMA interrupt */
559 switch_bank(iobase, SET0);
560 outb(ICR_EDMAI, iobase+ICR);
561 w83977af_dma_write(self, iobase);
562 #ifdef CONFIG_USE_INTERNAL_TIMER
563 }
564 #endif
565 } else {
566 self->tx_buff.data = self->tx_buff.head;
567 self->tx_buff.len = async_wrap_skb(skb, self->tx_buff.data,
568 self->tx_buff.truesize);
569
570 /* Add interrupt on tx low level (will fire immediately) */
571 switch_bank(iobase, SET0);
572 outb(ICR_ETXTHI, iobase+ICR);
573 }
574 dev_kfree_skb(skb);
575
576 /* Restore set register */
577 outb(set, iobase+SSR);
578
579 return 0;
580 }
581
582 /*
583 * Function w83977af_dma_write (self, iobase)
584 *
585 * Send frame using DMA
586 *
587 */
588 static void w83977af_dma_write(struct w83977af_ir *self, int iobase)
589 {
590 __u8 set;
591 #ifdef CONFIG_NETWINDER_TX_DMA_PROBLEMS
592 unsigned long flags;
593 __u8 hcr;
594 #endif
595 IRDA_DEBUG(4, __FUNCTION__ "(), len=%d\n", self->tx_buff.len);
596
597 /* Save current set */
598 set = inb(iobase+SSR);
599
600 /* Disable DMA */
601 switch_bank(iobase, SET0);
602 outb(inb(iobase+HCR) & ~HCR_EN_DMA, iobase+HCR);
603
604 /* Choose transmit DMA channel */
605 switch_bank(iobase, SET2);
606 outb(ADCR1_D_CHSW|/*ADCR1_DMA_F|*/ADCR1_ADV_SL, iobase+ADCR1);
607 #ifdef CONFIG_NETWINDER_TX_DMA_PROBLEMS
608 save_flags(flags);
609 cli();
610
611 disable_dma(self->io.dma);
612 clear_dma_ff(self->io.dma);
613 set_dma_mode(self->io.dma, DMA_MODE_READ);
614 set_dma_addr(self->io.dma, virt_to_bus(self->tx_buff.data));
615 set_dma_count(self->io.dma, self->tx_buff.len);
616 #else
617 setup_dma(self->io.dma, self->tx_buff.data, self->tx_buff.len,
618 DMA_MODE_WRITE);
619 #endif
620 self->io.direction = IO_XMIT;
621
622 /* Enable DMA */
623 switch_bank(iobase, SET0);
624 #ifdef CONFIG_NETWINDER_TX_DMA_PROBLEMS
625 hcr = inb(iobase+HCR);
626 outb(hcr | HCR_EN_DMA, iobase+HCR);
627 enable_dma(self->io.dma);
628 restore_flags(flags);
629 #else
630 outb(inb(iobase+HCR) | HCR_EN_DMA | HCR_TX_WT, iobase+HCR);
631 #endif
632
633 /* Restore set register */
634 outb(set, iobase+SSR);
635 }
636
637 /*
638 * Function w83977af_pio_write (iobase, buf, len, fifo_size)
639 *
640 *
641 *
642 */
643 static int w83977af_pio_write(int iobase, __u8 *buf, int len, int fifo_size)
644 {
645 int actual = 0;
646 __u8 set;
647
648 IRDA_DEBUG(4, __FUNCTION__ "()\n");
649
650 /* Save current bank */
651 set = inb(iobase+SSR);
652
653 switch_bank(iobase, SET0);
654 if (!(inb_p(iobase+USR) & USR_TSRE)) {
655 IRDA_DEBUG(4, __FUNCTION__
656 "(), warning, FIFO not empty yet!\n");
657
658 fifo_size -= 17;
659 IRDA_DEBUG(4, __FUNCTION__ "%d bytes left in tx fifo\n",
660 fifo_size);
661 }
662
663 /* Fill FIFO with current frame */
664 while ((fifo_size-- > 0) && (actual < len)) {
665 /* Transmit next byte */
666 outb(buf[actual++], iobase+TBR);
667 }
668
669 IRDA_DEBUG(4, __FUNCTION__ "(), fifo_size %d ; %d sent of %d\n",
670 fifo_size, actual, len);
671
672 /* Restore bank */
673 outb(set, iobase+SSR);
674
675 return actual;
676 }
677
678 /*
679 * Function w83977af_dma_xmit_complete (self)
680 *
681 * The transfer of a frame in finished. So do the necessary things
682 *
683 *
684 */
685 void w83977af_dma_xmit_complete(struct w83977af_ir *self)
686 {
687 int iobase;
688 __u8 set;
689
690 IRDA_DEBUG(4, __FUNCTION__ "(%ld)\n", jiffies);
691
692 ASSERT(self != NULL, return;);
693
694 iobase = self->io.fir_base;
695
696 /* Save current set */
697 set = inb(iobase+SSR);
698
699 /* Disable DMA */
700 switch_bank(iobase, SET0);
701 outb(inb(iobase+HCR) & ~HCR_EN_DMA, iobase+HCR);
702
703 /* Check for underrrun! */
704 if (inb(iobase+AUDR) & AUDR_UNDR) {
705 IRDA_DEBUG(0, __FUNCTION__ "(), Transmit underrun!\n");
706
707 self->stats.tx_errors++;
708 self->stats.tx_fifo_errors++;
709
710 /* Clear bit, by writing 1 to it */
711 outb(AUDR_UNDR, iobase+AUDR);
712 } else
713 self->stats.tx_packets++;
714
715
716 if (self->new_speed) {
717 w83977af_change_speed(self, self->new_speed);
718 self->new_speed = 0;
719 }
720
721 /* Unlock tx_buff and request another frame */
722 /* Tell the network layer, that we want more frames */
723 netif_wake_queue(self->netdev);
724
725 /* Restore set */
726 outb(set, iobase+SSR);
727 }
728
729 /*
730 * Function w83977af_dma_receive (self)
731 *
732 * Get ready for receiving a frame. The device will initiate a DMA
733 * if it starts to receive a frame.
734 *
735 */
736 int w83977af_dma_receive(struct w83977af_ir *self)
737 {
738 int iobase;
739 __u8 set;
740 #ifdef CONFIG_NETWINDER_RX_DMA_PROBLEMS
741 unsigned long flags;
742 __u8 hcr;
743 #endif
744 ASSERT(self != NULL, return -1;);
745
746 IRDA_DEBUG(4, __FUNCTION__ "\n");
747
748 iobase= self->io.fir_base;
749
750 /* Save current set */
751 set = inb(iobase+SSR);
752
753 /* Disable DMA */
754 switch_bank(iobase, SET0);
755 outb(inb(iobase+HCR) & ~HCR_EN_DMA, iobase+HCR);
756
757 /* Choose DMA Rx, DMA Fairness, and Advanced mode */
758 switch_bank(iobase, SET2);
759 outb((inb(iobase+ADCR1) & ~ADCR1_D_CHSW)/*|ADCR1_DMA_F*/|ADCR1_ADV_SL,
760 iobase+ADCR1);
761
762 self->io.direction = IO_RECV;
763 self->rx_buff.data = self->rx_buff.head;
764
765 #ifdef CONFIG_NETWINDER_RX_DMA_PROBLEMS
766 save_flags(flags);
767 cli();
768
769 disable_dma(self->io.dma);
770 clear_dma_ff(self->io.dma);
771 set_dma_mode(self->io.dma, DMA_MODE_READ);
772 set_dma_addr(self->io.dma, virt_to_bus(self->rx_buff.data));
773 set_dma_count(self->io.dma, self->rx_buff.truesize);
774 #else
775 setup_dma(self->io.dma, self->rx_buff.data, self->rx_buff.truesize,
776 DMA_MODE_READ);
777 #endif
778 /*
779 * Reset Rx FIFO. This will also flush the ST_FIFO, it's very
780 * important that we don't reset the Tx FIFO since it might not
781 * be finished transmitting yet
782 */
783 switch_bank(iobase, SET0);
784 outb(UFR_RXTL|UFR_TXTL|UFR_RXF_RST|UFR_EN_FIFO, iobase+UFR);
785 self->st_fifo.len = self->st_fifo.tail = self->st_fifo.head = 0;
786
787 /* Enable DMA */
788 switch_bank(iobase, SET0);
789 #ifdef CONFIG_NETWINDER_RX_DMA_PROBLEMS
790 hcr = inb(iobase+HCR);
791 outb(hcr | HCR_EN_DMA, iobase+HCR);
792 enable_dma(self->io.dma);
793 restore_flags(flags);
794 #else
795 outb(inb(iobase+HCR) | HCR_EN_DMA, iobase+HCR);
796 #endif
797 /* Restore set */
798 outb(set, iobase+SSR);
799
800 return 0;
801 }
802
803 /*
804 * Function w83977af_receive_complete (self)
805 *
806 * Finished with receiving a frame
807 *
808 */
809 int w83977af_dma_receive_complete(struct w83977af_ir *self)
810 {
811 struct sk_buff *skb;
812 struct st_fifo *st_fifo;
813 int len;
814 int iobase;
815 __u8 set;
816 __u8 status;
817
818 IRDA_DEBUG(4, __FUNCTION__ "\n");
819
820 st_fifo = &self->st_fifo;
821
822 iobase = self->io.fir_base;
823
824 /* Save current set */
825 set = inb(iobase+SSR);
826
827 iobase = self->io.fir_base;
828
829 /* Read status FIFO */
830 switch_bank(iobase, SET5);
831 while ((status = inb(iobase+FS_FO)) & FS_FO_FSFDR) {
832 st_fifo->entries[st_fifo->tail].status = status;
833
834 st_fifo->entries[st_fifo->tail].len = inb(iobase+RFLFL);
835 st_fifo->entries[st_fifo->tail].len |= inb(iobase+RFLFH) << 8;
836
837 st_fifo->tail++;
838 st_fifo->len++;
839 }
840
841 while (st_fifo->len) {
842 /* Get first entry */
843 status = st_fifo->entries[st_fifo->head].status;
844 len = st_fifo->entries[st_fifo->head].len;
845 st_fifo->head++;
846 st_fifo->len--;
847
848 /* Check for errors */
849 if (status & FS_FO_ERR_MSK) {
850 if (status & FS_FO_LST_FR) {
851 /* Add number of lost frames to stats */
852 self->stats.rx_errors += len;
853 } else {
854 /* Skip frame */
855 self->stats.rx_errors++;
856
857 self->rx_buff.data += len;
858
859 if (status & FS_FO_MX_LEX)
860 self->stats.rx_length_errors++;
861
862 if (status & FS_FO_PHY_ERR)
863 self->stats.rx_frame_errors++;
864
865 if (status & FS_FO_CRC_ERR)
866 self->stats.rx_crc_errors++;
867 }
868 /* The errors below can be reported in both cases */
869 if (status & FS_FO_RX_OV)
870 self->stats.rx_fifo_errors++;
871
872 if (status & FS_FO_FSF_OV)
873 self->stats.rx_fifo_errors++;
874
875 } else {
876 /* Check if we have transfered all data to memory */
877 switch_bank(iobase, SET0);
878 if (inb(iobase+USR) & USR_RDR) {
879 #ifdef CONFIG_USE_INTERNAL_TIMER
880 /* Put this entry back in fifo */
881 st_fifo->head--;
882 st_fifo->len++;
883 st_fifo->entries[st_fifo->head].status = status;
884 st_fifo->entries[st_fifo->head].len = len;
885
886 /* Restore set register */
887 outb(set, iobase+SSR);
888
889 return FALSE; /* I'll be back! */
890 #else
891 udelay(80); /* Should be enough!? */
892 #endif
893 }
894
895 skb = dev_alloc_skb(len+1);
896 if (skb == NULL) {
897 printk(KERN_INFO __FUNCTION__
898 "(), memory squeeze, dropping frame.\n");
899 /* Restore set register */
900 outb(set, iobase+SSR);
901
902 return FALSE;
903 }
904
905 /* Align to 20 bytes */
906 skb_reserve(skb, 1);
907
908 /* Copy frame without CRC */
909 if (self->io.speed < 4000000) {
910 skb_put(skb, len-2);
911 memcpy(skb->data, self->rx_buff.data, len-2);
912 } else {
913 skb_put(skb, len-4);
914 memcpy(skb->data, self->rx_buff.data, len-4);
915 }
916
917 /* Move to next frame */
918 self->rx_buff.data += len;
919 self->stats.rx_packets++;
920
921 skb->dev = self->netdev;
922 skb->mac.raw = skb->data;
923 skb->protocol = htons(ETH_P_IRDA);
924 netif_rx(skb);
925 }
926 }
927 /* Restore set register */
928 outb(set, iobase+SSR);
929
930 return TRUE;
931 }
932
933 /*
934 * Function pc87108_pio_receive (self)
935 *
936 * Receive all data in receiver FIFO
937 *
938 */
939 static void w83977af_pio_receive(struct w83977af_ir *self)
940 {
941 __u8 byte = 0x00;
942 int iobase;
943
944 IRDA_DEBUG(4, __FUNCTION__ "()\n");
945
946 ASSERT(self != NULL, return;);
947
948 iobase = self->io.fir_base;
949
950 /* Receive all characters in Rx FIFO */
951 do {
952 byte = inb(iobase+RBR);
953 async_unwrap_char(self->netdev, &self->stats, &self->rx_buff,
954 byte);
955 } while (inb(iobase+USR) & USR_RDR); /* Data available */
956 }
957
958 /*
959 * Function w83977af_sir_interrupt (self, eir)
960 *
961 * Handle SIR interrupt
962 *
963 */
964 static __u8 w83977af_sir_interrupt(struct w83977af_ir *self, int isr)
965 {
966 int actual;
967 __u8 new_icr = 0;
968 __u8 set;
969 int iobase;
970
971 IRDA_DEBUG(4, __FUNCTION__ "(), isr=%#x\n", isr);
972
973 iobase = self->io.fir_base;
974 /* Transmit FIFO low on data */
975 if (isr & ISR_TXTH_I) {
976 /* Write data left in transmit buffer */
977 actual = w83977af_pio_write(self->io.fir_base,
978 self->tx_buff.data,
979 self->tx_buff.len,
980 self->io.fifo_size);
981
982 self->tx_buff.data += actual;
983 self->tx_buff.len -= actual;
984
985 self->io.direction = IO_XMIT;
986
987 /* Check if finished */
988 if (self->tx_buff.len > 0) {
989 new_icr |= ICR_ETXTHI;
990 } else {
991 set = inb(iobase+SSR);
992 switch_bank(iobase, SET0);
993 outb(AUDR_SFEND, iobase+AUDR);
994 outb(set, iobase+SSR);
995
996 self->stats.tx_packets++;
997
998 /* Feed me more packets */
999 netif_wake_queue(self->netdev);
1000 new_icr |= ICR_ETBREI;
1001 }
1002 }
1003 /* Check if transmission has completed */
1004 if (isr & ISR_TXEMP_I) {
1005 /* Check if we need to change the speed? */
1006 if (self->new_speed) {
1007 IRDA_DEBUG(2, __FUNCTION__
1008 "(), Changing speed!\n");
1009 w83977af_change_speed(self, self->new_speed);
1010 self->new_speed = 0;
1011 }
1012
1013 /* Turn around and get ready to receive some data */
1014 self->io.direction = IO_RECV;
1015 new_icr |= ICR_ERBRI;
1016 }
1017
1018 /* Rx FIFO threshold or timeout */
1019 if (isr & ISR_RXTH_I) {
1020 w83977af_pio_receive(self);
1021
1022 /* Keep receiving */
1023 new_icr |= ICR_ERBRI;
1024 }
1025 return new_icr;
1026 }
1027
1028 /*
1029 * Function pc87108_fir_interrupt (self, eir)
1030 *
1031 * Handle MIR/FIR interrupt
1032 *
1033 */
1034 static __u8 w83977af_fir_interrupt(struct w83977af_ir *self, int isr)
1035 {
1036 __u8 new_icr = 0;
1037 __u8 set;
1038 int iobase;
1039
1040 iobase = self->io.fir_base;
1041 set = inb(iobase+SSR);
1042
1043 /* End of frame detected in FIFO */
1044 if (isr & (ISR_FEND_I|ISR_FSF_I)) {
1045 if (w83977af_dma_receive_complete(self)) {
1046
1047 /* Wait for next status FIFO interrupt */
1048 new_icr |= ICR_EFSFI;
1049 } else {
1050 /* DMA not finished yet */
1051
1052 /* Set timer value, resolution 1 ms */
1053 switch_bank(iobase, SET4);
1054 outb(0x01, iobase+TMRL); /* 1 ms */
1055 outb(0x00, iobase+TMRH);
1056
1057 /* Start timer */
1058 outb(IR_MSL_EN_TMR, iobase+IR_MSL);
1059
1060 new_icr |= ICR_ETMRI;
1061 }
1062 }
1063 /* Timer finished */
1064 if (isr & ISR_TMR_I) {
1065 /* Disable timer */
1066 switch_bank(iobase, SET4);
1067 outb(0, iobase+IR_MSL);
1068
1069 /* Clear timer event */
1070 /* switch_bank(iobase, SET0); */
1071 /* outb(ASCR_CTE, iobase+ASCR); */
1072
1073 /* Check if this is a TX timer interrupt */
1074 if (self->io.direction == IO_XMIT) {
1075 w83977af_dma_write(self, iobase);
1076
1077 new_icr |= ICR_EDMAI;
1078 } else {
1079 /* Check if DMA has now finished */
1080 w83977af_dma_receive_complete(self);
1081
1082 new_icr |= ICR_EFSFI;
1083 }
1084 }
1085 /* Finished with DMA */
1086 if (isr & ISR_DMA_I) {
1087 w83977af_dma_xmit_complete(self);
1088
1089 /* Check if there are more frames to be transmitted */
1090 /* if (irda_device_txqueue_empty(self)) { */
1091
1092 /* Prepare for receive
1093 *
1094 * ** Netwinder Tx DMA likes that we do this anyway **
1095 */
1096 w83977af_dma_receive(self);
1097 new_icr = ICR_EFSFI;
1098 /* } */
1099 }
1100
1101 /* Restore set */
1102 outb(set, iobase+SSR);
1103
1104 return new_icr;
1105 }
1106
1107 /*
1108 * Function w83977af_interrupt (irq, dev_id, regs)
1109 *
1110 * An interrupt from the chip has arrived. Time to do some work
1111 *
1112 */
1113 static void w83977af_interrupt(int irq, void *dev_id, struct pt_regs *regs)
1114 {
1115 struct net_device *dev = (struct net_device *) dev_id;
1116 struct w83977af_ir *self;
1117 __u8 set, icr, isr;
1118 int iobase;
1119
1120 if (!dev) {
1121 printk(KERN_WARNING "%s: irq %d for unknown device.\n",
1122 driver_name, irq);
1123 return;
1124 }
1125 self = (struct w83977af_ir *) dev->priv;
1126
1127 iobase = self->io.fir_base;
1128
1129 /* Save current bank */
1130 set = inb(iobase+SSR);
1131 switch_bank(iobase, SET0);
1132
1133 icr = inb(iobase+ICR);
1134 isr = inb(iobase+ISR) & icr; /* Mask out the interesting ones */
1135
1136 outb(0, iobase+ICR); /* Disable interrupts */
1137
1138 if (isr) {
1139 /* Dispatch interrupt handler for the current speed */
1140 if (self->io.speed > PIO_MAX_SPEED )
1141 icr = w83977af_fir_interrupt(self, isr);
1142 else
1143 icr = w83977af_sir_interrupt(self, isr);
1144 }
1145
1146 outb(icr, iobase+ICR); /* Restore (new) interrupts */
1147 outb(set, iobase+SSR); /* Restore bank register */
1148
1149 }
1150
1151 /*
1152 * Function w83977af_is_receiving (self)
1153 *
1154 * Return TRUE is we are currently receiving a frame
1155 *
1156 */
1157 static int w83977af_is_receiving(struct w83977af_ir *self)
1158 {
1159 int status = FALSE;
1160 int iobase;
1161 __u8 set;
1162
1163 ASSERT(self != NULL, return FALSE;);
1164
1165 if (self->io.speed > 115200) {
1166 iobase = self->io.fir_base;
1167
1168 /* Check if rx FIFO is not empty */
1169 set = inb(iobase+SSR);
1170 switch_bank(iobase, SET2);
1171 if ((inb(iobase+RXFDTH) & 0x3f) != 0) {
1172 /* We are receiving something */
1173 status = TRUE;
1174 }
1175 outb(set, iobase+SSR);
1176 } else
1177 status = (self->rx_buff.state != OUTSIDE_FRAME);
1178
1179 return status;
1180 }
1181
1182 /*
1183 * Function w83977af_net_init (dev)
1184 *
1185 *
1186 *
1187 */
1188 static int w83977af_net_init(struct net_device *dev)
1189 {
1190 IRDA_DEBUG(0, __FUNCTION__ "()\n");
1191
1192 /* Set up to be a normal IrDA network device driver */
1193 irda_device_setup(dev);
1194
1195 /* Insert overrides below this line! */
1196
1197 return 0;
1198 }
1199
1200
1201 /*
1202 * Function w83977af_net_open (dev)
1203 *
1204 * Start the device
1205 *
1206 */
1207 static int w83977af_net_open(struct net_device *dev)
1208 {
1209 struct w83977af_ir *self;
1210 int iobase;
1211 __u8 set;
1212
1213 IRDA_DEBUG(0, __FUNCTION__ "()\n");
1214
1215 ASSERT(dev != NULL, return -1;);
1216 self = (struct w83977af_ir *) dev->priv;
1217
1218 ASSERT(self != NULL, return 0;);
1219
1220 iobase = self->io.fir_base;
1221
1222 if (request_irq(self->io.irq, w83977af_interrupt, 0, dev->name,
1223 (void *) dev)) {
1224 return -EAGAIN;
1225 }
1226 /*
1227 * Always allocate the DMA channel after the IRQ,
1228 * and clean up on failure.
1229 */
1230 if (request_dma(self->io.dma, dev->name)) {
1231 free_irq(self->io.irq, self);
1232 return -EAGAIN;
1233 }
1234
1235 /* Save current set */
1236 set = inb(iobase+SSR);
1237
1238 /* Enable some interrupts so we can receive frames again */
1239 switch_bank(iobase, SET0);
1240 if (self->io.speed > 115200) {
1241 outb(ICR_EFSFI, iobase+ICR);
1242 w83977af_dma_receive(self);
1243 } else
1244 outb(ICR_ERBRI, iobase+ICR);
1245
1246 /* Restore bank register */
1247 outb(set, iobase+SSR);
1248
1249 /* Ready to play! */
1250 netif_start_queue(dev);
1251
1252 /*
1253 * Open new IrLAP layer instance, now that everything should be
1254 * initialized properly
1255 */
1256 self->irlap = irlap_open(dev, &self->qos);
1257
1258 MOD_INC_USE_COUNT;
1259
1260 return 0;
1261 }
1262
1263 /*
1264 * Function w83977af_net_close (dev)
1265 *
1266 * Stop the device
1267 *
1268 */
1269 static int w83977af_net_close(struct net_device *dev)
1270 {
1271 struct w83977af_ir *self;
1272 int iobase;
1273 __u8 set;
1274
1275 IRDA_DEBUG(0, __FUNCTION__ "()\n");
1276
1277 ASSERT(dev != NULL, return -1;);
1278
1279 self = (struct w83977af_ir *) dev->priv;
1280
1281 ASSERT(self != NULL, return 0;);
1282
1283 iobase = self->io.fir_base;
1284
1285 /* Stop device */
1286 netif_stop_queue(dev);
1287
1288 /* Stop and remove instance of IrLAP */
1289 if (self->irlap)
1290 irlap_close(self->irlap);
1291 self->irlap = NULL;
1292
1293 disable_dma(self->io.dma);
1294
1295 /* Save current set */
1296 set = inb(iobase+SSR);
1297
1298 /* Disable interrupts */
1299 switch_bank(iobase, SET0);
1300 outb(0, iobase+ICR);
1301
1302 free_irq(self->io.irq, dev);
1303 free_dma(self->io.dma);
1304
1305 /* Restore bank register */
1306 outb(set, iobase+SSR);
1307
1308 MOD_DEC_USE_COUNT;
1309
1310 return 0;
1311 }
1312
1313 /*
1314 * Function w83977af_net_ioctl (dev, rq, cmd)
1315 *
1316 * Process IOCTL commands for this device
1317 *
1318 */
1319 static int w83977af_net_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
1320 {
1321 struct if_irda_req *irq = (struct if_irda_req *) rq;
1322 struct w83977af_ir *self;
1323 unsigned long flags;
1324 int ret = 0;
1325
1326 ASSERT(dev != NULL, return -1;);
1327
1328 self = dev->priv;
1329
1330 ASSERT(self != NULL, return -1;);
1331
1332 IRDA_DEBUG(2, __FUNCTION__ "(), %s, (cmd=0x%X)\n", dev->name, cmd);
1333
1334 /* Disable interrupts & save flags */
1335 save_flags(flags);
1336 cli();
1337
1338 switch (cmd) {
1339 case SIOCSBANDWIDTH: /* Set bandwidth */
1340 if (!capable(CAP_NET_ADMIN))
1341 return -EPERM;
1342 w83977af_change_speed(self, irq->ifr_baudrate);
1343 break;
1344 case SIOCSMEDIABUSY: /* Set media busy */
1345 if (!capable(CAP_NET_ADMIN))
1346 return -EPERM;
1347 irda_device_set_media_busy(self->netdev, TRUE);
1348 break;
1349 case SIOCGRECEIVING: /* Check if we are receiving right now */
1350 irq->ifr_receiving = w83977af_is_receiving(self);
1351 break;
1352 default:
1353 ret = -EOPNOTSUPP;
1354 }
1355
1356 restore_flags(flags);
1357
1358 return ret;
1359 }
1360
1361 static struct net_device_stats *w83977af_net_get_stats(struct net_device *dev)
1362 {
1363 struct w83977af_ir *self = (struct w83977af_ir *) dev->priv;
1364
1365 return &self->stats;
1366 }
1367
1368 #ifdef MODULE
1369
1370 MODULE_AUTHOR("Dag Brattli <dagb@cs.uit.no>");
1371 MODULE_DESCRIPTION("Winbond W83977AF IrDA Device Driver");
1372
1373 MODULE_PARM(qos_mtt_bits, "i");
1374 MODULE_PARM_DESC(qos_mtt_bits, "Mimimum Turn Time");
1375 MODULE_PARM(io, "1-4i");
1376 MODULE_PARM_DESC(io, "Base I/O addresses");
1377 MODULE_PARM(irq, "1-4i");
1378 MODULE_PARM_DESC(irq, "IRQ lines");
1379
1380 /*
1381 * Function init_module (void)
1382 *
1383 *
1384 *
1385 */
1386 int init_module(void)
1387 {
1388 return w83977af_init();
1389 }
1390
1391 /*
1392 * Function cleanup_module (void)
1393 *
1394 *
1395 *
1396 */
1397 void cleanup_module(void)
1398 {
1399 w83977af_cleanup();
1400 }
1401 #endif /* MODULE */
1402
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