1 /*
2 * Aironet 4500 Pcmcia driver
3 *
4 * Elmer Joandi, Januar 1999
5 * Copyright: GPL
6 *
7 *
8 * Revision 0.1 ,started 30.12.1998
9 *
10 *
11 */
12
13
14 #ifndef AIRONET4500_H
15 #define AIRONET4500_H
16 // redefined to avoid PCMCIA includes
17
18 #include <linux/version.h>
19 /*#include <linux/module.h>
20 #include <linux/kernel.h>
21 */
22
23 /*
24 #include <linux/types.h>
25 #include <linux/netdevice.h>
26 #include <linux/etherdevice.h>
27 #include <linux/delay.h>
28 #include <linux/time.h>
29 */
30 #include <linux/802_11.h>
31
32 //damn idiot PCMCIA stuff
33 #ifndef DEV_NAME_LEN
34 #define DEV_NAME_LEN 32
35 #endif
36
37 struct pcmcia_junkdev_node_t {
38 char dev_name[DEV_NAME_LEN];
39 u_short major, minor;
40 struct dev_node_t *next;
41 };
42
43 #ifndef CS_RELEASE
44 typedef struct pcmcia_junkdev_node_t dev_node_t;
45 #endif
46
47
48
49 #include <linux/spinlock.h>
50 typedef spinlock_t my_spinlock_t ;
51 #define my_spin_lock_init(a) spin_lock_init(a)
52 #define my_spin_lock_irqsave(a,b) spin_lock_irqsave(a,b)
53 #define my_spin_unlock_irqrestore(a,b) spin_unlock_irqrestore(a,b)
54
55
56 #define AWC_ERROR -1
57 #define AWC_SUCCESS 0
58
59 struct awc_cis {
60 unsigned char cis[0x301];
61 unsigned char unknown302[0xdf];
62 unsigned short configuration_register;
63 unsigned short pin_replacement_register;
64 unsigned short socket_and_copy_register;
65
66 };
67
68
69 /* timeout for transmit watchdog timer, AP default is 8 sec */
70 #define AWC_TX_TIMEOUT (HZ * 8)
71
72
73
74 /*************************** REGISTER OFFSETS *********************/
75 #define awc_Command_register 0x00
76 #define awc_Param0_register 0x02
77 #define awc_Param1_register 0x04
78 #define awc_Param2_register 0x06
79 #define awc_Status_register 0x08
80 #define awc_Resp0_register 0x0A
81 #define awc_Resp1_register 0x0C
82 #define awc_Resp2_register 0x0E
83 #define awc_EvStat_register 0x30
84 #define awc_EvIntEn_register 0x32
85 #define awc_EvAck_register 0x34
86 #define awc_SWSupport0_register 0x28
87 #define awc_SWSupport1_register 0x2A
88 #define awc_SWSupport2_register 0x2C
89 #define awc_SWSupport3_register 0x2E
90 #define awc_LinkStatus_register 0x10
91 // Memory access RID FID
92 #define awc_Select0_register 0x18
93 #define awc_Offset0_register 0x1C
94 #define awc_Data0_register 0x36
95 #define awc_Select1_register 0x1A
96 #define awc_Offset1_register 0x1E
97 #define awc_Data1_register 0x38
98 //
99 #define awc_RxFID_register 0x20
100 #define awc_TxAllocFID_register 0x22
101 #define awc_TxComplFID_register 0x24
102 #define awc_AuxPage_register 0x3A
103 #define awc_AuxOffset_register 0x3C
104 #define awc_AuxData_register 0x3E
105
106
107 struct awc_bap {
108 u16 select;
109 u16 offset;
110 u16 data;
111 volatile int lock;
112 volatile int status;
113 struct semaphore sem;
114 my_spinlock_t spinlock;
115 unsigned long flags;
116 };
117
118
119
120 #define AWC_COMMAND_STATE_WAIT_CMD_BUSY 1
121 #define AWC_COMMAND_STATE_WAIT_CMD_ACK 2
122 #define AWC_COMMAND_STATE_WAIT_BAP_BUSY 3
123 #define AWC_COMMAND_STATE_BAP_NOT_SET 4
124 #define AWC_COMMAND_STATE_BAP_SET 5
125
126 struct awc_command {
127 volatile int state;
128 volatile int lock_state;
129 struct net_device * dev;
130 struct awc_private * priv;
131 u16 port;
132 struct awc_bap * bap;
133 u16 command;
134 u16 par0;
135 u16 par1;
136 u16 par2;
137 u16 status;
138 u16 resp0;
139 u16 resp1;
140 u16 resp2;
141 u16 rid;
142 u16 offset;
143 u16 len;
144 void * buff;
145
146 };
147
148
149
150
151 #define DOWN(a) down_interruptible( a ) ;
152 // if (in_interrupt()) { down_interruptible( a ) ; } else printk("semaphore DOWN in interrupt tried \n");
153 #define UP(a) up( a ) ;
154 // if (in_interrupt()) {up( a ) ; } else printk("semaphore UP in interrupt tried \n");
155
156 /* if (!in_interrupt())\
157 printk("bap lock under cli but not in int\n");\
158 */
159
160 #define AWC_LOCK_COMMAND_ISSUING(a) my_spin_lock_irqsave(&a->command_issuing_spinlock,a->command_issuing_spinlock_flags);
161 #define AWC_UNLOCK_COMMAND_ISSUING(a) my_spin_unlock_irqrestore(&a->command_issuing_spinlock,a->command_issuing_spinlock_flags);
162
163 #define AWC_BAP_LOCK_UNDER_CLI_REAL(cmd) \
164 if (!cmd.priv) {\
165 printk(KERN_CRIT "awc4500: no priv present in command !");\
166 }\
167 cmd.bap = &(cmd.priv->bap1);\
168 if (both_bap_lock)\
169 my_spin_lock_irqsave(&cmd.priv->both_bap_spinlock,cmd.priv->both_bap_spinlock_flags);\
170 if (cmd.bap){\
171 my_spin_lock_irqsave(&(cmd.bap->spinlock),cmd.bap->flags);\
172 cmd.bap->lock++;\
173 if (cmd.bap->lock > 1)\
174 printk("Bap 1 lock high\n");\
175 cmd.lock_state |= AWC_BAP_LOCKED;\
176 }
177
178 #define AWC_BAP_LOCK_NOT_CLI_REAL(cmd) {\
179 if (in_interrupt())\
180 printk("bap lock not cli in int\n");\
181 if (!cmd.priv) {\
182 printk(KERN_CRIT "awc4500: no priv present in command,lockup follows !");\
183 }\
184 cmd.bap = &(cmd.priv->bap0);\
185 if (both_bap_lock)\
186 my_spin_lock_irqsave(&cmd.priv->both_bap_spinlock,cmd.priv->both_bap_spinlock_flags);\
187 my_spin_lock_irqsave(&(cmd.bap->spinlock),cmd.bap->flags);\
188 DOWN(&(cmd.priv->bap0.sem));\
189 cmd.bap->lock++;\
190 if (cmd.bap->lock > 1)\
191 printk("Bap 0 lock high\n");\
192 cmd.lock_state |= AWC_BAP_SEMALOCKED;\
193 }
194
195 #define AWC_BAP_LOCK_NOT_CLI_CLI_REAL(cmd) {\
196 cmd.bap = &(cmd.priv->bap0);\
197 if (both_bap_lock)\
198 my_spin_lock_irqsave(&cmd.priv->both_bap_spinlock,cmd.priv->both_bap_spinlock_flags);\
199 my_spin_lock_irqsave(&(cmd.bap->spinlock),cmd.bap->flags);\
200 cmd.bap->lock++;\
201 if (cmd.bap->lock > 1)\
202 printk("Bap 0 lock high\n");\
203 cmd.lock_state |= AWC_BAP_LOCKED;\
204 }
205
206 #define BAP_LOCK_ANY(cmd)\
207 if (in_interrupt()) AWC_BAP_LOCK_NOT_CLI_CLI_REAL(cmd)\
208 else AWC_BAP_LOCK_NOT_CLI_REAL(cmd)
209
210 #define AWC_BAP_LOCK_NOT_CLI(cmd) BAP_LOCK_ANY(cmd)
211 #define AWC_BAP_LOCK_UNDER_CLI(cmd) AWC_BAP_LOCK_UNDER_CLI_REAL(cmd)
212 /*
213 if (!cmd.priv->bap1.lock ) {BAP_LOCK_ANY(cmd);}\
214 else AWC_BAP_LOCK_NOT_CLI_CLI_REAL(cmd);
215 */
216 #define AWC_BAP_LOCKED 0x01
217 #define AWC_BAP_SEMALOCKED 0x02
218
219 #define AWC_BAP_BUSY 0x8000
220 #define AWC_BAP_ERR 0x4000
221 #define AWC_BAP_DONE 0x2000
222
223 #define AWC_CLI 1
224 #define AWC_NOT_CLI 2
225
226 /*#define WAIT61x3 inb(0x61);\
227 inb(0x61);\
228 inb(0x61);
229 */
230 #define WAIT61x3 udelay(bap_sleep)
231
232 #define AWC_INIT_COMMAND(context, a_com, a_dev,a_cmmand,a_pr0, a_rid, a_offset, a_len, a_buff) {\
233 memset(&a_com,0,sizeof(a_com) );\
234 a_com.dev = a_dev;\
235 a_com.priv = a_dev->priv;\
236 a_com.port = a_dev->base_addr;\
237 a_com.bap = NULL;\
238 a_com.command = a_cmmand;\
239 a_com.par0 = a_pr0;\
240 a_com.rid = a_rid;\
241 a_com.offset = a_offset;\
242 a_com.len = a_len;\
243 a_com.buff = a_buff;\
244 a_com.lock_state = 0;\
245 };
246
247 /* väga veider asi järgnevast
248 makrost välja jäetud if (cmd.bap) AWC_IN((cmd.bap)->data);\
249 */
250
251 #define AWC_BAP_UNLOCK(com) { \
252 if (com.bap){ \
253 if ( (com.lock_state & AWC_BAP_SEMALOCKED) &&\
254 (com.lock_state & AWC_BAP_LOCKED) ){\
255 printk("Both Sema and simple lock \n");\
256 }\
257 if ( com.lock_state & AWC_BAP_SEMALOCKED ){\
258 com.bap->lock--; \
259 com.lock_state &= ~AWC_BAP_SEMALOCKED;\
260 UP(&(com.bap->sem)); \
261 my_spin_unlock_irqrestore(&(cmd.bap->spinlock),cmd.bap->flags);\
262 } else if (com.lock_state & AWC_BAP_LOCKED){\
263 com.bap->lock--; \
264 com.lock_state &= ~AWC_BAP_LOCKED;\
265 my_spin_unlock_irqrestore(&(cmd.bap->spinlock),cmd.bap->flags);\
266 }\
267 }\
268 if (both_bap_lock)\
269 my_spin_unlock_irqrestore(&cmd.priv->both_bap_spinlock,cmd.priv->both_bap_spinlock_flags);\
270 }
271
272 #define AWC_RELEASE_COMMAND(com) {\
273 AWC_BAP_UNLOCK(cmd);\
274 }
275
276
277
278 #define awc_manufacturer_code 0x015F
279 #define awc_product_code 0x0005
280
281
282 #define awc_write(base,register,u16value) outw(u16value, (base)+(register))
283 #define awc_read(base,register) inw((base)+(register))
284 #define AWC_OUT(base,val) outw(val, base)
285 #define AWC_IN(base) inw(base)
286
287
288 #define awc_read_response(cmd) { \
289 cmd->status=awc_read(cmd->port,awc_Status_register);\
290 cmd->resp0=awc_read(cmd->port,awc_Resp0_register);\
291 cmd->resp1=awc_read(cmd->port,awc_Resp1_register);\
292 cmd->resp2=awc_read(cmd->port,awc_Resp2_register);\
293 };
294
295 #define awc_command_busy(base) (awc_read(base,awc_Command_register) & 0x8000)
296 #define awc_command_read(base) awc_read(base,awc_Command_register)
297 #define awc_command_write(base,cmd) awc_write(base,awc_Command_register,cmd)
298 #define awc_event_status_Awake(base) (awc_read(base,awc_EvStat_register) & 0x0100)
299 #define awc_event_status_Link(base) (awc_read(base,awc_EvStat_register) & 0x0080)
300 #define awc_event_status_Cmd(base) (awc_read(base,awc_EvStat_register) & 0x0010)
301 #define awc_event_status_Alloc(base) (awc_read(base,awc_EvStat_register) & 0x0008)
302 #define awc_event_status_TxExc(base) (awc_read(base,awc_EvStat_register) & 0x0004)
303 #define awc_event_status_Tx(base) (awc_read(base,awc_EvStat_register) & 0x0002)
304 #define awc_event_status_TxResp(base) (awc_read(base,awc_EvStat_register) & 0x0006)
305 #define awc_event_status_Rx(base) (awc_read(base,awc_EvStat_register) & 0x0001)
306 #define awc_event_status(base) (awc_read(base,awc_EvStat_register))
307
308 #define awc_Link_Status(base) awc_read(base,awc_LinkStatus_register)
309
310 #define awc_Rx_Fid(base) awc_read(base,awc_RxFID_register)
311 #define awc_Tx_Allocated_Fid(base) awc_read(base,awc_TxAllocFID_register)
312 #define awc_Tx_Compl_Fid(base) awc_read(base,awc_TxComplFID_register)
313
314 #define awc_event_ack_ClrStckCmdBsy(base) awc_write(base,awc_EvAck_register, 0x4000)
315 #define awc_event_ack_WakeUp(base) awc_write(base,awc_EvAck_register, 0x2000)
316 #define awc_event_ack_Awaken(base) awc_write(base,awc_EvAck_register, 0x0100)
317 #define awc_event_ack_Link(base) awc_write(base,awc_EvAck_register, 0x0080)
318 #define awc_event_ack_Cmd(base) awc_write(base,awc_EvAck_register, 0x0010)
319 #define awc_event_ack_Alloc(base) awc_write(base,awc_EvAck_register, 0x0008)
320 #define awc_event_ack_TxExc(base) awc_write(base,awc_EvAck_register, 0x0004)
321 #define awc_event_ack_Tx(base) awc_write(base,awc_EvAck_register, 0x0002)
322 #define awc_event_ack_Rx(base) awc_write(base,awc_EvAck_register, 0x0001)
323
324 #define awc_event_ack(base,ints) awc_write(base,awc_EvAck_register,ints)
325
326 #define awc_ints_enabled(base) (awc_read(base,awc_EvIntEn_register))
327 #define awc_ints_enable(base,ints) awc_write(base,awc_EvIntEn_register,ints)
328
329
330
331 /************************ RX TX BUFF ************************/
332
333
334 struct aironet4500_radio_rx_header {
335 u32 RxTime;
336 u16 Status;
337 u16 PayloadLength;
338 u8 Reserved0;
339 u8 RSSI;
340 u8 Rate;
341 u8 Frequency;
342 u8 Rx_association_count;
343 u8 Reserved1[3];
344 u8 PLCP_header[4];
345
346 };
347
348
349 struct aironet4500_radio_tx_header {
350 u32 SWSupport;
351 u16 Status;
352 #define aironet4500_tx_status_max_retries 0x0002
353 #define aironet4500_tx_status_lifetime_exceeded 0x0004
354 #define aironet4500_tx_status_AID_failure 0x0008
355 #define aironet4500_tx_status_MAC_disabled 0x0010
356 #define aironet4500_tx_status_association_lost 0x0020
357 u16 PayloadLength;
358 u16 TX_Control;
359 #define aironet4500_tx_control_tx_ok_event_enable 0x0002
360 #define aironet4500_tx_control_tx_fail_event_enable 0x0004
361 #define aironet4500_tx_control_header_type_802_11 0x0008
362 #define aironet4500_tx_control_payload_type_llc 0x0010
363 #define aironet4500_tx_control_no_release 0x0020
364 #define aironet4500_tx_control_reuse_fid \
365 (aironet4500_tx_control_tx_ok_event_enable |\
366 aironet4500_tx_control_tx_fail_event_enable |\
367 aironet4500_tx_control_no_release)
368 #define aironet4500_tx_control_no_retries 0x0040
369 #define aironet4500_tx_control_clear_AID 0x0080
370 #define aironet4500_tx_control_strict_order 0x0100
371 #define aironet4500_tx_control_use_rts 0x0200
372 u16 AID;
373 u8 Tx_Long_Retry;
374 u8 Tx_Short_Retry;
375 u8 tx_association_count;
376 u8 tx_bit_rate;
377 #define aironet4500_tx_bit_rate_automatic 0
378 #define aironet4500_tx_bit_rate_500kbps 1
379 #define aironet4500_tx_bit_rate_1Mbps 2
380 #define aironet4500_tx_bit_rate_2Mbps 4
381 u8 Max_Long_Retry;
382 u8 Max_Short_Retry;
383 u8 Reserved0[2];
384 };
385
386
387 struct aironet4500_rx_fid {
388
389 u16 rid;
390 struct aironet4500_radio_rx_header radio_rx;
391 struct ieee_802_11_header ieee_802_11;
392 u16 gap_length;
393 struct ieee_802_3_header ieee_802_3;
394 u8 * payload;
395 };
396
397
398 struct aironet4500_tx_fid {
399
400 u16 fid;
401 u16 fid_size;
402 struct aironet4500_radio_tx_header radio_tx;
403 struct ieee_802_11_header ieee_802_11;
404 u16 gap_length;
405 #define aironet4500_gap_len_without_802_3 6
406 #define aironet4500_gap_len_with_802_3 0
407 struct ieee_802_3_header ieee_802_3;
408 u8 * payload;
409 };
410
411 struct awc_fid {
412
413 u32 type;
414 #define p80211_llc_snap 0x0100
415 #define p80211_8021H 0x0200
416 #define p80211_8022 0x0400
417 #define p80211_8023 0x0800
418 #define p80211_snap_8021H 0x1000
419 #define p80211copy_path_skb 0x2000
420
421 u8 priority;
422 u8 busy;
423
424 #define awc_tx_fid_complete_read 0x01
425 u16 state;
426 union {
427 struct aironet4500_tx_fid tx;
428 struct aironet4500_rx_fid rx;
429 } u;
430
431 struct ieee_802_11_snap_header snap;
432 struct ieee_802_11_802_1H_header bridge;
433 u16 bridge_size;
434 struct ieee_802_11_802_2_header p8022;
435
436 u16 pkt_len;
437 u8 * mac;
438 struct sk_buff * skb;
439 long long transmit_start_time;
440 struct awc_fid * next;
441 struct awc_fid * prev;
442
443 };
444
445
446
447 struct awc_fid_queue {
448
449
450 struct awc_fid * head;
451 struct awc_fid * tail;
452 int size;
453 my_spinlock_t spinlock;
454 };
455
456
457 extern __inline__ void
458 awc_fid_queue_init(struct awc_fid_queue * queue){
459
460 unsigned long flags;
461 memset(queue,0, sizeof(struct awc_fid_queue));
462 my_spin_lock_init(&queue->spinlock);
463 my_spin_lock_irqsave(&queue->spinlock,flags);
464 queue->head = NULL;
465 queue->tail = NULL;
466 queue->size = 0;
467 my_spin_unlock_irqrestore(&queue->spinlock,flags);
468 };
469
470 extern inline void
471 awc_fid_queue_push_tail( struct awc_fid_queue * queue,
472 struct awc_fid * fid){
473
474 unsigned long flags;
475
476 my_spin_lock_irqsave(&queue->spinlock,flags);
477
478 fid->prev = queue->tail;
479 fid->next = NULL;
480
481 if (queue->tail){
482 queue->tail->next = fid;
483 }
484 queue->tail = fid;
485
486 if (!queue->head)
487 queue->head = fid;
488 queue->size++;
489
490 my_spin_unlock_irqrestore(&queue->spinlock,flags);
491
492 };
493
494
495 extern inline void
496 awc_fid_queue_push_head( struct awc_fid_queue * queue,
497 struct awc_fid * fid){
498
499 unsigned long flags;
500
501 my_spin_lock_irqsave(&queue->spinlock,flags);
502
503 fid->prev = NULL;
504 fid->next = queue->head;
505
506 if (queue->head){
507 queue->head->prev = fid;
508 }
509 queue->head = fid;
510
511 if (!queue->tail)
512 queue->tail = fid;
513 queue->size++;
514
515
516 my_spin_unlock_irqrestore(&queue->spinlock,flags);
517
518 };
519
520
521
522 extern inline void
523 awc_fid_queue_rm( struct awc_fid_queue * queue,
524 struct awc_fid * fid){
525
526
527 if (fid->prev) {
528 fid->prev->next = fid->next;
529 };
530
531 if (fid->next) {
532 fid->next->prev = fid->prev;
533 };
534
535 if (fid == queue->tail) {
536 queue->tail = fid->prev;
537 };
538 if (fid == queue->head) {
539 queue->head = fid->next;
540 };
541 fid->next = NULL;
542 fid->prev = NULL;
543 queue->size--;
544 if (queue->size ==0 ){
545 queue->tail = NULL;
546 queue->head = NULL;
547 }
548 };
549
550 extern inline void
551 awc_fid_queue_remove( struct awc_fid_queue * queue,
552 struct awc_fid * fid){
553 unsigned long flags;
554 my_spin_lock_irqsave(&queue->spinlock,flags);
555
556 awc_fid_queue_rm(queue,fid);
557
558 my_spin_unlock_irqrestore(&queue->spinlock,flags);
559
560 };
561
562
563
564 extern inline struct awc_fid *
565 awc_fid_queue_pop_head( struct awc_fid_queue * queue){
566
567 unsigned long flags;
568 struct awc_fid * fid;
569
570 my_spin_lock_irqsave(&queue->spinlock,flags);
571
572 fid = queue->head;
573 if (fid)
574 awc_fid_queue_rm(queue,fid);
575
576
577 my_spin_unlock_irqrestore(&queue->spinlock,flags);
578
579 return fid;
580 };
581
582
583
584
585 extern inline struct awc_fid *
586 awc_fid_queue_pop_tail( struct awc_fid_queue * queue){
587
588 unsigned long flags;
589 struct awc_fid * fid;
590
591 my_spin_lock_irqsave(&queue->spinlock,flags);
592
593 fid = queue->tail;
594 if (fid)
595 awc_fid_queue_rm(queue,fid);
596
597 my_spin_unlock_irqrestore(&queue->spinlock,flags);
598
599 return fid;
600 };
601
602
603
604 #define AWC_TX_HEAD_SIZE 0x44
605 #define AWC_TX_ALLOC_SMALL_SIZE 200
606 #define AWC_RX_BUFFS 50
607
608
609 /***************************** RID & CONFIG ***********************/
610
611 struct awc_config{
612 unsigned short Len; /* sizeof(PC4500_CONFIG) */
613 unsigned short OperatingMode; /* operating mode */
614
615 #define MODE_STA_IBSS 0
616 #define MODE_STA_ESS 1
617 #define MODE_AP 2
618 #define MODE_AP_RPTR 3
619 #define MODE_ETHERNET_HOST (0<<8) /* rx payloads converted */
620 #define MODE_LLC_HOST (1<<8) /* rx payloads left as is */
621 #define MODE_AIRONET_EXTEND (1<<9) /* enable Aironet extenstions */
622 #define MODE_AP_INTERFACE (1<<10) /* enable ap interface extensions */
623 unsigned short ReceiveMode; /* receive mode */
624 #define RXMODE_BC_MC_ADDR 0
625 #define RXMODE_BC_ADDR 1 /* ignore multicasts */
626 #define RXMODE_ADDR 2 /* ignore multicast and broadcast */
627 #define RXMODE_RFMON 3 /* wireless monitor mode */
628 #define RXMODE_RFMON_ANYBSS 4
629 #define RXMODE_LANMON 5 /* lan style monitor -- data packets only */
630 #define RXMODE_DISABLE_802_3_HEADER 0x100 /* disables 802.3 header on rx */
631
632 unsigned short FragmentThreshold;
633 unsigned short RtsThreshold;
634 unsigned char StationMacAddress[6];
635 unsigned char Rates[8];
636 unsigned short ShortRetryLimit;
637 unsigned short LongRetryLimit;
638 unsigned short TxLifetime; /* in kusec */
639 unsigned short RxLifetime; /* in kusec */
640 unsigned short Stationary;
641 unsigned short Ordering;
642 unsigned short DeviceType; /* for overriding device type */
643 unsigned short _reserved1[5]; /*---------- Scanning/Associating ----------*/
644 unsigned short ScanMode;
645 #define SCANMODE_ACTIVE 0
646 #define SCANMODE_PASSIVE 1
647 #define SCANMODE_AIROSCAN 2
648 unsigned short ProbeDelay; /* in kusec */
649 unsigned short ProbeEnergyTimeout; /* in kusec */
650 unsigned short ProbeResponseTimeout;
651 unsigned short BeaconListenTimeout;
652 unsigned short JoinNetTimeout;
653 unsigned short AuthenticationTimeout;
654 unsigned short AuthenticationType;
655 #define AUTH_OPEN 1
656 #define AUTH_SHAREDKEY 2
657 #define AUTH_EXCLUDENONWEP 4
658 unsigned short AssociationTimeout;
659 unsigned short SpecifiedApTimeout;
660 unsigned short OfflineScanInterval;
661 unsigned short OfflineScanDuration;
662 unsigned short LinkLossDelay;
663 unsigned short MaxBeaconLostTime;
664 unsigned short RefreshInterval;
665 #define DISABLE_REFRESH 0xFFFF
666 unsigned short _reserved1a[1]; /*---------- Power save operation ----------*/
667 unsigned short PowerSaveMode;
668 #define POWERSAVE_CAM 0
669 #define POWERSAVE_PSP 1
670 #define POWERSAVE_PSP_CAM 2
671 unsigned short SleepForDtims;
672 unsigned short ListenInterval;
673 unsigned short FastListenInterval;
674 unsigned short ListenDecay;
675 unsigned short FastListenDelay;
676 unsigned short _reserved2[2]; /*---------- Ap/Ibss config items ----------*/
677 unsigned short BeaconPeriod;
678 unsigned short AtimDuration;
679 unsigned short HopPeriod;
680 unsigned short ChannelSet;
681 unsigned short Channel;
682 unsigned short DtimPeriod;
683 unsigned short _reserved3[2]; /*---------- Radio configuration ----------*/
684 unsigned short RadioType;
685 #define RADIOTYPE_DEFAULT 0
686 #define RADIOTYPE_802_11 1
687 #define RADIOTYPE_LEGACY 2
688 unsigned char u8RxDiversity;
689 unsigned char u8TxDiversity;
690 unsigned short TxPower;
691 #define TXPOWER_DEFAULT 0
692 unsigned short RssiThreshold;
693 #define RSSI_DEFAULT 0
694 unsigned short RadioSpecific[4]; /*---------- Aironet Extensions ----------*/
695 unsigned char NodeName[16];
696 unsigned short ArlThreshold;
697 unsigned short ArlDecay;
698 unsigned short ArlDelay;
699 unsigned short _reserved4[1]; /*---------- Aironet Extensions ----------*/
700 unsigned short MagicAction;
701 #define MAGIC_ACTION_STSCHG 1
702 #define MACIC_ACTION_RESUME 2
703 #define MAGIC_IGNORE_MCAST (1<<8)
704 #define MAGIC_IGNORE_BCAST (1<<9)
705 #define MAGIC_SWITCH_TO_PSP (0<<10)
706 #define MAGIC_STAY_IN_CAM (1<<10)
707 };
708
709
710
711 struct awc_SSID {
712 u16 lenght;
713 u8 SSID[32];
714 };
715
716 struct awc_SSIDs {
717 u16 ridLen;
718 struct awc_SSID SSID[3];
719
720 };
721
722 struct awc_fixed_APs{
723 u16 ridLen;
724 u8 AP[4][6];
725 };
726
727 struct awc_driver_name{
728 u16 ridLen;
729 u8 name[16];
730 };
731
732 struct awc_encapsulation{
733 u16 etherType;
734 u16 Action;
735 };
736
737 struct awc_enc_trans{
738 u16 ridLen;
739 struct awc_encapsulation rules[8];
740 };
741
742 struct awc_wep_key {
743 u16 ridLen;
744 u16 KeyIndex;
745 u8 Address[6];
746 u16 KeyLen;
747 u8 Key[16];
748 };
749
750 struct awc_modulation {
751 u16 ridLen;
752 u16 Modulation;
753 };
754
755 struct awc_cap{
756 u16 ridLen;
757 u8 OUI[3];
758 u8 ProductNum[3];
759 u8 ManufacturerName[32];
760 u8 ProductName[16];
761 u8 ProductVersion[8];
762 u8 FactoryAddress[6];
763 u8 AironetAddress[6];
764 u16 RadioType;
765 u16 RegDomain;
766 u8 Callid[6];
767 u8 SupportedRates[8];
768 u8 RxDiversity;
769 u8 TxDiversity;
770 u16 TxPowerLevels[8];
771 u16 HardwareVersion;
772 u16 HardwareCapabilities;
773 u16 TemperatureRange;
774 u16 SoftwareVersion;
775 u16 SoftwareSubVersion;
776 u16 InterfaceVersion;
777 u16 SoftwareCapabilities;
778 u8 BootBlockVersionMajor;
779 u8 BootBlockVersionMinor;
780
781 };
782
783
784 struct awc_status{
785 u16 ridLen;
786 u8 MacAddress[6];
787 u16 OperationalMode;
788 u16 ErrorCode;
789 u16 CurrentSignalQuality;
790 u16 SSIDlength;
791 u8 SSID[32];
792 u8 ApName[16];
793 u8 CurrentBssid[32];
794 u8 PreviousBSSIDs[3][6];
795 u16 BeaconPeriod;
796 u16 DtimPeriod;
797 u16 AtimDuration;
798 u16 HopPeriod;
799 u16 ChannelSet;
800 u16 Channel;
801
802 u16 HopsToBackbone;
803 u16 ApTotalLoad;
804 u16 OurGeneratedLoad;
805 u16 AccumulatedArl;
806
807 };
808
809
810 struct awc_AP{
811 u16 ridLen;
812 u16 TIM_Addr;
813 u16 Airo_Addr;
814 };
815
816 struct awc_Statistics_32 {
817
818 u32 RidLen;
819 u32 RxOverrunErr;
820 u32 RxPlcpCrcErr;
821 u32 RxPlcpFormat;
822 u32 RxPlcpLength;
823 u32 RxMacCrcErr;
824 u32 RxMacCrcOk;
825 u32 RxWepErr;
826 u32 RxWepOk;
827 u32 RetryLong;
828 u32 RetryShort;
829 u32 MaxRetries;
830 u32 NoAck;
831
832 u32 NoCts;
833 u32 RxAck;
834 u32 RxCts;
835 u32 TxAck;
836 u32 TxRts;
837 u32 TxCts;
838 u32 TxMc;
839 u32 TxBc;
840 u32 TxUcFrags;
841 u32 TxUcPackets;
842 u32 TxBeacon;
843 u32 RxBeacon;
844 u32 TxSinColl;
845 u32 TxMulColl;
846 u32 DefersNo;
847 u32 DefersProt;
848 u32 DefersEngy;
849 u32 DupFram;
850 u32 RxFragDisc;
851 u32 TxAged;
852 u32 RxAged;
853 u32 LostSync_Max;
854 u32 LostSync_Mis;
855 u32 LostSync_Arl;
856 u32 LostSync_Dea;
857 u32 LostSync_Disa;
858 u32 LostSync_Tsf;
859 u32 HostTxMc;
860 u32 HostTxBc;
861 u32 HostTxUc;
862 u32 HostTxFail;
863 u32 HostRxMc;
864 u32 HostRxBc;
865 u32 HostRxUc;
866 u32 HostRxDiscar;
867 u32 HmacTxMc;
868 u32 HmacTxBc;
869 u32 HmacTxUc;
870 u32 HmacTxFail;
871 u32 HmacRxMc;
872 u32 HmacRxBc;
873 u32 HmacRxUc;
874 u32 HmacRxDisca;
875 u32 HmacRxAcce;
876 u32 SsidMismatch;
877 u32 ApMismatch;
878 u32 RatesMismatc;
879 u32 AuthReject;
880 u32 AuthTimeout;
881 u32 AssocReject;
882 u32 AssocTimeout;
883 u32 NewReason;
884 u32 AuthFail_1;
885 u32 AuthFail_2;
886 u32 AuthFail_3;
887 u32 AuthFail_4;
888 u32 AuthFail_5;
889 u32 AuthFail_6;
890 u32 AuthFail_7;
891 u32 AuthFail_8;
892 u32 AuthFail_9;
893 u32 AuthFail_10;
894 u32 AuthFail_11;
895 u32 AuthFail_12;
896 u32 AuthFail_13;
897 u32 AuthFail_14;
898 u32 AuthFail_15;
899 u32 AuthFail_16;
900 u32 AuthFail_17;
901 u32 AuthFail_18;
902 u32 AuthFail_19;
903 u32 RxMan;
904 u32 TxMan;
905 u32 RxRefresh;
906 u32 TxRefresh;
907 u32 RxPoll;
908 u32 TxPoll;
909 u32 HostRetries;
910 u32 LostSync_HostReq;
911 u32 HostTxBytes;
912 u32 HostRxBytes;
913 u32 ElapsedUsec;
914 u32 ElapsedSec;
915 u32 LostSyncBett;
916 };
917
918 struct awc_Statistics_16 {
919
920 u16 RidLen;
921 u16 RxOverrunErr;
922 u16 RxPlcpCrcErr;
923 u16 RxPlcpFormat;
924 u16 RxPlcpLength;
925 u16 RxMacCrcErr;
926 u16 RxMacCrcOk;
927 u16 RxWepErr;
928 u16 RxWepOk;
929 u16 RetryLong;
930 u16 RetryShort;
931 u16 MaxRetries;
932 u16 NoAck;
933 u16 NoCts;
934 u16 RxAck;
935 u16 RxCts;
936 u16 TxAck;
937 u16 TxRts;
938 u16 TxCts;
939 u16 TxMc;
940 u16 TxBc;
941 u16 TxUcFrags;
942 u16 TxUcPackets;
943 u16 TxBeacon;
944 u16 RxBeacon;
945 u16 TxSinColl;
946 u16 TxMulColl;
947 u16 DefersNo;
948 u16 DefersProt;
949 u16 DefersEngy;
950 u16 DupFram;
951 u16 RxFragDisc;
952 u16 TxAged;
953 u16 RxAged;
954 u16 LostSync_Max;
955 u16 LostSync_Mis;
956 u16 LostSync_Arl;
957 u16 LostSync_Dea;
958 u16 LostSync_Disa;
959 u16 LostSync_Tsf;
960 u16 HostTxMc;
961 u16 HostTxBc;
962 u16 HostTxUc;
963 u16 HostTxFail;
964 u16 HostRxMc;
965 u16 HostRxBc;
966 u16 HostRxUc;
967 u16 HostRxDiscar;
968 u16 HmacTxMc;
969 u16 HmacTxBc;
970 u16 HmacTxUc;
971 u16 HmacTxFail;
972 u16 HmacRxMc;
973 u16 HmacRxBc;
974 u16 HmacRxUc;
975 u16 HmacRxDisca;
976 u16 HmacRxAcce;
977 u16 SsidMismatch;
978 u16 ApMismatch;
979 u16 RatesMismatc;
980 u16 AuthReject;
981 u16 AuthTimeout;
982 u16 AssocReject;
983 u16 AssocTimeout;
984 u16 NewReason;
985 u16 AuthFail_1;
986 u16 AuthFail_2;
987 u16 AuthFail_3;
988 u16 AuthFail_4;
989 u16 AuthFail_5;
990 u16 AuthFail_6;
991 u16 AuthFail_7;
992 u16 AuthFail_8;
993 u16 AuthFail_9;
994 u16 AuthFail_10;
995 u16 AuthFail_11;
996 u16 AuthFail_12;
997 u16 AuthFail_13;
998 u16 AuthFail_14;
999 u16 AuthFail_15;
1000 u16 AuthFail_16;
1001 u16 AuthFail_17;
1002 u16 AuthFail_18;
1003 u16 AuthFail_19;
1004 u16 RxMan;
1005 u16 TxMan;
1006 u16 RxRefresh;
1007 u16 TxRefresh;
1008 u16 RxPoll;
1009 u16 TxPoll;
1010 u16 HostRetries;
1011 u16 LostSync_HostReq;
1012 u16 HostTxBytes;
1013 u16 HostRxBytes;
1014 u16 ElapsedUsec;
1015 u16 ElapsedSec;
1016 u16 LostSyncBett;
1017 };
1018
1019
1020 #define AWC_TXCTL_TXOK (1<<1) /* report if tx is ok */
1021 #define AWC_TXCTL_TXEX (1<<2) /* report if tx fails */
1022 #define AWC_TXCTL_802_3 (0<<3) /* 802.3 packet */
1023 #define AWC_TXCTL_802_11 (1<<3) /* 802.11 mac packet */
1024 #define AWC_TXCTL_ETHERNET (0<<4) /* payload has ethertype */
1025 #define AWC_TXCTL_LLC (1<<4) /* payload is llc */
1026 #define AWC_TXCTL_RELEASE (0<<5) /* release after completion */
1027 #define AWC_TXCTL_NORELEASE (1<<5) /* on completion returns to host */
1028
1029
1030 /************************* LINK STATUS STUFF *******************/
1031
1032 #define awc_link_status_loss_of_sync_missed_beacons 0x8000
1033 #define awc_link_status_loss_of_sync_max_retries 0x8001
1034 #define awc_link_status_loss_of_sync_ARL_exceed 0x8002
1035 #define awc_link_status_loss_of_sync_host_request 0x8003
1036 #define awc_link_status_loss_of_sync_TSF_sync 0x8004
1037 #define awc_link_status_deauthentication 0x8100
1038 #define awc_link_status_disassociation 0x8200
1039 #define awc_link_status_association_failed 0x8400
1040 #define awc_link_status_authentication_failed 0x0300
1041 #define awc_link_status_associated 0x0400
1042
1043 struct awc_strings {
1044 int par;
1045 unsigned int mask;
1046 const char * string;
1047
1048 };
1049
1050 #define awc_link_status_strings {\
1051 {awc_link_status_loss_of_sync_missed_beacons, 0xFFFF,"Loss of sync -- missed beacons"},\
1052 {awc_link_status_loss_of_sync_max_retries, 0xFFFF,"Loss of sync -- max retries"},\
1053 {awc_link_status_loss_of_sync_ARL_exceed, 0xFFFF,"Loss of sync -- average retry level (ARL) exceeded"},\
1054 {awc_link_status_loss_of_sync_host_request, 0xFFFF,"Loss of sync -- host request"},\
1055 {awc_link_status_loss_of_sync_TSF_sync, 0xFFFF,"Loss of sync -- TSF synchronization"},\
1056 {awc_link_status_deauthentication, 0xFF00,"Deauthentication "},\
1057 {awc_link_status_disassociation, 0xFF00,"Disassocation "},\
1058 {awc_link_status_association_failed , 0xFF00,"Association failed "},\
1059 {awc_link_status_authentication_failed, 0xFF00,"Authentication failure"},\
1060 {awc_link_status_associated, 0xFFFF,"Associated "},\
1061 {0,0,NULL}\
1062 }
1063
1064
1065 /****************************** COMMANDS and DEFAULTS and STATUSES ***********/
1066
1067 /****************************** COMMANDS */
1068
1069
1070 // Command definitions
1071
1072
1073
1074
1075 #define awc4500wout(base, com, p0,p1,p2) {\
1076 awc_write(base,awc_Param0_register, p0);\
1077 awc_write(base,awc_Param1_register, p1);\
1078 awc_write(base,awc_Param2_register, p2);\
1079 WAIT61x3;\
1080 awc_write(base,awc_Command_register, com);\
1081 WAIT61x3;\
1082 }
1083 #define awc_wout(cmd, com, p0,p1,p2) {\
1084 awc_write(base,awc_Param0_register, p0);\
1085 awc_write(base,awc_Param1_register, p1);\
1086 awc_write(base,awc_Param2_register, p2);\
1087 WAIT61x3;\
1088 awc_write(base,awc_Command_register, com);\
1089 WAIT61x3;\
1090 }
1091
1092
1093 #define awc_command_NOP(cmd) awc_wout( cmd,0x0000,0,0,0) // NOP
1094 #define awc_command_Enable_All(cmd) awc_wout( cmd,0x0001,0,0,0) // Enable
1095 #define awc_command_Enable_MAC(cmd) awc_wout( cmd,0x0101,0,0,0) // Enable Mac
1096 #define awc_command_Enable_Rx(cmd) awc_wout( cmd,0x0201,0,0,0) // Enable Rx
1097 #define awc_command_Disable_MAC(cmd) awc_wout( cmd,0x0002,0,0,0) // Disable
1098 #define awc_command_Sync_Loss(cmd) awc_wout( cmd,0x0003,0,0,0) // Force a Loss of Sync
1099 #define awc_command_Soft_Reset(cmd) awc_wout( cmd,0x0004,0,0,0) // Firmware Restart (soft reset)
1100 #define awc_command_Host_Sleep(cmd) awc_wout( cmd,0x0005,0,0,0) // Host Sleep (must be issued as 0x0085)
1101 #define awc_command_Magic_Packet(cmd) awc_wout( cmd,0x0006,0,0,0) // Magic Packet
1102 #define awc_command_Read_Configuration(cmd) awc_wout( cmd,0x0008,0,0,0) // Read the Configuration from nonvolatile storage
1103 #define awc_command_Allocate_TX_Buff(cmd,size) awc_wout( cmd,0x000A,size,0,0) // Allocate Transmit Buffer
1104 #define awc_command_TX(cmd,FID) awc_wout( cmd,0x000B,FID ,0,0) // Transmit
1105 #define awc_command_Deallocate(cmd,FID) awc_wout( cmd,0x000C,FID ,0,0) // Deallocate
1106 #define awc_command_NOP2(cmd) awc_wout( cmd,0x0010,0,0,0) // NOP (same as 0x0000)
1107 #define awc_command_Read_RID(cmd,RID) awc_wout( cmd,0x0021,RID ,0,0) // Read RID
1108 #define awc_command_Write_RID(cmd,RID) awc_wout( cmd,0x0121,RID ,0,0) // Write RID
1109 #define awc_command_Allocate_Buff(cmd,size) awc_wout( cmd,0x0028,size,0,0) // Allocate Buffer
1110 #define awc_command_PSP_Nodes(cmd) awc_wout( cmd,0x0030,0,0,0) // PSP nodes (AP only)
1111 #define awc_command_Set_Phy_register(cmd,phy_register,clear_bits, set_bits)\
1112 awc_wout( cmd,0x003E,phy_register,clear_bits, set_bits) // Set PHY register
1113 #define awc_command_TX_Test(cmd,command, frequency, pattern) awc_wout( cmd,0x003F,command, frequency, pattern) // Transmitter Test
1114 #define awc_command_RX_Test(cmd) awc_wout( cmd,0x013F,0,0,0) // RX Test
1115 #define awc_command_Sleep(cmd) awc_wout( cmd,0x0085,0,0,0) // Go to Sleep (No Ack bit is mandatory)
1116 #define awc_command_Save_Configuration(cmd) awc_wout( cmd,0x0108,0,0,0) // Save the configuration to nonvolatile
1117
1118
1119 #define AWC_COMMAND_NOOP_BULL 0x000
1120 #define AWC_COMMAND_ENABLE 0x001
1121 #define AWC_COMMAND_ENABLE_MAC 0x101
1122 #define AWC_COMMAND_ENABLE_RX 0x201
1123 #define AWC_COMMAND_DISABLE 0x002
1124 #define AWC_COMMAND_LOSE_SYNC 0x003
1125 #define AWC_COMMAND_SOFT_RESET 0x004
1126 #define AWC_COMMAND_HOST_SLEEP 0x085
1127 #define AWC_COMMAND_MAGIC_PACKET 0x006
1128 #define AWC_COMMAND_READ_CONF 0x008
1129 #define AWC_COMMAND_SAVE_CONF 0x108
1130 #define AWC_COMMAND_TX_ALLOC 0x00A
1131 #define AWC_COMMAND_TX 0x00B
1132 #define AWC_COMMAND_DEALLOC 0x00C
1133 #define AWC_COMMAND_NOOP 0x010
1134 #define AWC_COMMAND_READ_RID 0x021
1135 #define AWC_COMMAND_WRITE_RID 0x121
1136 #define AWC_COMMAND_ALLOC 0x028
1137 #define AWC_COMMAND_PSP_NODES 0x030
1138 #define AWC_COMMAND_SET_PHY 0x03E
1139 #define AWC_COMMAND_TX_TEST 0x03F
1140 #define AWC_COMMAND_SLEEP 0x085
1141
1142
1143 #define awc_command_name_strings {\
1144 {0x0000, 0x00FF,"awc_command_NOP " },\
1145 {0x0001, 0x00FF,"awc_command_Enable_All " },\
1146 {0x0101, 0x01FF,"awc_command_Enable_MAC " },\
1147 {0x0201, 0x01FF,"awc_command_Enable_Rx " },\
1148 {0x0002, 0x00FF,"awc_command_Disable_MAC " },\
1149 {0x0003, 0x00FF,"awc_command_Sync_Loss " },\
1150 {0x0004, 0x00FF,"awc_command_Soft_Reset " },\
1151 {0x0005, 0x00FF,"awc_command_Host_Sleep " },\
1152 {0x0006, 0x00FF,"awc_command_Magic_Packet " },\
1153 {0x0008, 0x00FF,"awc_command_Read_Configuration " },\
1154 {0x000A, 0x00FF,"awc_command_Allocate_TX_Buff " },\
1155 {0x000B, 0x00FF,"awc_command_TX " },\
1156 {0x000C, 0x00FF,"awc_command_Deallocate " },\
1157 {0x0010, 0x00FF,"awc_command_NOP2 " },\
1158 {0x0021, 0x00FF,"awc_command_Read_RID " },\
1159 {0x0121, 0x01FF,"awc_command_Write_RID " },\
1160 {0x0028, 0x00FF,"awc_command_Allocate_Buff " },\
1161 {0x0030, 0x00FF,"awc_command_PSP_Nodes " },\
1162 {0x003E, 0x00FF,"awc_command_Set_Phy_register " },\
1163 {0x003F, 0x00FF,"awc_command_TX_Test " },\
1164 {0x013F, 0x01FF,"awc_command_RX_Test " },\
1165 {0x0085, 0x00FF,"awc_command_Sleep " },\
1166 {0x0108, 0x01FF,"awc_command_Save_Configuration " },\
1167 {0x0000, 0x00FF, NULL}\
1168 };
1169
1170
1171 /***************************** STATUSES */
1172
1173 #define awc_reply_success 0x0000
1174
1175 #define awc_reply_error_strings {\
1176 { 0x0000, 0x00FF," Success"},\
1177 { 0x0001, 0x00FF," Illegal command."},\
1178 { 0x0002, 0x00FF," Illegal format."},\
1179 { 0x0003, 0x00FF," Invalid FID."},\
1180 { 0x0004, 0x00FF," Invalid RID."},\
1181 { 0x0005, 0x00FF," Too Large"},\
1182 { 0x0006, 0x00FF," MAC is not disabled."},\
1183 { 0x0007, 0x00FF," Alloc is still busy processing previous alloc"},\
1184 { 0x0008, 0x00FF," Invalid Mode Field"},\
1185 { 0x0009, 0x00FF," Tx is not allowed in monitor mode"},\
1186 { 0x000A, 0x00FF," Loop test or memory test error"},\
1187 { 0x000B, 0x00FF," Cannot read this RID."},\
1188 { 0x000C, 0x00FF," Cannot write to this RID."},\
1189 { 0x000D, 0x00FF," Tag not found."},\
1190 { 0x0080, 0x00FF," Config mode is invalid."},\
1191 { 0x0081, 0x00FF," Config hop interval is invalid."},\
1192 { 0x0082, 0x00FF," Config beacon interval is invalid."},\
1193 { 0x0083, 0x00FF," Config receive mode is invalid."},\
1194 { 0x0084, 0x00FF," Config MAC address is invalid."},\
1195 { 0x0085, 0x00FF," Config rates are invalid."},\
1196 { 0x0086, 0x00FF," Config ordering field is invalid."},\
1197 { 0x0087, 0x00FF," Config scan mode is invalid."},\
1198 { 0x0088, 0x00FF," Config authentication type is invalid."},\
1199 { 0x0089, 0x00FF," Config power save mode is invalid."},\
1200 { 0x008A, 0x00FF," Config radio type is invalid."},\
1201 { 0x008B, 0x00FF," Config diversity is invalid."},\
1202 { 0x008C, 0x00FF," Config SSID list is invalid."},\
1203 { 0x008D, 0x00FF," Config specified AP list is invalid."},\
1204 { 0x0000, 0x00FF, NULL}\
1205 };
1206
1207 #define awc_reply_command_failed( status) ((status & 0x7F00) == 0x7F)
1208
1209
1210 /************************* PHY and TEST commands ****************/
1211
1212
1213 // this might be wrong and reading is not implemented(was not in spec properly)
1214 #define awc_Set_PLCP_Word(PLCP_Word)\
1215 awc_command_Set_Phy_register(base,0x8000,0 ,PLCP_Word)
1216 #define awc_Set_TX_Test_Freq(Tx_Test_Freq)\
1217 awc_command_Set_Phy_register(base,0x8002,0 ,Tx_Test_Freq)
1218 #define awc_Set_Tx_Power(Tx_Power)\
1219 awc_command_Set_Phy_register(base,0x8004,0 ,Tx_Power)
1220 #define awc_Set_RSSI_Treshold(RSSI_Treshold)\
1221 awc_command_Set_Phy_register(base,0x8006,0 ,RSSI_Treshold)
1222 #define awc_Get_PLCP_Word(PLCP_Word)\
1223 awc_command_Set_Phy_register(base,0x8000,0 ,0)
1224 #define awc_Get_TX_Test_Freq(Tx_Test_Freq)\
1225 awc_command_Set_Phy_register(base,0x8002,0 ,0)
1226 #define awc_Get_Tx_Power(Tx_Power)\
1227 awc_command_Set_Phy_register(base,0x8004,0 ,0)
1228 #define awc_Get_RSSI_Treshold(RSSI_Treshold)\
1229 awc_command_Set_Phy_register(base,0x8006,0 ,0)
1230
1231
1232 #define awc_tx_test_code_end 0x0000 // Ends the transmitter test
1233 #define awc_tx_test_code_loop 0x0001 // Loop back to the beginning of the commands
1234 #define awc_tx_test_code_start 0x0002 // Start transmitting
1235 #define awc_tx_test_code_stop 0x0003 // Stop transmitting
1236 #define awc_tx_test_code_delayu 0x0004 // Delay for N usec where N is the next word
1237 #define awc_tx_test_code_delayk 0x0005 // Delay for N Kusec where N is the next word
1238 #define awc_tx_test_code_next 0x0006 // Go to the next frequency in the frequency RID
1239 #define awc_tx_test_code_rx 0x0007 // Start receive mode
1240
1241 #define awc_tx_test_code_strings {\
1242 { awc_tx_test_code_end , 0x000f ," Ends the transmitter test"},\
1243 { awc_tx_test_code_loop , 0x000f ," Loop back to the beginning of the commands"},\
1244 { awc_tx_test_code_start , 0x000f ," Start transmitting"},\
1245 { awc_tx_test_code_stop , 0x000f ," Stop transmitting"},\
1246 { awc_tx_test_code_delayu , 0x000f ," Delay for N usec where N is the next word"},\
1247 { awc_tx_test_code_delayk , 0x000f ," Delay for N Kusec where N is the next word"},\
1248 { awc_tx_test_code_next , 0x000f ," Go to the next frequency in the frequency RID"},\
1249 { awc_tx_test_code_rx , 0x000f ," Start receive mode"},\
1250 { 0 , 0x000f ,NULL}\
1251 };
1252
1253
1254
1255 #define AWC_COMMSTAT_HARD_RESET 0x0000001
1256 #define AWC_COMMSTAT_WAKE 0x0000002
1257 #define AWC_COMMSTAT_SOFT_RESET 0x0000004
1258 #define AWC_COMMSTAT_CONFIGURE 0x0000008
1259 #define AWC_COMMSTAT_READ_CONF 0x0000010
1260 #define AWC_COMMSTAT_SAVE_CONF 0x0000020
1261 #define AWC_COMMSTAT_DEALLOC 0x0000040
1262 #define AWC_COMMSTAT_ALLOC_TX 0x0000080
1263 #define AWC_COMMSTAT_ALLOC_TEST 0x0000100
1264 #define AWC_COMMSTAT_ENABLE_MAC 0x0000200
1265 #define AWC_COMMSTAT_ENABLE_RX 0x0000400
1266 #define AWC_COMMSTAT_DISABLE_MAC 0x0000800
1267 #define AWC_COMMSTAT_RX_ACK 0x0001000
1268 #define AWC_COMMSTAT_TX_ACK 0x0002000
1269 #define AWC_COMMSTAT_AWAKEN_ACK 0x0004000
1270 #define AWC_COMMSTAT_TX_FAIL_ACK 0x0008000
1271 #define AWC_COMMSTAT_LINK_ACK 0x0010000
1272 #define AWC_COMMSTAT_CLR_CMD 0x0020000
1273 #define AWC_COMMSTAT_ALLOC_ACK 0x0040000
1274 #define AWC_COMMSTAT_HOST_SLEEP 0x0080000
1275 #define AWC_COMMSTAT_RX 0x0100000
1276 #define AWC_COMMSTAT_TX 0x0200000
1277 #define AWC_COMMSTAT_SLEEP 0x0400000
1278 #define AWC_COMMSTAT_PSP_NODES 0x0800000
1279 #define AWC_COMMSTAT_SET_TX_POWER 0x1000000
1280
1281
1282 /***************************** R I D ***************/
1283
1284 #define AWC_NOF_RIDS 18
1285 extern int awc_rid_setup(struct net_device * dev);
1286
1287 struct aironet4500_rid_selector{
1288 const u16 selector;
1289 const unsigned MAC_Disable_at_write:1;
1290 const unsigned read_only:1;
1291 const unsigned may_change:1;
1292 const char * name;
1293 };
1294
1295
1296
1297
1298
1299 extern const struct aironet4500_rid_selector aironet4500_RID_Select_General_Config;
1300 extern const struct aironet4500_rid_selector aironet4500_RID_Select_SSID_list;
1301 extern const struct aironet4500_rid_selector aironet4500_RID_Select_AP_list ;
1302 extern const struct aironet4500_rid_selector aironet4500_RID_Select_Driver_name;
1303 extern const struct aironet4500_rid_selector aironet4500_RID_Select_Encapsulation;
1304 extern const struct aironet4500_rid_selector aironet4500_RID_Select_Active_Config;
1305 extern const struct aironet4500_rid_selector aironet4500_RID_Select_Capabilities;
1306 extern const struct aironet4500_rid_selector aironet4500_RID_Select_AP_Info ;
1307 extern const struct aironet4500_rid_selector aironet4500_RID_Select_Radio_Info;
1308 extern const struct aironet4500_rid_selector aironet4500_RID_Select_Status ;
1309 extern const struct aironet4500_rid_selector aironet4500_RID_Select_Modulation ;
1310 extern const struct aironet4500_rid_selector aironet4500_RID_Select_WEP_volatile ;
1311 extern const struct aironet4500_rid_selector aironet4500_RID_Select_WEP_nonvolatile ;
1312 extern const struct aironet4500_rid_selector aironet4500_RID_Select_16_stats;
1313 extern const struct aironet4500_rid_selector aironet4500_RID_Select_16_stats_delta;
1314 extern const struct aironet4500_rid_selector aironet4500_RID_Select_16_stats_clear;
1315 extern const struct aironet4500_rid_selector aironet4500_RID_Select_32_stats;
1316 extern const struct aironet4500_rid_selector aironet4500_RID_Select_32_stats_delta;
1317 extern const struct aironet4500_rid_selector aironet4500_RID_Select_32_stats_clear;
1318
1319 #define awc_def_gen_RID(offset,name, bits,mask,value,value_name)\
1320 {&aironet4500_RID_Select_General_Config,offset, bits,1,1,0,0, mask, value, name, value_name}
1321 #define awc_def_SSID_RID(offset,name, bits,mask,value,value_name)\
1322 {&aironet4500_RID_Select_SSID_list,offset, bits,1,1,0,0, mask, value, name, value_name}
1323 #define awc_def_AP_List_RID(offset,name, bits,mask,value,value_name)\
1324 {&aironet4500_RID_Select_AP_list,offset, bits,1,1,0,0, mask, value, name, value_name}
1325 #define awc_def_Dname_RID(offset,name, bits,mask,value,value_name)\
1326 {&aironet4500_RID_Select_Driver_name,offset, bits,1,1,0,0, mask, value, name, value_name}
1327 #define awc_def_act_RID(offset,name, bits,mask,value,value_name)\
1328 {&aironet4500_RID_Select_Active_Config,offset, bits,1,1,0,0, mask, value, name, value_name}
1329 #define awc_def_Cap_RID(offset,name, bits,mask,value,value_name)\
1330 {&aironet4500_RID_Select_Capabilities,offset, bits,1,1,0,0, mask, value, name, value_name}
1331 #define awc_def_AP_RID(offset,name, bits,mask,value,value_name)\
1332 {&aironet4500_RID_Select_AP_Info,offset, bits,1,1,0,0, mask, value, name, value_name}
1333 #define awc_def_Radio_RID(offset,name, bits,mask,value,value_name)\
1334 {&aironet4500_RID_Select_Radio_Info,offset, bits,1,1,0,0, mask, value, name, value_name}
1335 #define awc_def_Stat_RID(offset,name, bits,mask,value,value_name)\
1336 {&aironet4500_RID_Select_Status,offset, bits,1,1,0,0, mask, value, name, value_name}
1337 #define awc_def_Enc_RID(offset,name, bits,mask,value,value_name)\
1338 {&aironet4500_RID_Select_Encapsulation,offset, bits,1,1,0,0, mask, value, name, value_name}
1339
1340 #define awc_def_WEPv_RID(offset,name, bits,mask,value,value_name)\
1341 {&aironet4500_RID_Select_WEP_volatile,offset, bits,1,1,0,0, mask, value, name, value_name}
1342 #define awc_def_WEPnv_RID(offset,name, bits,mask,value,value_name)\
1343 {&aironet4500_RID_Select_WEP_nonvolatile,offset, bits,1,1,0,0, mask, value, name, value_name}
1344 #define awc_def_Modulation_RID(offset,name, bits,mask,value,value_name)\
1345 {&aironet4500_RID_Select_Modulation,offset, bits,1,1,0,0, mask, value, name, value_name}
1346
1347 #define awc_def_Stats_RID(o16,offset,name, value_name)\
1348 {&aironet4500_RID_Select_32_stats,offset, 32,1,1,0,0, 0xffffffff, 0, name, value_name}
1349 #define awc_def_Stats_delta_RID(o16,offset,name, value_name)\
1350 {&aironet4500_RID_Select_32_stats_delta,offset, 32,1,1,0,0, 0xffffffff, 0, name, value_name}
1351 #define awc_def_Stats_clear_RID(o16,offset,name, value_name)\
1352 {&aironet4500_RID_Select_32_stats_delta,offset,32,1,1,0,0, 0xffffffff, 0, name,value_name}
1353
1354 #define awc_def_Stats16_RID(offset,o32,name, value_name)\
1355 {&aironet4500_RID_Select_16_stats,offset, 16,1,1,0,0, 0xffffffff, 0, name, value_name}
1356 #define awc_def_Stats16_delta_RID(offset,o32,name, value_name)\
1357 {&aironet4500_RID_Select_16_stats_delta,offset, 16,1,1,0,0, 0xffffffff, 0, name,value_name}
1358 #define awc_def_Stats16_clear_RID(offset,o32,name, value_name)\
1359 {&aironet4500_RID_Select_16_stats_delta,offset, 16,1,1,0,0, 0xffffffff, 0, name,value_name}
1360
1361
1362 #define aironet4500_RID_Select_strings {\
1363 { 0xFF10, 0xffff, "General Configuration"},\
1364 { 0xFF11, 0xffff, "Valid SSID list" },\
1365 { 0xFF12, 0xffff, "Valid AP list"},\
1366 { 0xFF13, 0xffff, "Driver name"},\
1367 { 0xFF14, 0xffff, "Ethernet Protocol"},\
1368 { 0xFF15, 0xffff, "WEP volatile"},\
1369 { 0xFF16, 0xffff, "WEP nonvolatile"},\
1370 { 0xFF17, 0xffff, "Modulation"},\
1371 { 0xFF20, 0xffff, "Actual Configuration"},\
1372 { 0xFF00, 0xffff, "Capabilities"},\
1373 { 0xFF01, 0xffff, "AP Info"},\
1374 { 0xFF02, 0xffff, "Radio Info"},\
1375 { 0xFF50, 0xffff, "Status"},\
1376 { 0xFF60, 0xffff, "Cumulative 16-bit Statistics"},\
1377 { 0xFF61, 0xffff, "Delta 16-bit Statistics"},\
1378 { 0xFF62, 0xffff, "Delta 16-bit Statistics and Clear"},\
1379 { 0xFF68, 0xffff, "Cumulative 32-bit Statistics"},\
1380 { 0xFF69, 0xffff, "Delta 32-bit Statistics "},\
1381 { 0xFF6A, 0xffff, "Delta 32-bit Statistics and Clear"},\
1382 { 0x0000, 0xffff, NULL}\
1383 }
1384
1385
1386
1387
1388
1389 struct aironet4500_RID {
1390 const struct aironet4500_rid_selector * selector;
1391 const u32 offset;
1392 const u8 bits;
1393 const u8 array;
1394 const u32 units;
1395 const unsigned read_only:1;
1396 const unsigned null_terminated:1;
1397 const u32 mask;
1398 const u32 value;
1399 const char * name;
1400 const char * value_name;
1401
1402 };
1403
1404 struct aironet4500_RID_names{
1405 struct aironet4500_RID rid;
1406 char *name;
1407 };
1408
1409 struct aironet4500_RID_names_values{
1410 struct aironet4500_RID rid;
1411 char *name;
1412 u32 mask;
1413 };
1414
1415 struct awc_rid_dir{
1416 const struct aironet4500_rid_selector * selector;
1417 const int size;
1418 const struct aironet4500_RID * rids;
1419 struct net_device * dev ;
1420 void * buff;
1421 int bufflen; // just checking
1422 };
1423
1424 extern int awc_nof_rids;
1425 extern struct awc_rid_dir awc_rids[];
1426
1427
1428
1429
1430
1431 struct awc_private {
1432 dev_node_t node; // somewhere back in times PCMCIA needed that
1433
1434 int dummy_test; // left for cleanup
1435 // card rid inmemory copy
1436 struct awc_config config; // card RID mirrors
1437 struct awc_config general_config; //
1438 struct awc_SSIDs SSIDs;
1439 struct awc_fixed_APs fixed_APs;
1440 struct awc_driver_name driver_name;
1441 struct awc_enc_trans enc_trans;
1442 struct awc_cap capabilities;
1443 struct awc_status status;
1444 struct awc_AP AP;
1445 struct awc_Statistics_32 statistics;
1446 struct awc_Statistics_32 statistics_delta;
1447 struct awc_Statistics_32 statistics_delta_clear;
1448 struct awc_Statistics_16 statistics16;
1449 struct awc_Statistics_16 statistics16_delta;
1450 struct awc_Statistics_16 statistics16_delta_clear;
1451 struct awc_wep_key wep_volatile;
1452 struct awc_wep_key wep_nonvolatile;
1453 struct awc_modulation modulation;
1454
1455 // here are just references to rids
1456 struct awc_rid_dir rid_dir[AWC_NOF_RIDS];
1457 int rids_read;
1458
1459
1460 struct awc_bap bap0;
1461 struct awc_bap bap1;
1462 int sleeping_bap;
1463
1464 struct awc_fid_queue tx_small_ready;
1465 struct awc_fid_queue tx_large_ready;
1466 struct awc_fid_queue tx_post_process;
1467 struct awc_fid_queue tx_in_transmit;
1468 my_spinlock_t queues_lock;
1469
1470 struct awc_fid_queue rx_ready;
1471 struct awc_fid_queue rx_post_process;
1472
1473
1474
1475 struct semaphore tx_buff_semaphore;
1476 volatile int tx_buffs_in_use;
1477 volatile int tx_small_buffs_in_use;
1478 volatile int tx_buffs_total;
1479 volatile int tx_small_buffs_total;
1480 int large_buff_mem;
1481 int small_buff_no;
1482
1483 volatile int mac_enabled;
1484 u16 link_status;
1485 u8 link_status_changed;
1486
1487 volatile int ejected;
1488 volatile int bh_running;
1489 volatile int bh_active;
1490 volatile long tx_chain_active;
1491 volatile u16 enabled_interrupts;
1492 volatile u16 waiting_interrupts;
1493 volatile int interrupt_count;
1494
1495 // Command serialize stuff
1496 //changed to spinlock struct semaphore command_semaphore;
1497 my_spinlock_t both_bap_spinlock; // on SMP, card should theorethically live without that
1498 unsigned long both_bap_spinlock_flags;
1499 my_spinlock_t bap_setup_spinlock; // on SMP, card should theoretically live without that
1500 unsigned long bap_setup_spinlock_flags;
1501 my_spinlock_t command_issuing_spinlock;
1502 unsigned long command_issuing_spinlock_flags;
1503 my_spinlock_t interrupt_spinlock;
1504
1505 volatile int unlock_command_postponed;
1506 struct awc_command cmd;
1507 long long async_command_start;
1508 volatile int command_semaphore_on;
1509 struct tq_struct immediate_bh;
1510 volatile int process_tx_results;
1511
1512 u8 p2p[6];
1513 u8 bssid[6];
1514 int p2p_uc;
1515 int p2p_found;
1516 int p802_11_send;
1517 int simple_bridge;
1518 int force_rts_on_shorter;
1519 int force_tx_rate;
1520 int ip_tos_reliability_rts;
1521 int ip_tos_troughput_no_retries;
1522 int full_stats;
1523 int debug;
1524
1525 struct net_device_stats stats;
1526
1527 struct ctl_table * proc_table;
1528
1529 void * bus;
1530 int card_type;
1531 };
1532
1533 extern int awc_init(struct net_device * dev);
1534 extern void awc_reset(struct net_device *dev);
1535 extern int awc_config(struct net_device *dev);
1536 extern int awc_open(struct net_device *dev);
1537 extern void awc_tx_timeout(struct net_device *dev);
1538 extern int awc_start_xmit(struct sk_buff *, struct net_device *);
1539 extern void awc_interrupt(int irq, void *dev_id, struct pt_regs *regs);
1540 extern struct net_device_stats * awc_get_stats(struct net_device *dev);
1541 extern int awc_rx(struct net_device *dev, struct awc_fid * rx_fid);
1542 extern void awc_set_multicast_list(struct net_device *dev);
1543 extern int awc_change_mtu(struct net_device *dev, int new_mtu);
1544 extern int awc_close(struct net_device *dev);
1545 extern int awc_private_init(struct net_device * dev);
1546 extern int awc_register_proc(int (*awc_proc_set_device) (int),int (*awc_proc_unset_device)(int));
1547 extern int awc_unregister_proc(void);
1548 extern int (* awc_proc_set_fun) (int) ;
1549 extern int (* awc_proc_unset_fun) (int) ;
1550 extern int awc_interrupt_process(struct net_device * dev);
1551 extern int awc_readrid(struct net_device * dev, struct aironet4500_RID * rid, void *pBuf );
1552 extern int awc_writerid(struct net_device * dev, struct aironet4500_RID * rid, void *pBuf);
1553 extern int awc_readrid_dir(struct net_device * dev, struct awc_rid_dir * rid );
1554 extern int awc_writerid_dir(struct net_device * dev, struct awc_rid_dir * rid);
1555 extern int awc_tx_alloc(struct net_device * dev) ;
1556 extern int awc_tx_dealloc(struct net_device * dev);
1557 extern struct awc_fid *awc_tx_fid_lookup(struct net_device * dev, u16 fid);
1558 extern int awc_issue_soft_reset(struct net_device * dev);
1559 extern int awc_issue_noop(struct net_device * dev);
1560 extern int awc_dump_registers(struct net_device * dev);
1561 extern unsigned short awc_issue_command_and_block(struct awc_command * cmd);
1562 extern int awc_enable_MAC(struct net_device * dev);
1563 extern int awc_disable_MAC(struct net_device * dev);
1564 extern int awc_read_all_rids(struct net_device * dev);
1565 extern int awc_write_all_rids(struct net_device * dev);
1566 extern int awc_receive_packet(struct net_device * dev);
1567 extern int awc_transmit_packet(struct net_device * dev, struct awc_fid * tx_buff) ;
1568 extern int awc_tx_complete_check(struct net_device * dev);
1569 extern int awc_interrupt_process(struct net_device * dev);
1570 extern void awc_bh(struct net_device *dev);
1571 extern int awc_802_11_find_copy_path(struct net_device * dev, struct awc_fid * rx_buff);
1572 extern void awc_802_11_router_rx(struct net_device * dev,struct awc_fid * rx_buff);
1573 extern int awc_802_11_tx_find_path_and_post(struct net_device * dev, struct sk_buff * skb);
1574 extern void awc_802_11_after_tx_packet_to_card_write(struct net_device * dev, struct awc_fid * tx_buff);
1575 extern void awc_802_11_after_failed_tx_packet_to_card_write(struct net_device * dev,struct awc_fid * tx_buff);
1576 extern void awc_802_11_after_tx_complete(struct net_device * dev, struct awc_fid * tx_buff);
1577 extern void awc_802_11_failed_rx_copy(struct net_device * dev,struct awc_fid * rx_buff);
1578 extern int awc_tx_alloc(struct net_device * dev) ;
1579 extern int awc_tx_dealloc_fid(struct net_device * dev,struct awc_fid * fid);
1580 extern int awc_tx_dealloc(struct net_device * dev);
1581 extern struct awc_fid *
1582 awc_tx_fid_lookup_and_remove(struct net_device * dev, u16 fid_handle);
1583 extern int awc_queues_init(struct net_device * dev);
1584 extern int awc_queues_destroy(struct net_device * dev);
1585 extern int awc_rids_setup(struct net_device * dev);
1586
1587
1588
1589 extern int awc_debug;
1590 extern int bap_sleep ;
1591 extern int bap_sleep_after_setup ;
1592 extern int sleep_before_command ;
1593 extern int bap_sleep_before_write;
1594 extern int sleep_in_command ;
1595 extern int both_bap_lock;
1596 extern int bap_setup_spinlock;
1597 extern int tx_queue_len ;
1598 extern int tx_rate;
1599 extern int awc_full_stats;
1600
1601 #define MAX_AWCS 4
1602 extern struct net_device * aironet4500_devices[MAX_AWCS];
1603
1604 #define AWC_DEBUG 1
1605
1606 #ifdef AWC_DEBUG
1607 #define DEBUG(a,args...) if (awc_debug & a) printk( args)
1608 #define AWC_ENTRY_EXIT_DEBUG(a) if (awc_debug & 8) printk( a)
1609 #else
1610 #define DEBUG(a, args...)
1611 #define AWC_ENTRY_EXIT_DEBUG(a)
1612 #endif
1613
1614 #endif /* AIRONET4500_H */
1615
This page was automatically generated by the
LXR engine.
Visit the LXR main site for more
information.