1 /*
2 * acenic.c: Linux driver for the Alteon AceNIC Gigabit Ethernet card
3 * and other Tigon based cards.
4 *
5 * Copyright 1998-2000 by Jes Sorensen, <jes@linuxcare.com>.
6 *
7 * Thanks to Alteon and 3Com for providing hardware and documentation
8 * enabling me to write this driver.
9 *
10 * A mailing list for discussing the use of this driver has been
11 * setup, please subscribe to the lists if you have any questions
12 * about the driver. Send mail to linux-acenic-help@sunsite.auc.dk to
13 * see how to subscribe.
14 *
15 * This program is free software; you can redistribute it and/or modify
16 * it under the terms of the GNU General Public License as published by
17 * the Free Software Foundation; either version 2 of the License, or
18 * (at your option) any later version.
19 *
20 * Additional credits:
21 * Pete Wyckoff <wyckoff@ca.sandia.gov>: Initial Linux/Alpha and trace
22 * dump support. The trace dump support has not been
23 * integrated yet however.
24 * Troy Benjegerdes: Big Endian (PPC) patches.
25 * Nate Stahl: Better out of memory handling and stats support.
26 * Aman Singla: Nasty race between interrupt handler and tx code dealing
27 * with 'testing the tx_ret_csm and setting tx_full'
28 * David S. Miller <davem@redhat.com>: conversion to new PCI dma mapping
29 * infrastructure and Sparc support
30 * Pierrick Pinasseau (CERN): For lending me an Ultra 5 to test the
31 * driver under Linux/Sparc64
32 * Matt Domsch <Matt_Domsch@dell.com>: Detect Alteon 1000baseT cards
33 * Chip Salzenberg <chip@valinux.com>: Fix race condition between tx
34 * handler and close() cleanup.
35 * Ken Aaker <kdaaker@rchland.vnet.ibm.com>: Correct check for whether
36 * memory mapped IO is enabled to
37 * make the driver work on RS/6000.
38 * Takayoshi Kouchi <kouchi@hpc.bs1.fc.nec.co.jp>: Identifying problem
39 * where the driver would disable
40 * bus master mode if it had to disable
41 * write and invalidate.
42 * Stephen Hack <stephen_hack@hp.com>: Fixed ace_set_mac_addr for little
43 * endian systems.
44 * Val Henson <vhenson@esscom.com>: Reset Jumbo skb producer and
45 * rx producer index when
46 * flushing the Jumbo ring.
47 */
48
49 #include <linux/config.h>
50 #include <linux/module.h>
51 #include <linux/version.h>
52 #include <linux/types.h>
53 #include <linux/errno.h>
54 #include <linux/ioport.h>
55 #include <linux/pci.h>
56 #include <linux/kernel.h>
57 #include <linux/netdevice.h>
58 #include <linux/etherdevice.h>
59 #include <linux/skbuff.h>
60 #include <linux/init.h>
61 #include <linux/delay.h>
62 #include <linux/mm.h>
63 #include <linux/sockios.h>
64
65 #ifdef SIOCETHTOOL
66 #include <linux/ethtool.h>
67 #endif
68
69 #include <net/sock.h>
70 #include <net/ip.h>
71
72 #include <asm/system.h>
73 #include <asm/io.h>
74 #include <asm/irq.h>
75 #include <asm/byteorder.h>
76 #include <asm/uaccess.h>
77
78
79 #undef INDEX_DEBUG
80 #define TX_HOST_RING 1
81
82 #ifdef CONFIG_ACENIC_OMIT_TIGON_I
83 #define ACE_IS_TIGON_I(ap) 0
84 #else
85 #define ACE_IS_TIGON_I(ap) (ap->version == 1)
86 #endif
87
88 #ifndef PCI_VENDOR_ID_ALTEON
89 #define PCI_VENDOR_ID_ALTEON 0x12ae
90 #endif
91 #ifndef PCI_DEVICE_ID_ALTEON_ACENIC_FIBRE
92 #define PCI_DEVICE_ID_ALTEON_ACENIC_FIBRE 0x0001
93 #define PCI_DEVICE_ID_ALTEON_ACENIC_COPPER 0x0002
94 #endif
95 #ifndef PCI_DEVICE_ID_3COM_3C985
96 #define PCI_DEVICE_ID_3COM_3C985 0x0001
97 #endif
98 #ifndef PCI_VENDOR_ID_NETGEAR
99 #define PCI_VENDOR_ID_NETGEAR 0x1385
100 #define PCI_DEVICE_ID_NETGEAR_GA620 0x620a
101 #endif
102 #ifndef PCI_DEVICE_ID_NETGEAR_GA620T
103 #define PCI_DEVICE_ID_NETGEAR_GA620T 0x630a
104 #endif
105
106
107 /*
108 * Farallon used the DEC vendor ID by mistake and they seem not
109 * to care - stinky!
110 */
111 #ifndef PCI_DEVICE_ID_FARALLON_PN9000SX
112 #define PCI_DEVICE_ID_FARALLON_PN9000SX 0x1a
113 #endif
114 #ifndef PCI_VENDOR_ID_SGI
115 #define PCI_VENDOR_ID_SGI 0x10a9
116 #endif
117 #ifndef PCI_DEVICE_ID_SGI_ACENIC
118 #define PCI_DEVICE_ID_SGI_ACENIC 0x0009
119 #endif
120
121 #if LINUX_VERSION_CODE >= 0x20400
122 static struct pci_device_id acenic_pci_tbl[] __initdata = {
123 { PCI_VENDOR_ID_ALTEON, PCI_DEVICE_ID_ALTEON_ACENIC_FIBRE,
124 PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_NETWORK_ETHERNET << 8, 0xffff00, },
125 { PCI_VENDOR_ID_ALTEON, PCI_DEVICE_ID_ALTEON_ACENIC_COPPER,
126 PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_NETWORK_ETHERNET << 8, 0xffff00, },
127 { PCI_VENDOR_ID_3COM, PCI_DEVICE_ID_3COM_3C985,
128 PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_NETWORK_ETHERNET << 8, 0xffff00, },
129 { PCI_VENDOR_ID_NETGEAR, PCI_DEVICE_ID_NETGEAR_GA620,
130 PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_NETWORK_ETHERNET << 8, 0xffff00, },
131 { PCI_VENDOR_ID_NETGEAR, PCI_DEVICE_ID_NETGEAR_GA620T,
132 PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_NETWORK_ETHERNET << 8, 0xffff00, },
133 /*
134 * Farallon used the DEC vendor ID on their cards incorrectly.
135 */
136 { PCI_VENDOR_ID_DEC, PCI_DEVICE_ID_FARALLON_PN9000SX,
137 PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_NETWORK_ETHERNET << 8, 0xffff00, },
138 { PCI_VENDOR_ID_SGI, PCI_DEVICE_ID_SGI_ACENIC,
139 PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_NETWORK_ETHERNET << 8, 0xffff00, },
140 { }
141 };
142 MODULE_DEVICE_TABLE(pci, acenic_pci_tbl);
143 #endif
144
145
146 #ifndef wmb
147 #define wmb() mb()
148 #endif
149
150 #ifndef __exit
151 #define __exit
152 #endif
153
154 #ifndef SMP_CACHE_BYTES
155 #define SMP_CACHE_BYTES L1_CACHE_BYTES
156 #endif
157
158 #if (BITS_PER_LONG == 64)
159 #define ACE_64BIT_PTR 1
160 #endif
161
162 #ifndef SET_MODULE_OWNER
163 #define SET_MODULE_OWNER(dev) {do{} while(0);}
164 #define ACE_MOD_INC_USE_COUNT MOD_INC_USE_COUNT
165 #define ACE_MOD_DEC_USE_COUNT MOD_DEC_USE_COUNT
166 #else
167 #define ACE_MOD_INC_USE_COUNT {do{} while(0);}
168 #define ACE_MOD_DEC_USE_COUNT {do{} while(0);}
169 #endif
170
171
172 #if (LINUX_VERSION_CODE < 0x02030d)
173 #define pci_resource_start(dev, bar) dev->base_address[bar]
174 #elif (LINUX_VERSION_CODE < 0x02032c)
175 #define pci_resource_start(dev, bar) dev->resource[bar].start
176 #endif
177
178 #if (LINUX_VERSION_CODE < 0x02030e)
179 #define net_device device
180 #endif
181
182 #if (LINUX_VERSION_CODE < 0x02032a)
183 typedef u32 dma_addr_t;
184
185 static inline void *pci_alloc_consistent(struct pci_dev *hwdev, size_t size,
186 dma_addr_t *dma_handle)
187 {
188 void *virt_ptr;
189
190 virt_ptr = kmalloc(size, GFP_KERNEL);
191 *dma_handle = virt_to_bus(virt_ptr);
192 return virt_ptr;
193 }
194 #define pci_free_consistent(cookie, size, ptr, dma_ptr) kfree(ptr)
195 #define pci_map_single(cookie, address, size, dir) virt_to_bus(address)
196 #define pci_unmap_single(cookie, address, size, dir)
197 #endif
198
199 #if (LINUX_VERSION_CODE < 0x02032b)
200 /*
201 * SoftNet
202 *
203 * For pre-softnet kernels we need to tell the upper layer not to
204 * re-enter start_xmit() while we are in there. However softnet
205 * guarantees not to enter while we are in there so there is no need
206 * to do the netif_stop_queue() dance unless the transmit queue really
207 * gets stuck. This should also improve performance according to tests
208 * done by Aman Singla.
209 */
210 #define dev_kfree_skb_irq(a) dev_kfree_skb(a)
211 #define netif_wake_queue(dev) clear_bit(0, &dev->tbusy)
212 #define netif_stop_queue(dev) set_bit(0, &dev->tbusy)
213 #define late_stop_netif_stop_queue(dev) {do{} while(0);}
214 #define early_stop_netif_stop_queue(dev) test_and_set_bit(0,&dev->tbusy)
215 #define early_stop_netif_wake_queue(dev) netif_wake_queue(dev)
216
217 static inline void netif_start_queue(struct net_device *dev)
218 {
219 dev->tbusy = 0;
220 dev->interrupt = 0;
221 dev->start = 1;
222 }
223
224 #define ace_mark_net_bh() mark_bh(NET_BH)
225 #define netif_queue_stopped(dev) dev->tbusy
226 #define netif_running(dev) dev->start
227 #define ace_if_down(dev) {do{dev->start = 0;} while(0);}
228
229 #define tasklet_struct tq_struct
230 static inline void tasklet_schedule(struct tasklet_struct *tasklet)
231 {
232 queue_task(tasklet, &tq_immediate);
233 mark_bh(IMMEDIATE_BH);
234 }
235
236 static inline void tasklet_init(struct tasklet_struct *tasklet,
237 void (*func)(unsigned long),
238 unsigned long data)
239 {
240 tasklet->next = NULL;
241 tasklet->sync = 0;
242 tasklet->routine = (void (*)(void *))func;
243 tasklet->data = (void *)data;
244 }
245 #define tasklet_kill(tasklet) {do{} while(0);}
246 #else
247 #define late_stop_netif_stop_queue(dev) netif_stop_queue(dev)
248 #define early_stop_netif_stop_queue(dev) 0
249 #define early_stop_netif_wake_queue(dev) {do{} while(0);}
250 #define ace_mark_net_bh() {do{} while(0);}
251 #define ace_if_down(dev) {do{} while(0);}
252 #endif
253
254 #if (LINUX_VERSION_CODE >= 0x02031b)
255 #define NEW_NETINIT
256 #define ACE_PROBE_ARG void
257 #else
258 #define ACE_PROBE_ARG struct net_device *dev
259 #endif
260
261 #define ACE_MAX_MOD_PARMS 8
262 #define BOARD_IDX_STATIC 0
263 #define BOARD_IDX_OVERFLOW -1
264
265
266 #include "acenic.h"
267
268 /*
269 * These must be defined before the firmware is included.
270 */
271 #define MAX_TEXT_LEN 96*1024
272 #define MAX_RODATA_LEN 8*1024
273 #define MAX_DATA_LEN 2*1024
274
275 #include "acenic_firmware.h"
276
277 /*
278 * This driver currently supports Tigon I and Tigon II based cards
279 * including the Alteon AceNIC, the 3Com 3C985[B] and NetGear
280 * GA620. The driver should also work on the SGI, DEC and Farallon
281 * versions of the card, however I have not been able to test that
282 * myself.
283 *
284 * This card is really neat, it supports receive hardware checksumming
285 * and jumbo frames (up to 9000 bytes) and does a lot of work in the
286 * firmware. Also the programming interface is quite neat, except for
287 * the parts dealing with the i2c eeprom on the card ;-)
288 *
289 * Using jumbo frames:
290 *
291 * To enable jumbo frames, simply specify an mtu between 1500 and 9000
292 * bytes to ifconfig. Jumbo frames can be enabled or disabled at any time
293 * by running `ifconfig eth<X> mtu <MTU>' with <X> being the Ethernet
294 * interface number and <MTU> being the MTU value.
295 *
296 * Module parameters:
297 *
298 * When compiled as a loadable module, the driver allows for a number
299 * of module parameters to be specified. The driver supports the
300 * following module parameters:
301 *
302 * trace=<val> - Firmware trace level. This requires special traced
303 * firmware to replace the firmware supplied with
304 * the driver - for debugging purposes only.
305 *
306 * link=<val> - Link state. Normally you want to use the default link
307 * parameters set by the driver. This can be used to
308 * override these in case your switch doesn't negotiate
309 * the link properly. Valid values are:
310 * 0x0001 - Force half duplex link.
311 * 0x0002 - Do not negotiate line speed with the other end.
312 * 0x0010 - 10Mbit/sec link.
313 * 0x0020 - 100Mbit/sec link.
314 * 0x0040 - 1000Mbit/sec link.
315 * 0x0100 - Do not negotiate flow control.
316 * 0x0200 - Enable RX flow control Y
317 * 0x0400 - Enable TX flow control Y (Tigon II NICs only).
318 * Default value is 0x0270, ie. enable link+flow
319 * control negotiation. Negotiating the highest
320 * possible link speed with RX flow control enabled.
321 *
322 * When disabling link speed negotiation, only one link
323 * speed is allowed to be specified!
324 *
325 * tx_coal_tick=<val> - number of coalescing clock ticks (us) allowed
326 * to wait for more packets to arive before
327 * interrupting the host, from the time the first
328 * packet arrives.
329 *
330 * rx_coal_tick=<val> - number of coalescing clock ticks (us) allowed
331 * to wait for more packets to arive in the transmit ring,
332 * before interrupting the host, after transmitting the
333 * first packet in the ring.
334 *
335 * max_tx_desc=<val> - maximum number of transmit descriptors
336 * (packets) transmitted before interrupting the host.
337 *
338 * max_rx_desc=<val> - maximum number of receive descriptors
339 * (packets) received before interrupting the host.
340 *
341 * tx_ratio=<val> - 7 bit value (0 - 63) specifying the split in 64th
342 * increments of the NIC's on board memory to be used for
343 * transmit and receive buffers. For the 1MB NIC app. 800KB
344 * is available, on the 1/2MB NIC app. 300KB is available.
345 * 68KB will always be available as a minimum for both
346 * directions. The default value is a 50/50 split.
347 * dis_pci_mem_inval=<val> - disable PCI memory write and invalidate
348 * operations, default (1) is to always disable this as
349 * that is what Alteon does on NT. I have not been able
350 * to measure any real performance differences with
351 * this on my systems. Set <val>=0 if you want to
352 * enable these operations.
353 *
354 * If you use more than one NIC, specify the parameters for the
355 * individual NICs with a comma, ie. trace=0,0x00001fff,0 you want to
356 * run tracing on NIC #2 but not on NIC #1 and #3.
357 *
358 * TODO:
359 *
360 * - Proper multicast support.
361 * - NIC dump support.
362 * - More tuning parameters.
363 *
364 * The mini ring is not used under Linux and I am not sure it makes sense
365 * to actually use it.
366 *
367 * New interrupt handler strategy:
368 *
369 * The old interrupt handler worked using the traditional method of
370 * replacing an skbuff with a new one when a packet arrives. However
371 * the rx rings do not need to contain a static number of buffer
372 * descriptors, thus it makes sense to move the memory allocation out
373 * of the main interrupt handler and do it in a bottom half handler
374 * and only allocate new buffers when the number of buffers in the
375 * ring is below a certain threshold. In order to avoid starving the
376 * NIC under heavy load it is however necessary to force allocation
377 * when hitting a minimum threshold. The strategy for alloction is as
378 * follows:
379 *
380 * RX_LOW_BUF_THRES - allocate buffers in the bottom half
381 * RX_PANIC_LOW_THRES - we are very low on buffers, allocate
382 * the buffers in the interrupt handler
383 * RX_RING_THRES - maximum number of buffers in the rx ring
384 * RX_MINI_THRES - maximum number of buffers in the mini ring
385 * RX_JUMBO_THRES - maximum number of buffers in the jumbo ring
386 *
387 * One advantagous side effect of this allocation approach is that the
388 * entire rx processing can be done without holding any spin lock
389 * since the rx rings and registers are totally independant of the tx
390 * ring and its registers. This of course includes the kmalloc's of
391 * new skb's. Thus start_xmit can run in parallel with rx processing
392 * and the memory allocation on SMP systems.
393 *
394 * Note that running the skb reallocation in a bottom half opens up
395 * another can of races which needs to be handled properly. In
396 * particular it can happen that the interrupt handler tries to run
397 * the reallocation while the bottom half is either running on another
398 * CPU or was interrupted on the same CPU. To get around this the
399 * driver uses bitops to prevent the reallocation routines from being
400 * reentered.
401 *
402 * TX handling can also be done without holding any spin lock, wheee
403 * this is fun! since tx_ret_csm is only written to by the interrupt
404 * handler. The case to be aware of is when shutting down the device
405 * and cleaning up where it is necessary to make sure that
406 * start_xmit() is not running while this is happening. Well DaveM
407 * informs me that this case is already protected against ... bye bye
408 * Mr. Spin Lock, it was nice to know you.
409 *
410 * TX interrupts are now partly disabled so the NIC will only generate
411 * TX interrupts for the number of coal ticks, not for the number of
412 * TX packets in the queue. This should reduce the number of TX only,
413 * ie. when no RX processing is done, interrupts seen.
414 */
415
416 /*
417 * Threshold values for RX buffer allocation - the low water marks for
418 * when to start refilling the rings are set to 75% of the ring
419 * sizes. It seems to make sense to refill the rings entirely from the
420 * intrrupt handler once it gets below the panic threshold, that way
421 * we don't risk that the refilling is moved to another CPU when the
422 * one running the interrupt handler just got the slab code hot in its
423 * cache.
424 */
425 #define RX_RING_SIZE 72
426 #define RX_MINI_SIZE 64
427 #define RX_JUMBO_SIZE 48
428
429 #define RX_PANIC_STD_THRES 16
430 #define RX_PANIC_STD_REFILL (3*RX_PANIC_STD_THRES)/2
431 #define RX_LOW_STD_THRES (3*RX_RING_SIZE)/4
432 #define RX_PANIC_MINI_THRES 12
433 #define RX_PANIC_MINI_REFILL (3*RX_PANIC_MINI_THRES)/2
434 #define RX_LOW_MINI_THRES (3*RX_MINI_SIZE)/4
435 #define RX_PANIC_JUMBO_THRES 6
436 #define RX_PANIC_JUMBO_REFILL (3*RX_PANIC_JUMBO_THRES)/2
437 #define RX_LOW_JUMBO_THRES (3*RX_JUMBO_SIZE)/4
438
439
440 /*
441 * Size of the mini ring entries, basically these just should be big
442 * enough to take TCP ACKs
443 */
444 #define ACE_MINI_SIZE 100
445
446 #define ACE_MINI_BUFSIZE (ACE_MINI_SIZE + 2 + 16)
447 #define ACE_STD_BUFSIZE (ACE_STD_MTU + ETH_HLEN + 2+4+16)
448 #define ACE_JUMBO_BUFSIZE (ACE_JUMBO_MTU + ETH_HLEN + 2+4+16)
449
450 /*
451 * There seems to be a magic difference in the effect between 995 and 996
452 * but little difference between 900 and 995 ... no idea why.
453 *
454 * There is now a default set of tuning parameters which is set, depending
455 * on whether or not the user enables Jumbo frames. It's assumed that if
456 * Jumbo frames are enabled, the user wants optimal tuning for that case.
457 */
458 #define DEF_TX_COAL 400 /* 996 */
459 #define DEF_TX_MAX_DESC 40
460 #define DEF_RX_COAL 120 /* 1000 */
461 #define DEF_RX_MAX_DESC 25
462 #define DEF_TX_RATIO 21 /* 24 */
463
464 #define DEF_JUMBO_TX_COAL 20
465 #define DEF_JUMBO_TX_MAX_DESC 60
466 #define DEF_JUMBO_RX_COAL 30
467 #define DEF_JUMBO_RX_MAX_DESC 6
468 #define DEF_JUMBO_TX_RATIO 21
469
470 #define TX_COAL_INTS_ONLY 0 /* seems not worth it */
471 #define DEF_TRACE 0
472 #define DEF_STAT (2 * TICKS_PER_SEC)
473
474 static int link[ACE_MAX_MOD_PARMS];
475 static int trace[ACE_MAX_MOD_PARMS];
476 static int tx_coal_tick[ACE_MAX_MOD_PARMS];
477 static int rx_coal_tick[ACE_MAX_MOD_PARMS];
478 static int max_tx_desc[ACE_MAX_MOD_PARMS];
479 static int max_rx_desc[ACE_MAX_MOD_PARMS];
480 static int tx_ratio[ACE_MAX_MOD_PARMS];
481 static int dis_pci_mem_inval[ACE_MAX_MOD_PARMS] = {1, 1, 1, 1, 1, 1, 1, 1};
482
483 static char version[] __initdata =
484 "acenic.c: v0.49 12/13/2000 Jes Sorensen, linux-acenic@SunSITE.auc.dk\n"
485 " http://home.cern.ch/~jes/gige/acenic.html\n";
486
487 static struct net_device *root_dev = NULL;
488
489 static int probed __initdata = 0;
490
491
492 int __init acenic_probe (ACE_PROBE_ARG)
493 {
494 #ifdef NEW_NETINIT
495 struct net_device *dev;
496 #endif
497
498 struct ace_private *ap;
499 struct pci_dev *pdev = NULL;
500 int boards_found = 0;
501 int version_disp;
502
503 if (probed)
504 return -ENODEV;
505 probed++;
506
507 if (!pci_present()) /* is PCI support present? */
508 return -ENODEV;
509
510 version_disp = 0;
511
512 while ((pdev = pci_find_class(PCI_CLASS_NETWORK_ETHERNET<<8, pdev))) {
513
514 if (!((pdev->vendor == PCI_VENDOR_ID_ALTEON) &&
515 ((pdev->device == PCI_DEVICE_ID_ALTEON_ACENIC_FIBRE) ||
516 (pdev->device == PCI_DEVICE_ID_ALTEON_ACENIC_COPPER)))&&
517 !((pdev->vendor == PCI_VENDOR_ID_3COM) &&
518 (pdev->device == PCI_DEVICE_ID_3COM_3C985)) &&
519 !((pdev->vendor == PCI_VENDOR_ID_NETGEAR) &&
520 ((pdev->device == PCI_DEVICE_ID_NETGEAR_GA620) ||
521 (pdev->device == PCI_DEVICE_ID_NETGEAR_GA620T))) &&
522 /*
523 * Farallon used the DEC vendor ID on their cards by
524 * mistake for a while
525 */
526 !((pdev->vendor == PCI_VENDOR_ID_DEC) &&
527 (pdev->device == PCI_DEVICE_ID_FARALLON_PN9000SX)) &&
528 !((pdev->vendor == PCI_VENDOR_ID_SGI) &&
529 (pdev->device == PCI_DEVICE_ID_SGI_ACENIC)))
530 continue;
531
532 dev = init_etherdev(NULL, sizeof(struct ace_private));
533
534 if (dev == NULL) {
535 printk(KERN_ERR "acenic: Unable to allocate "
536 "net_device structure!\n");
537 break;
538 }
539
540 SET_MODULE_OWNER(dev);
541
542 if (!dev->priv)
543 dev->priv = kmalloc(sizeof(*ap), GFP_KERNEL);
544 if (!dev->priv) {
545 printk(KERN_ERR "acenic: Unable to allocate memory\n");
546 return -ENOMEM;
547 }
548
549 ap = dev->priv;
550 ap->pdev = pdev;
551
552 dev->irq = pdev->irq;
553 dev->open = &ace_open;
554 dev->hard_start_xmit = &ace_start_xmit;
555 dev->stop = &ace_close;
556 dev->get_stats = &ace_get_stats;
557 dev->set_multicast_list = &ace_set_multicast_list;
558 dev->do_ioctl = &ace_ioctl;
559 dev->set_mac_address = &ace_set_mac_addr;
560 dev->change_mtu = &ace_change_mtu;
561
562 /* display version info if adapter is found */
563 if (!version_disp)
564 {
565 /* set display flag to TRUE so that */
566 /* we only display this string ONCE */
567 version_disp = 1;
568 printk(version);
569 }
570
571 /*
572 * Enable master mode before we start playing with the
573 * pci_command word since pci_set_master() will modify
574 * it.
575 */
576 pci_set_master(pdev);
577
578 pci_read_config_word(pdev, PCI_COMMAND, &ap->pci_command);
579
580 /* OpenFirmware on Mac's does not set this - DOH.. */
581 if (!(ap->pci_command & PCI_COMMAND_MEMORY)) {
582 printk(KERN_INFO "%s: Enabling PCI Memory Mapped "
583 "access - was not enabled by BIOS/Firmware\n",
584 dev->name);
585 ap->pci_command = ap->pci_command | PCI_COMMAND_MEMORY;
586 pci_write_config_word(ap->pdev, PCI_COMMAND,
587 ap->pci_command);
588 wmb();
589 }
590
591 pci_read_config_byte(pdev, PCI_LATENCY_TIMER,
592 &ap->pci_latency);
593 if (ap->pci_latency <= 0x40) {
594 ap->pci_latency = 0x40;
595 pci_write_config_byte(pdev, PCI_LATENCY_TIMER,
596 ap->pci_latency);
597 }
598
599 /*
600 * Remap the regs into kernel space - this is abuse of
601 * dev->base_addr since it was means for I/O port
602 * addresses but who gives a damn.
603 */
604 dev->base_addr = pci_resource_start(pdev, 0);
605 ap->regs = (struct ace_regs *)ioremap(dev->base_addr, 0x4000);
606 if (!ap->regs) {
607 printk(KERN_ERR "%s: Unable to map I/O register, "
608 "AceNIC %i will be disabled.\n",
609 dev->name, boards_found);
610 break;
611 }
612
613 switch(pdev->vendor) {
614 case PCI_VENDOR_ID_ALTEON:
615 strncpy(ap->name, "AceNIC Gigabit Ethernet",
616 sizeof (ap->name));
617 printk(KERN_INFO "%s: Alteon AceNIC ", dev->name);
618 break;
619 case PCI_VENDOR_ID_3COM:
620 strncpy(ap->name, "3Com 3C985 Gigabit Ethernet",
621 sizeof (ap->name));
622 printk(KERN_INFO "%s: 3Com 3C985 ", dev->name);
623 break;
624 case PCI_VENDOR_ID_NETGEAR:
625 strncpy(ap->name, "NetGear GA620 Gigabit Ethernet",
626 sizeof (ap->name));
627 printk(KERN_INFO "%s: NetGear GA620 ", dev->name);
628 break;
629 case PCI_VENDOR_ID_DEC:
630 if (pdev->device == PCI_DEVICE_ID_FARALLON_PN9000SX) {
631 strncpy(ap->name, "Farallon PN9000-SX "
632 "Gigabit Ethernet", sizeof (ap->name));
633 printk(KERN_INFO "%s: Farallon PN9000-SX ",
634 dev->name);
635 break;
636 }
637 case PCI_VENDOR_ID_SGI:
638 strncpy(ap->name, "SGI AceNIC Gigabit Ethernet",
639 sizeof (ap->name));
640 printk(KERN_INFO "%s: SGI AceNIC ", dev->name);
641 break;
642 default:
643 strncpy(ap->name, "Unknown AceNIC based Gigabit "
644 "Ethernet", sizeof (ap->name));
645 printk(KERN_INFO "%s: Unknown AceNIC ", dev->name);
646 break;
647 }
648 ap->name [sizeof (ap->name) - 1] = '\0';
649 printk("Gigabit Ethernet at 0x%08lx, ", dev->base_addr);
650 #ifdef __sparc__
651 printk("irq %s\n", __irq_itoa(dev->irq));
652 #else
653 printk("irq %i\n", dev->irq);
654 #endif
655
656 #ifdef CONFIG_ACENIC_OMIT_TIGON_I
657 if ((readl(&ap->regs->HostCtrl) >> 28) == 4) {
658 printk(KERN_ERR "%s: Driver compiled without Tigon I"
659 " support - NIC disabled\n", dev->name);
660 ace_init_cleanup(dev);
661 continue;
662 }
663 #endif
664
665 if (ace_allocate_descriptors(dev))
666 continue;
667
668 #ifdef MODULE
669 if (boards_found >= ACE_MAX_MOD_PARMS)
670 ap->board_idx = BOARD_IDX_OVERFLOW;
671 else
672 ap->board_idx = boards_found;
673 #else
674 ap->board_idx = BOARD_IDX_STATIC;
675 #endif
676
677 if (ace_init(dev))
678 continue;
679
680 boards_found++;
681 }
682
683 /*
684 * If we're at this point we're going through ace_probe() for
685 * the first time. Return success (0) if we've initialized 1
686 * or more boards. Otherwise, return failure (-ENODEV).
687 */
688
689 if (boards_found > 0)
690 return 0;
691 else
692 return -ENODEV;
693 }
694
695
696 #ifdef MODULE
697 MODULE_AUTHOR("Jes Sorensen <jes@linuxcare.com>");
698 MODULE_DESCRIPTION("AceNIC/3C985/GA620 Gigabit Ethernet driver");
699 MODULE_PARM(link, "1-" __MODULE_STRING(8) "i");
700 MODULE_PARM(trace, "1-" __MODULE_STRING(8) "i");
701 MODULE_PARM(tx_coal_tick, "1-" __MODULE_STRING(8) "i");
702 MODULE_PARM(max_tx_desc, "1-" __MODULE_STRING(8) "i");
703 MODULE_PARM(rx_coal_tick, "1-" __MODULE_STRING(8) "i");
704 MODULE_PARM(max_rx_desc, "1-" __MODULE_STRING(8) "i");
705 #endif
706
707
708 void __exit ace_module_cleanup(void)
709 {
710 struct ace_private *ap;
711 struct ace_regs *regs;
712 struct net_device *next;
713 short i;
714
715 while (root_dev) {
716 ap = root_dev->priv;
717 next = ap->next;
718
719 regs = ap->regs;
720
721 writel(readl(®s->CpuCtrl) | CPU_HALT, ®s->CpuCtrl);
722 if (ap->version >= 2)
723 writel(readl(®s->CpuBCtrl) | CPU_HALT,
724 ®s->CpuBCtrl);
725 /*
726 * This clears any pending interrupts
727 */
728 writel(1, ®s->Mb0Lo);
729
730 /*
731 * Make sure no other CPUs are processing interrupts
732 * on the card before the buffers are being released.
733 * Otherwise one might experience some `interesting'
734 * effects.
735 *
736 * Then release the RX buffers - jumbo buffers were
737 * already released in ace_close().
738 */
739 synchronize_irq();
740
741 for (i = 0; i < RX_STD_RING_ENTRIES; i++) {
742 struct sk_buff *skb = ap->skb->rx_std_skbuff[i].skb;
743
744 if (skb) {
745 dma_addr_t mapping;
746
747 mapping = ap->skb->rx_std_skbuff[i].mapping;
748
749 ap->rx_std_ring[i].size = 0;
750 ap->skb->rx_std_skbuff[i].skb = NULL;
751 pci_unmap_single(ap->pdev, mapping,
752 ACE_STD_BUFSIZE - (2 + 16),
753 PCI_DMA_FROMDEVICE);
754 dev_kfree_skb(skb);
755 }
756 }
757 if (ap->version >= 2) {
758 for (i = 0; i < RX_MINI_RING_ENTRIES; i++) {
759 struct sk_buff *skb = ap->skb->rx_mini_skbuff[i].skb;
760
761 if (skb) {
762 dma_addr_t mapping;
763
764 mapping = ap->skb->rx_mini_skbuff[i].mapping;
765 ap->rx_mini_ring[i].size = 0;
766 ap->skb->rx_mini_skbuff[i].skb = NULL;
767 pci_unmap_single(ap->pdev, mapping,
768 ACE_MINI_BUFSIZE - (2 + 16),
769 PCI_DMA_FROMDEVICE);
770 dev_kfree_skb(skb);
771 }
772 }
773 }
774 for (i = 0; i < RX_JUMBO_RING_ENTRIES; i++) {
775 struct sk_buff *skb = ap->skb->rx_jumbo_skbuff[i].skb;
776 if (skb) {
777 dma_addr_t mapping;
778
779 mapping = ap->skb->rx_jumbo_skbuff[i].mapping;
780
781 ap->rx_jumbo_ring[i].size = 0;
782 ap->skb->rx_jumbo_skbuff[i].skb = NULL;
783 pci_unmap_single(ap->pdev, mapping,
784 ACE_JUMBO_BUFSIZE - (2 + 16),
785 PCI_DMA_FROMDEVICE);
786 dev_kfree_skb(skb);
787 }
788 }
789
790 ace_init_cleanup(root_dev);
791 kfree(root_dev);
792 root_dev = next;
793 }
794 }
795
796
797 int __init ace_module_init(void)
798 {
799 int status;
800
801 root_dev = NULL;
802
803 #ifdef NEW_NETINIT
804 status = acenic_probe();
805 #else
806 status = acenic_probe(NULL);
807 #endif
808 return status;
809 }
810
811
812 #if (LINUX_VERSION_CODE < 0x02032a)
813 #ifdef MODULE
814 int init_module(void)
815 {
816 return ace_module_init();
817 }
818
819
820 void cleanup_module(void)
821 {
822 ace_module_cleanup();
823 }
824 #endif
825 #else
826 module_init(ace_module_init);
827 module_exit(ace_module_cleanup);
828 #endif
829
830
831 static void ace_free_descriptors(struct net_device *dev)
832 {
833 struct ace_private *ap = dev->priv;
834 int size;
835
836 if (ap->rx_std_ring != NULL) {
837 size = (sizeof(struct rx_desc) *
838 (RX_STD_RING_ENTRIES +
839 RX_JUMBO_RING_ENTRIES +
840 RX_MINI_RING_ENTRIES +
841 RX_RETURN_RING_ENTRIES));
842 pci_free_consistent(ap->pdev, size,
843 ap->rx_std_ring,
844 ap->rx_ring_base_dma);
845 ap->rx_std_ring = NULL;
846 ap->rx_jumbo_ring = NULL;
847 ap->rx_mini_ring = NULL;
848 ap->rx_return_ring = NULL;
849 }
850 if (ap->evt_ring != NULL) {
851 size = (sizeof(struct event) * EVT_RING_ENTRIES);
852 pci_free_consistent(ap->pdev, size,
853 ap->evt_ring,
854 ap->evt_ring_dma);
855 ap->evt_ring = NULL;
856 }
857 if (ap->evt_prd != NULL) {
858 pci_free_consistent(ap->pdev, sizeof(u32),
859 (void *)ap->evt_prd, ap->evt_prd_dma);
860 ap->evt_prd = NULL;
861 }
862 if (ap->rx_ret_prd != NULL) {
863 pci_free_consistent(ap->pdev, sizeof(u32),
864 (void *)ap->rx_ret_prd, ap->rx_ret_prd_dma);
865 ap->rx_ret_prd = NULL;
866 }
867 if (ap->tx_csm != NULL) {
868 pci_free_consistent(ap->pdev, sizeof(u32),
869 (void *)ap->tx_csm, ap->tx_csm_dma);
870 ap->tx_csm = NULL;
871 }
872 }
873
874
875 static int ace_allocate_descriptors(struct net_device *dev)
876 {
877 struct ace_private *ap = dev->priv;
878 int size;
879
880 size = (sizeof(struct rx_desc) *
881 (RX_STD_RING_ENTRIES +
882 RX_JUMBO_RING_ENTRIES +
883 RX_MINI_RING_ENTRIES +
884 RX_RETURN_RING_ENTRIES));
885
886 ap->rx_std_ring = pci_alloc_consistent(ap->pdev, size,
887 &ap->rx_ring_base_dma);
888 if (ap->rx_std_ring == NULL)
889 goto fail;
890
891 ap->rx_jumbo_ring = ap->rx_std_ring + RX_STD_RING_ENTRIES;
892 ap->rx_mini_ring = ap->rx_jumbo_ring + RX_JUMBO_RING_ENTRIES;
893 ap->rx_return_ring = ap->rx_mini_ring + RX_MINI_RING_ENTRIES;
894
895 size = (sizeof(struct event) * EVT_RING_ENTRIES);
896
897 ap->evt_ring = pci_alloc_consistent(ap->pdev, size, &ap->evt_ring_dma);
898
899 if (ap->evt_ring == NULL)
900 goto fail;
901
902 size = (sizeof(struct tx_desc) * TX_RING_ENTRIES);
903
904 ap->tx_ring = pci_alloc_consistent(ap->pdev, size, &ap->tx_ring_dma);
905
906 if (ap->tx_ring == NULL)
907 goto fail;
908
909 ap->evt_prd = pci_alloc_consistent(ap->pdev, sizeof(u32),
910 &ap->evt_prd_dma);
911 if (ap->evt_prd == NULL)
912 goto fail;
913
914 ap->rx_ret_prd = pci_alloc_consistent(ap->pdev, sizeof(u32),
915 &ap->rx_ret_prd_dma);
916 if (ap->rx_ret_prd == NULL)
917 goto fail;
918
919 ap->tx_csm = pci_alloc_consistent(ap->pdev, sizeof(u32),
920 &ap->tx_csm_dma);
921 if (ap->tx_csm == NULL)
922 goto fail;
923
924 return 0;
925
926 fail:
927 /* Clean up. */
928 ace_init_cleanup(dev);
929 return 1;
930 }
931
932
933 /*
934 * Generic cleanup handling data allocated during init. Used when the
935 * module is unloaded or if an error occurs during initialization
936 */
937 static void ace_init_cleanup(struct net_device *dev)
938 {
939 struct ace_private *ap;
940
941 ap = dev->priv;
942
943 ace_free_descriptors(dev);
944
945 if (ap->info)
946 pci_free_consistent(ap->pdev, sizeof(struct ace_info),
947 ap->info, ap->info_dma);
948 if (ap->skb)
949 kfree(ap->skb);
950 if (ap->trace_buf)
951 kfree(ap->trace_buf);
952
953 if (dev->irq)
954 free_irq(dev->irq, dev);
955
956 unregister_netdev(dev);
957 iounmap(ap->regs);
958 }
959
960
961 /*
962 * Commands are considered to be slow.
963 */
964 static inline void ace_issue_cmd(struct ace_regs *regs, struct cmd *cmd)
965 {
966 u32 idx;
967
968 idx = readl(®s->CmdPrd);
969
970 writel(*(u32 *)(cmd), ®s->CmdRng[idx]);
971 idx = (idx + 1) % CMD_RING_ENTRIES;
972
973 writel(idx, ®s->CmdPrd);
974 }
975
976
977 static int __init ace_init(struct net_device *dev)
978 {
979 struct ace_private *ap;
980 struct ace_regs *regs;
981 struct ace_info *info = NULL;
982 unsigned long tmp_ptr, myjif;
983 u32 tig_ver, mac1, mac2, tmp, pci_state;
984 int board_idx, ecode = 0;
985 short i;
986 unsigned char cache;
987
988 ap = dev->priv;
989 regs = ap->regs;
990
991 board_idx = ap->board_idx;
992
993 /*
994 * aman@sgi.com - its useful to do a NIC reset here to
995 * address the `Firmware not running' problem subsequent
996 * to any crashes involving the NIC
997 */
998 writel(HW_RESET | (HW_RESET << 24), ®s->HostCtrl);
999 wmb();
1000
1001 /*
1002 * Don't access any other registes before this point!
1003 */
1004 #ifdef __BIG_ENDIAN
1005 /*
1006 * This will most likely need BYTE_SWAP once we switch
1007 * to using __raw_writel()
1008 */
1009 writel((WORD_SWAP | CLR_INT |
1010 ((WORD_SWAP | CLR_INT) << 24)),
1011 ®s->HostCtrl);
1012 #else
1013 writel((CLR_INT | WORD_SWAP | ((CLR_INT | WORD_SWAP) << 24)),
1014 ®s->HostCtrl);
1015 #endif
1016 mb();
1017
1018 /*
1019 * Stop the NIC CPU and clear pending interrupts
1020 */
1021 writel(readl(®s->CpuCtrl) | CPU_HALT, ®s->CpuCtrl);
1022 writel(0, ®s->Mb0Lo);
1023
1024 tig_ver = readl(®s->HostCtrl) >> 28;
1025
1026 switch(tig_ver){
1027 #ifndef CONFIG_ACENIC_OMIT_TIGON_I
1028 case 4:
1029 printk(KERN_INFO" Tigon I (Rev. 4), Firmware: %i.%i.%i, ",
1030 tigonFwReleaseMajor, tigonFwReleaseMinor,
1031 tigonFwReleaseFix);
1032 writel(0, ®s->LocalCtrl);
1033 ap->version = 1;
1034 break;
1035 #endif
1036 case 6:
1037 printk(KERN_INFO" Tigon II (Rev. %i), Firmware: %i.%i.%i, ",
1038 tig_ver, tigon2FwReleaseMajor, tigon2FwReleaseMinor,
1039 tigon2FwReleaseFix);
1040 writel(readl(®s->CpuBCtrl) | CPU_HALT, ®s->CpuBCtrl);
1041 /*
1042 * The SRAM bank size does _not_ indicate the amount
1043 * of memory on the card, it controls the _bank_ size!
1044 * Ie. a 1MB AceNIC will have two banks of 512KB.
1045 */
1046 writel(SRAM_BANK_512K, ®s->LocalCtrl);
1047 writel(SYNC_SRAM_TIMING, ®s->MiscCfg);
1048 ap->version = 2;
1049 break;
1050 default:
1051 printk(KERN_INFO" Unsupported Tigon version detected (%i), ",
1052 tig_ver);
1053 ecode = -ENODEV;
1054 goto init_error;
1055 }
1056
1057 /*
1058 * ModeStat _must_ be set after the SRAM settings as this change
1059 * seems to corrupt the ModeStat and possible other registers.
1060 * The SRAM settings survive resets and setting it to the same
1061 * value a second time works as well. This is what caused the
1062 * `Firmware not running' problem on the Tigon II.
1063 */
1064 #ifdef __BIG_ENDIAN
1065 writel(ACE_BYTE_SWAP_DMA | ACE_WARN | ACE_FATAL | ACE_BYTE_SWAP_BD |
1066 ACE_WORD_SWAP_BD | ACE_NO_JUMBO_FRAG, ®s->ModeStat);
1067 #else
1068 writel(ACE_BYTE_SWAP_DMA | ACE_WARN | ACE_FATAL |
1069 ACE_WORD_SWAP_BD | ACE_NO_JUMBO_FRAG, ®s->ModeStat);
1070 #endif
1071 mb();
1072
1073 mac1 = 0;
1074 for(i = 0; i < 4; i++) {
1075 mac1 = mac1 << 8;
1076 tmp = read_eeprom_byte(dev, 0x8c+i);
1077 if (tmp < 0) {
1078 ecode = -EIO;
1079 goto init_error;
1080 } else
1081 mac1 |= (tmp & 0xff);
1082 }
1083 mac2 = 0;
1084 for(i = 4; i < 8; i++) {
1085 mac2 = mac2 << 8;
1086 tmp = read_eeprom_byte(dev, 0x8c+i);
1087 if (tmp < 0) {
1088 ecode = -EIO;
1089 goto init_error;
1090 } else
1091 mac2 |= (tmp & 0xff);
1092 }
1093
1094 writel(mac1, ®s->MacAddrHi);
1095 writel(mac2, ®s->MacAddrLo);
1096
1097 printk("MAC: %02x:%02x:%02x:%02x:%02x:%02x\n",
1098 (mac1 >> 8) & 0xff, mac1 & 0xff, (mac2 >> 24) &0xff,
1099 (mac2 >> 16) & 0xff, (mac2 >> 8) & 0xff, mac2 & 0xff);
1100
1101 dev->dev_addr[0] = (mac1 >> 8) & 0xff;
1102 dev->dev_addr[1] = mac1 & 0xff;
1103 dev->dev_addr[2] = (mac2 >> 24) & 0xff;
1104 dev->dev_addr[3] = (mac2 >> 16) & 0xff;
1105 dev->dev_addr[4] = (mac2 >> 8) & 0xff;
1106 dev->dev_addr[5] = mac2 & 0xff;
1107
1108 /*
1109 * Looks like this is necessary to deal with on all architectures,
1110 * even this %$#%$# N440BX Intel based thing doesn't get it right.
1111 * Ie. having two NICs in the machine, one will have the cache
1112 * line set at boot time, the other will not.
1113 */
1114 pci_read_config_byte(ap->pdev, PCI_CACHE_LINE_SIZE, &cache);
1115 if ((cache << 2) != SMP_CACHE_BYTES) {
1116 printk(KERN_INFO " PCI cache line size set incorrectly "
1117 "(%i bytes) by BIOS/FW, correcting to %i\n",
1118 (cache << 2), SMP_CACHE_BYTES);
1119 pci_write_config_byte(ap->pdev, PCI_CACHE_LINE_SIZE,
1120 SMP_CACHE_BYTES >> 2);
1121 }
1122
1123 pci_state = readl(®s->PciState);
1124 printk(KERN_INFO " PCI bus width: %i bits, speed: %iMHz, "
1125 "latency: %i clks\n",
1126 (pci_state & PCI_32BIT) ? 32 : 64,
1127 (pci_state & PCI_66MHZ) ? 66 : 33,
1128 ap->pci_latency);
1129
1130 /*
1131 * Set the max DMA transfer size. Seems that for most systems
1132 * the performance is better when no MAX parameter is
1133 * set. However for systems enabling PCI write and invalidate,
1134 * DMA writes must be set to the L1 cache line size to get
1135 * optimal performance.
1136 *
1137 * The default is now to turn the PCI write and invalidate off
1138 * - that is what Alteon does for NT.
1139 */
1140 tmp = READ_CMD_MEM | WRITE_CMD_MEM;
1141 if (ap->version >= 2) {
1142 tmp |= (MEM_READ_MULTIPLE | (pci_state & PCI_66MHZ));
1143 /*
1144 * Tuning parameters only supported for 8 cards
1145 */
1146 if (board_idx == BOARD_IDX_OVERFLOW ||
1147 dis_pci_mem_inval[board_idx]) {
1148 if (ap->pci_command & PCI_COMMAND_INVALIDATE) {
1149 ap->pci_command &= ~PCI_COMMAND_INVALIDATE;
1150 pci_write_config_word(ap->pdev, PCI_COMMAND,
1151 ap->pci_command);
1152 printk(KERN_INFO " Disabling PCI memory "
1153 "write and invalidate\n");
1154 }
1155 } else if (ap->pci_command & PCI_COMMAND_INVALIDATE) {
1156 printk(KERN_INFO " PCI memory write & invalidate "
1157 "enabled by BIOS, enabling counter measures\n");
1158
1159 switch(SMP_CACHE_BYTES) {
1160 case 16:
1161 tmp |= DMA_WRITE_MAX_16;
1162 break;
1163 case 32:
1164 tmp |= DMA_WRITE_MAX_32;
1165 break;
1166 case 64:
1167 tmp |= DMA_WRITE_MAX_64;
1168 break;
1169 default:
1170 printk(KERN_INFO " Cache line size %i not "
1171 "supported, PCI write and invalidate "
1172 "disabled\n", SMP_CACHE_BYTES);
1173 ap->pci_command &= ~PCI_COMMAND_INVALIDATE;
1174 pci_write_config_word(ap->pdev, PCI_COMMAND,
1175 ap->pci_command);
1176 }
1177 }
1178 }
1179
1180 #ifdef __sparc__
1181 /*
1182 * On this platform, we know what the best dma settings
1183 * are. We use 64-byte maximum bursts, because if we
1184 * burst larger than the cache line size (or even cross
1185 * a 64byte boundry in a single burst) the UltraSparc
1186 * PCI controller will disconnect at 64-byte multiples.
1187 *
1188 * Read-multiple will be properly enabled above, and when
1189 * set will give the PCI controller proper hints about
1190 * prefetching.
1191 */
1192 tmp = tmp & ~DMA_READ_WRITE_MASK;
1193 tmp |= DMA_READ_MAX_64;
1194 tmp |= DMA_WRITE_MAX_64;
1195 #endif
1196 writel(tmp, ®s->PciState);
1197
1198 #if 0
1199 /*
1200 * I have received reports from people having problems when this
1201 * bit is enabled.
1202 */
1203 if (!(ap->pci_command & PCI_COMMAND_FAST_BACK)) {
1204 printk(KERN_INFO " Enabling PCI Fast Back to Back\n");
1205 ap->pci_command |= PCI_COMMAND_FAST_BACK;
1206 pci_write_config_word(ap->pdev, PCI_COMMAND, ap->pci_command);
1207 }
1208 #endif
1209
1210 /*
1211 * Initialize the generic info block and the command+event rings
1212 * and the control blocks for the transmit and receive rings
1213 * as they need to be setup once and for all.
1214 */
1215 if (!(info = pci_alloc_consistent(ap->pdev, sizeof(struct ace_info),
1216 &ap->info_dma))) {
1217 ecode = -EAGAIN;
1218 goto init_error;
1219 }
1220 ap->info = info;
1221
1222 /*
1223 * Get the memory for the skb rings.
1224 */
1225 if (!(ap->skb = kmalloc(sizeof(struct ace_skb), GFP_KERNEL))) {
1226 ecode = -EAGAIN;
1227 goto init_error;
1228 }
1229
1230 ecode = request_irq(dev->irq, ace_interrupt, SA_SHIRQ, dev->name, dev);
1231 if (ecode) {
1232 printk(KERN_WARNING "%s: Requested IRQ %d is busy\n",
1233 dev->name, dev->irq);
1234 goto init_error;
1235 }
1236
1237 /*
1238 * Register the device here to be able to catch allocated
1239 * interrupt handlers in case the firmware doesn't come up.
1240 */
1241 ap->next = root_dev;
1242 root_dev = dev;
1243
1244 #ifdef INDEX_DEBUG
1245 spin_lock_init(&ap->debug_lock);
1246 ap->last_tx = TX_RING_ENTRIES - 1;
1247 ap->last_std_rx = 0;
1248 ap->last_mini_rx = 0;
1249 #endif
1250
1251 memset(ap->info, 0, sizeof(struct ace_info));
1252 memset(ap->skb, 0, sizeof(struct ace_skb));
1253
1254 ace_load_firmware(dev);
1255 ap->fw_running = 0;
1256
1257 tmp_ptr = (unsigned long) ap->info_dma;
1258 #ifdef ACE_64BIT_PTR
1259 writel(tmp_ptr >> 32, ®s->InfoPtrHi);
1260 #else
1261 writel(0, ®s->InfoPtrHi);
1262 #endif
1263 writel(tmp_ptr & 0xffffffff, ®s->InfoPtrLo);
1264
1265 memset(ap->evt_ring, 0, EVT_RING_ENTRIES * sizeof(struct event));
1266
1267 set_aceaddr(&info->evt_ctrl.rngptr, ap->evt_ring_dma);
1268 info->evt_ctrl.flags = 0;
1269
1270 set_aceaddr(&info->evt_prd_ptr, ap->evt_prd_dma);
1271 *(ap->evt_prd) = 0;
1272 wmb();
1273 writel(0, ®s->EvtCsm);
1274
1275 set_aceaddr(&info->cmd_ctrl.rngptr, 0x100);
1276 info->cmd_ctrl.flags = 0;
1277 info->cmd_ctrl.max_len = 0;
1278
1279 for (i = 0; i < CMD_RING_ENTRIES; i++)
1280 writel(0, ®s->CmdRng[i]);
1281
1282 writel(0, ®s->CmdPrd);
1283 writel(0, ®s->CmdCsm);
1284
1285 tmp_ptr = ap->info_dma;
1286 tmp_ptr += (unsigned long) &(((struct ace_info *)0)->s.stats);
1287 set_aceaddr(&info->stats2_ptr, (dma_addr_t) tmp_ptr);
1288
1289 set_aceaddr(&info->rx_std_ctrl.rngptr, ap->rx_ring_base_dma);
1290 info->rx_std_ctrl.max_len = ACE_STD_MTU + ETH_HLEN + 4;
1291 info->rx_std_ctrl.flags = RCB_FLG_TCP_UDP_SUM;
1292
1293 memset(ap->rx_std_ring, 0,
1294 RX_STD_RING_ENTRIES * sizeof(struct rx_desc));
1295
1296 for (i = 0; i < RX_STD_RING_ENTRIES; i++)
1297 ap->rx_std_ring[i].flags = BD_FLG_TCP_UDP_SUM;
1298
1299 ap->rx_std_skbprd = 0;
1300 atomic_set(&ap->cur_rx_bufs, 0);
1301
1302 set_aceaddr(&info->rx_jumbo_ctrl.rngptr,
1303 (ap->rx_ring_base_dma +
1304 (sizeof(struct rx_desc) * RX_STD_RING_ENTRIES)));
1305 info->rx_jumbo_ctrl.max_len = 0;
1306 info->rx_jumbo_ctrl.flags = RCB_FLG_TCP_UDP_SUM;
1307
1308 memset(ap->rx_jumbo_ring, 0,
1309 RX_JUMBO_RING_ENTRIES * sizeof(struct rx_desc));
1310
1311 for (i = 0; i < RX_JUMBO_RING_ENTRIES; i++)
1312 ap->rx_jumbo_ring[i].flags = BD_FLG_TCP_UDP_SUM | BD_FLG_JUMBO;
1313
1314 ap->rx_jumbo_skbprd = 0;
1315 atomic_set(&ap->cur_jumbo_bufs, 0);
1316
1317 memset(ap->rx_mini_ring, 0,
1318 RX_MINI_RING_ENTRIES * sizeof(struct rx_desc));
1319
1320 if (ap->version >= 2) {
1321 set_aceaddr(&info->rx_mini_ctrl.rngptr,
1322 (ap->rx_ring_base_dma +
1323 (sizeof(struct rx_desc) *
1324 (RX_STD_RING_ENTRIES +
1325 RX_JUMBO_RING_ENTRIES))));
1326 info->rx_mini_ctrl.max_len = ACE_MINI_SIZE;
1327 info->rx_mini_ctrl.flags = RCB_FLG_TCP_UDP_SUM;
1328
1329 for (i = 0; i < RX_MINI_RING_ENTRIES; i++)
1330 ap->rx_mini_ring[i].flags =
1331 BD_FLG_TCP_UDP_SUM | BD_FLG_MINI;
1332 } else {
1333 set_aceaddr(&info->rx_mini_ctrl.rngptr, 0);
1334 info->rx_mini_ctrl.flags = RCB_FLG_RNG_DISABLE;
1335 info->rx_mini_ctrl.max_len = 0;
1336 }
1337
1338 ap->rx_mini_skbprd = 0;
1339 atomic_set(&ap->cur_mini_bufs, 0);
1340
1341 set_aceaddr(&info->rx_return_ctrl.rngptr,
1342 (ap->rx_ring_base_dma +
1343 (sizeof(struct rx_desc) *
1344 (RX_STD_RING_ENTRIES +
1345 RX_JUMBO_RING_ENTRIES +
1346 RX_MINI_RING_ENTRIES))));
1347 info->rx_return_ctrl.flags = 0;
1348 info->rx_return_ctrl.max_len = RX_RETURN_RING_ENTRIES;
1349
1350 memset(ap->rx_return_ring, 0,
1351 RX_RETURN_RING_ENTRIES * sizeof(struct rx_desc));
1352
1353 set_aceaddr(&info->rx_ret_prd_ptr, ap->rx_ret_prd_dma);
1354 *(ap->rx_ret_prd) = 0;
1355
1356 writel(TX_RING_BASE, ®s->WinBase);
1357 memset(ap->tx_ring, 0, TX_RING_ENTRIES * sizeof(struct tx_desc));
1358
1359 set_aceaddr(&info->tx_ctrl.rngptr, ap->tx_ring_dma);
1360
1361 info->tx_ctrl.max_len = TX_RING_ENTRIES;
1362
1363 tmp = 0;
1364 #if TX_COAL_INTS_ONLY
1365 tmp |= RCB_FLG_COAL_INT_ONLY;
1366 #endif
1367 tmp |= RCB_FLG_TX_HOST_RING;
1368
1369 info->tx_ctrl.flags = tmp;
1370
1371 set_aceaddr(&info->tx_csm_ptr, ap->tx_csm_dma);
1372
1373 /*
1374 * Potential item for tuning parameter
1375 */
1376 writel(DMA_THRESH_8W, ®s->DmaReadCfg);
1377 writel(DMA_THRESH_8W, ®s->DmaWriteCfg);
1378
1379 writel(0, ®s->MaskInt);
1380 writel(1, ®s->IfIdx);
1381 writel(1, ®s->AssistState);
1382
1383 writel(DEF_STAT, ®s->TuneStatTicks);
1384 writel(DEF_TRACE, ®s->TuneTrace);
1385
1386 ace_set_rxtx_parms(dev, 0);
1387
1388 if (board_idx == BOARD_IDX_OVERFLOW) {
1389 printk(KERN_WARNING "%s: more then %i NICs detected, "
1390 "ignoring module parameters!\n",
1391 dev->name, ACE_MAX_MOD_PARMS);
1392 } else if (board_idx >= 0) {
1393 if (tx_coal_tick[board_idx])
1394 writel(tx_coal_tick[board_idx],
1395 ®s->TuneTxCoalTicks);
1396 if (max_tx_desc[board_idx])
1397 writel(max_tx_desc[board_idx], ®s->TuneMaxTxDesc);
1398
1399 if (rx_coal_tick[board_idx])
1400 writel(rx_coal_tick[board_idx],
1401 ®s->TuneRxCoalTicks);
1402 if (max_rx_desc[board_idx])
1403 writel(max_rx_desc[board_idx], ®s->TuneMaxRxDesc);
1404
1405 if (trace[board_idx])
1406 writel(trace[board_idx], ®s->TuneTrace);
1407
1408 if ((tx_ratio[board_idx] >= 0) && (tx_ratio[board_idx] < 64))
1409 writel(tx_ratio[board_idx], ®s->TxBufRat);
1410 }
1411
1412 /*
1413 * Default link parameters
1414 */
1415 tmp = LNK_ENABLE | LNK_FULL_DUPLEX | LNK_1000MB | LNK_100MB |
1416 LNK_10MB | LNK_RX_FLOW_CTL_Y | LNK_NEG_FCTL | LNK_NEGOTIATE;
1417 if(ap->version >= 2)
1418 tmp |= LNK_TX_FLOW_CTL_Y;
1419
1420 /*
1421 * Override link default parameters
1422 */
1423 if ((board_idx >= 0) && link[board_idx]) {
1424 int option = link[board_idx];
1425
1426 tmp = LNK_ENABLE;
1427
1428 if (option & 0x01) {
1429 printk(KERN_INFO "%s: Setting half duplex link\n",
1430 dev->name);
1431 tmp &= ~LNK_FULL_DUPLEX;
1432 }
1433 if (option & 0x02)
1434 tmp &= ~LNK_NEGOTIATE;
1435 if (option & 0x10)
1436 tmp |= LNK_10MB;
1437 if (option & 0x20)
1438 tmp |= LNK_100MB;
1439 if (option & 0x40)
1440 tmp |= LNK_1000MB;
1441 if ((option & 0x70) == 0) {
1442 printk(KERN_WARNING "%s: No media speed specified, "
1443 "forcing auto negotiation\n", dev->name);
1444 tmp |= LNK_NEGOTIATE | LNK_1000MB |
1445 LNK_100MB | LNK_10MB;
1446 }
1447 if ((option & 0x100) == 0)
1448 tmp |= LNK_NEG_FCTL;
1449 else
1450 printk(KERN_INFO "%s: Disabling flow control "
1451 "negotiation\n", dev->name);
1452 if (option & 0x200)
1453 tmp |= LNK_RX_FLOW_CTL_Y;
1454 if ((option & 0x400) && (ap->version >= 2)) {
1455 printk(KERN_INFO "%s: Enabling TX flow control\n",
1456 dev->name);
1457 tmp |= LNK_TX_FLOW_CTL_Y;
1458 }
1459 }
1460
1461 ap->link = tmp;
1462 writel(tmp, ®s->TuneLink);
1463 if (ap->version >= 2)
1464 writel(tmp, ®s->TuneFastLink);
1465
1466 if (ACE_IS_TIGON_I(ap))
1467 writel(tigonFwStartAddr, ®s->Pc);
1468 if (ap->version == 2)
1469 writel(tigon2FwStartAddr, ®s->Pc);
1470
1471 writel(0, ®s->Mb0Lo);
1472
1473 /*
1474 * Set tx_csm before we start receiving interrupts, otherwise
1475 * the interrupt handler might think it is supposed to process
1476 * tx ints before we are up and running, which may cause a null
1477 * pointer access in the int handler.
1478 */
1479 ap->tx_full = 0;
1480 ap->cur_rx = 0;
1481 ap->tx_prd = *(ap->tx_csm) = ap->tx_ret_csm = 0;
1482
1483 wmb();
1484 ace_set_txprd(regs, ap, 0);
1485 writel(0, ®s->RxRetCsm);
1486
1487 /*
1488 * Start the NIC CPU
1489 */
1490 writel(readl(®s->CpuCtrl) & ~(CPU_HALT|CPU_TRACE), ®s->CpuCtrl);
1491
1492 /*
1493 * Wait for the firmware to spin up - max 3 seconds.
1494 */
1495 myjif = jiffies + 3 * HZ;
1496 while (time_before(jiffies, myjif) && !ap->fw_running);
1497
1498 if (!ap->fw_running) {
1499 printk(KERN_ERR "%s: Firmware NOT running!\n", dev->name);
1500
1501 ace_dump_trace(ap);
1502 writel(readl(®s->CpuCtrl) | CPU_HALT, ®s->CpuCtrl);
1503
1504 /* aman@sgi.com - account for badly behaving firmware/NIC:
1505 * - have observed that the NIC may continue to generate
1506 * interrupts for some reason; attempt to stop it - halt
1507 * second CPU for Tigon II cards, and also clear Mb0
1508 * - if we're a module, we'll fail to load if this was
1509 * the only GbE card in the system => if the kernel does
1510 * see an interrupt from the NIC, code to handle it is
1511 * gone and OOps! - so free_irq also
1512 */
1513 if (ap->version >= 2)
1514 writel(readl(®s->CpuBCtrl) | CPU_HALT,
1515 ®s->CpuBCtrl);
1516 writel(0, ®s->Mb0Lo);
1517
1518 ecode = -EBUSY;
1519 goto init_error;
1520 }
1521
1522 /*
1523 * We load the ring here as there seem to be no way to tell the
1524 * firmware to wipe the ring without re-initializing it.
1525 */
1526 if (!test_and_set_bit(0, &ap->std_refill_busy))
1527 ace_load_std_rx_ring(ap, RX_RING_SIZE);
1528 else
1529 printk(KERN_ERR "%s: Someone is busy refilling the RX ring\n",
1530 dev->name);
1531 if (ap->version >= 2) {
1532 if (!test_and_set_bit(0, &ap->mini_refill_busy))
1533 ace_load_mini_rx_ring(ap, RX_MINI_SIZE);
1534 else
1535 printk(KERN_ERR "%s: Someone is busy refilling "
1536 "the RX mini ring\n", dev->name);
1537 }
1538 return 0;
1539
1540 init_error:
1541 ace_init_cleanup(dev);
1542 return ecode;
1543 }
1544
1545
1546 static void ace_set_rxtx_parms(struct net_device *dev, int jumbo)
1547 {
1548 struct ace_private *ap;
1549 struct ace_regs *regs;
1550 int board_idx;
1551
1552 ap = dev->priv;
1553 regs = ap->regs;
1554
1555 board_idx = ap->board_idx;
1556
1557 if (board_idx >= 0) {
1558 if (!jumbo) {
1559 if (!tx_coal_tick[board_idx])
1560 writel(DEF_TX_COAL, ®s->TuneTxCoalTicks);
1561 if (!max_tx_desc[board_idx])
1562 writel(DEF_TX_MAX_DESC, ®s->TuneMaxTxDesc);
1563 if (!rx_coal_tick[board_idx])
1564 writel(DEF_RX_COAL, ®s->TuneRxCoalTicks);
1565 if (!max_rx_desc[board_idx])
1566 writel(DEF_RX_MAX_DESC, ®s->TuneMaxRxDesc);
1567 if (!tx_ratio[board_idx])
1568 writel(DEF_TX_RATIO, ®s->TxBufRat);
1569 } else {
1570 if (!tx_coal_tick[board_idx])
1571 writel(DEF_JUMBO_TX_COAL,
1572 ®s->TuneTxCoalTicks);
1573 if (!max_tx_desc[board_idx])
1574 writel(DEF_JUMBO_TX_MAX_DESC,
1575 ®s->TuneMaxTxDesc);
1576 if (!rx_coal_tick[board_idx])
1577 writel(DEF_JUMBO_RX_COAL,
1578 ®s->TuneRxCoalTicks);
1579 if (!max_rx_desc[board_idx])
1580 writel(DEF_JUMBO_RX_MAX_DESC,
1581 ®s->TuneMaxRxDesc);
1582 if (!tx_ratio[board_idx])
1583 writel(DEF_JUMBO_TX_RATIO, ®s->TxBufRat);
1584 }
1585 }
1586 }
1587
1588
1589 /*
1590 * Monitor the card to detect hangs.
1591 */
1592 static void ace_timer(unsigned long data)
1593 {
1594 struct net_device *dev = (struct net_device *)data;
1595 struct ace_private *ap = dev->priv;
1596 struct ace_regs *regs = ap->regs;
1597
1598 /*
1599 * We haven't received a stats update event for more than 2.5
1600 * seconds and there is data in the transmit queue, thus we
1601 * asume the card is stuck.
1602 */
1603 if (*ap->tx_csm != ap->tx_ret_csm) {
1604 printk(KERN_WARNING "%s: Transmitter is stuck, %08x\n",
1605 dev->name, (unsigned int)readl(®s->HostCtrl));
1606 }
1607
1608 ap->timer.expires = jiffies + (5/2*HZ);
1609 add_timer(&ap->timer);
1610 }
1611
1612
1613 static void ace_tasklet(unsigned long dev)
1614 {
1615 struct ace_private *ap = ((struct net_device *)dev)->priv;
1616 int cur_size;
1617
1618 cur_size = atomic_read(&ap->cur_rx_bufs);
1619 if ((cur_size < RX_LOW_STD_THRES) &&
1620 !test_and_set_bit(0, &ap->std_refill_busy)) {
1621 #if DEBUG
1622 printk("refilling buffers (current %i)\n", cur_size);
1623 #endif
1624 ace_load_std_rx_ring(ap, RX_RING_SIZE - cur_size);
1625 }
1626
1627 if (ap->version >= 2) {
1628 cur_size = atomic_read(&ap->cur_mini_bufs);
1629 if ((cur_size < RX_LOW_MINI_THRES) &&
1630 !test_and_set_bit(0, &ap->mini_refill_busy)) {
1631 #if DEBUG
1632 printk("refilling mini buffers (current %i)\n",
1633 cur_size);
1634 #endif
1635 ace_load_mini_rx_ring(ap, RX_MINI_SIZE - cur_size);
1636 }
1637 }
1638
1639 cur_size = atomic_read(&ap->cur_jumbo_bufs);
1640 if (ap->jumbo && (cur_size < RX_LOW_JUMBO_THRES) &&
1641 !test_and_set_bit(0, &ap->jumbo_refill_busy)) {
1642 #if DEBUG
1643 printk("refilling jumbo buffers (current %i)\n", >cur_size);
1644 #endif
1645 ace_load_jumbo_rx_ring(ap, RX_JUMBO_SIZE - cur_size);
1646 }
1647 ap->tasklet_pending = 0;
1648 }
1649
1650
1651 /*
1652 * Copy the contents of the NIC's trace buffer to kernel memory.
1653 */
1654 static void ace_dump_trace(struct ace_private *ap)
1655 {
1656 #if 0
1657 if (!ap->trace_buf)
1658 if (!(ap->trace_buf = kmalloc(ACE_TRACE_SIZE, GFP_KERNEL)))
1659 return;
1660 #endif
1661 }
1662
1663
1664 /*
1665 * Load the standard rx ring.
1666 *
1667 * Loading rings is safe without holding the spin lock since this is
1668 * done only before the device is enabled, thus no interrupts are
1669 * generated and by the interrupt handler/tasklet handler.
1670 */
1671 static void ace_load_std_rx_ring(struct ace_private *ap, int nr_bufs)
1672 {
1673 struct ace_regs *regs;
1674 short i, idx;
1675
1676 regs = ap->regs;
1677
1678 idx = ap->rx_std_skbprd;
1679
1680 for (i = 0; i < nr_bufs; i++) {
1681 struct sk_buff *skb;
1682 struct rx_desc *rd;
1683 dma_addr_t mapping;
1684
1685 skb = alloc_skb(ACE_STD_BUFSIZE, GFP_ATOMIC);
1686 if (!skb)
1687 break;
1688
1689 /*
1690 * Make sure IP header starts on a fresh cache line.
1691 */
1692 skb_reserve(skb, 2 + 16);
1693 mapping = pci_map_single(ap->pdev, skb->data,
1694 ACE_STD_BUFSIZE - (2 + 16),
1695 PCI_DMA_FROMDEVICE);
1696 ap->skb->rx_std_skbuff[idx].skb = skb;
1697 ap->skb->rx_std_skbuff[idx].mapping = mapping;
1698
1699 rd = &ap->rx_std_ring[idx];
1700 set_aceaddr(&rd->addr, mapping);
1701 rd->size = ACE_STD_MTU + ETH_HLEN + 4;
1702 rd->idx = idx;
1703 idx = (idx + 1) % RX_STD_RING_ENTRIES;
1704 }
1705
1706 if (!i)
1707 goto error_out;
1708
1709 atomic_add(i, &ap->cur_rx_bufs);
1710 ap->rx_std_skbprd = idx;
1711
1712 if (ACE_IS_TIGON_I(ap)) {
1713 struct cmd cmd;
1714 cmd.evt = C_SET_RX_PRD_IDX;
1715 cmd.code = 0;
1716 cmd.idx = ap->rx_std_skbprd;
1717 ace_issue_cmd(regs, &cmd);
1718 } else {
1719 writel(idx, ®s->RxStdPrd);
1720 wmb();
1721 }
1722
1723 out:
1724 clear_bit(0, &ap->std_refill_busy);
1725 return;
1726
1727 error_out:
1728 printk(KERN_INFO "Out of memory when allocating "
1729 "standard receive buffers\n");
1730 goto out;
1731 }
1732
1733
1734 static void ace_load_mini_rx_ring(struct ace_private *ap, int nr_bufs)
1735 {
1736 struct ace_regs *regs;
1737 short i, idx;
1738
1739 regs = ap->regs;
1740
1741 idx = ap->rx_mini_skbprd;
1742 for (i = 0; i < nr_bufs; i++) {
1743 struct sk_buff *skb;
1744 struct rx_desc *rd;
1745 dma_addr_t mapping;
1746
1747 skb = alloc_skb(ACE_MINI_BUFSIZE, GFP_ATOMIC);
1748 if (!skb)
1749 break;
1750
1751 /*
1752 * Make sure the IP header ends up on a fresh cache line
1753 */
1754 skb_reserve(skb, 2 + 16);
1755 mapping = pci_map_single(ap->pdev, skb->data,
1756 ACE_MINI_BUFSIZE - (2 + 16),
1757 PCI_DMA_FROMDEVICE);
1758 ap->skb->rx_mini_skbuff[idx].skb = skb;
1759 ap->skb->rx_mini_skbuff[idx].mapping = mapping;
1760
1761 rd = &ap->rx_mini_ring[idx];
1762 set_aceaddr(&rd->addr, mapping);
1763 rd->size = ACE_MINI_SIZE;
1764 rd->idx = idx;
1765 idx = (idx + 1) % RX_MINI_RING_ENTRIES;
1766 }
1767
1768 if (!i)
1769 goto error_out;
1770
1771 atomic_add(i, &ap->cur_mini_bufs);
1772
1773 ap->rx_mini_skbprd = idx;
1774
1775 writel(idx, ®s->RxMiniPrd);
1776 wmb();
1777
1778 out:
1779 clear_bit(0, &ap->mini_refill_busy);
1780 return;
1781 error_out:
1782 printk(KERN_INFO "Out of memory when allocating "
1783 "mini receive buffers\n");
1784 goto out;
1785 }
1786
1787
1788 /*
1789 * Load the jumbo rx ring, this may happen at any time if the MTU
1790 * is changed to a value > 1500.
1791 */
1792 static void ace_load_jumbo_rx_ring(struct ace_private *ap, int nr_bufs)
1793 {
1794 struct ace_regs *regs;
1795 short i, idx;
1796
1797 regs = ap->regs;
1798
1799 idx = ap->rx_jumbo_skbprd;
1800
1801 for (i = 0; i < nr_bufs; i++) {
1802 struct sk_buff *skb;
1803 struct rx_desc *rd;
1804 dma_addr_t mapping;
1805
1806 skb = alloc_skb(ACE_JUMBO_BUFSIZE, GFP_ATOMIC);
1807 if (!skb)
1808 break;
1809
1810 /*
1811 * Make sure the IP header ends up on a fresh cache line
1812 */
1813 skb_reserve(skb, 2 + 16);
1814 mapping = pci_map_single(ap->pdev, skb->data,
1815 ACE_JUMBO_BUFSIZE - (2 + 16),
1816 PCI_DMA_FROMDEVICE);
1817 ap->skb->rx_jumbo_skbuff[idx].skb = skb;
1818 ap->skb->rx_jumbo_skbuff[idx].mapping = mapping;
1819
1820 rd = &ap->rx_jumbo_ring[idx];
1821 set_aceaddr(&rd->addr, mapping);
1822 rd->size = ACE_JUMBO_MTU + ETH_HLEN + 4;
1823 rd->idx = idx;
1824 idx = (idx + 1) % RX_JUMBO_RING_ENTRIES;
1825 }
1826
1827 if (!i)
1828 goto error_out;
1829
1830 atomic_add(i, &ap->cur_jumbo_bufs);
1831 ap->rx_jumbo_skbprd = idx;
1832
1833 if (ACE_IS_TIGON_I(ap)) {
1834 struct cmd cmd;
1835 cmd.evt = C_SET_RX_JUMBO_PRD_IDX;
1836 cmd.code = 0;
1837 cmd.idx = ap->rx_jumbo_skbprd;
1838 ace_issue_cmd(regs, &cmd);
1839 } else {
1840 writel(idx, ®s->RxJumboPrd);
1841 wmb();
1842 }
1843
1844 out:
1845 clear_bit(0, &ap->jumbo_refill_busy);
1846 return;
1847 error_out:
1848 printk(KERN_INFO "Out of memory when allocating "
1849 "jumbo receive buffers\n");
1850 goto out;
1851 }
1852
1853
1854 /*
1855 * All events are considered to be slow (RX/TX ints do not generate
1856 * events) and are handled here, outside the main interrupt handler,
1857 * to reduce the size of the handler.
1858 */
1859 static u32 ace_handle_event(struct net_device *dev, u32 evtcsm, u32 evtprd)
1860 {
1861 struct ace_private *ap;
1862
1863 ap = dev->priv;
1864
1865 while (evtcsm != evtprd) {
1866 switch (ap->evt_ring[evtcsm].evt) {
1867 case E_FW_RUNNING:
1868 printk(KERN_INFO "%s: Firmware up and running\n",
1869 dev->name);
1870 ap->fw_running = 1;
1871 wmb();
1872 break;
1873 case E_STATS_UPDATED:
1874 break;
1875 case E_LNK_STATE:
1876 {
1877 u16 code = ap->evt_ring[evtcsm].code;
1878 switch (code) {
1879 case E_C_LINK_UP:
1880 printk(KERN_WARNING "%s: Optical link UP\n",
1881 dev->name);
1882 break;
1883 case E_C_LINK_DOWN:
1884 printk(KERN_WARNING "%s: Optical link DOWN\n",
1885 dev->name);
1886 break;
1887 case E_C_LINK_10_100:
1888 printk(KERN_WARNING "%s: 10/100BaseT link "
1889 "UP\n", dev->name);
1890 break;
1891 default:
1892 printk(KERN_ERR "%s: Unknown optical link "
1893 "state %02x\n", dev->name, code);
1894 }
1895 break;
1896 }
1897 case E_ERROR:
1898 switch(ap->evt_ring[evtcsm].code) {
1899 case E_C_ERR_INVAL_CMD:
1900 printk(KERN_ERR "%s: invalid command error\n",
1901 dev->name);
1902 break;
1903 case E_C_ERR_UNIMP_CMD:
1904 printk(KERN_ERR "%s: unimplemented command "
1905 "error\n", dev->name);
1906 break;
1907 case E_C_ERR_BAD_CFG:
1908 printk(KERN_ERR "%s: bad config error\n",
1909 dev->name);
1910 break;
1911 default:
1912 printk(KERN_ERR "%s: unknown error %02x\n",
1913 dev->name, ap->evt_ring[evtcsm].code);
1914 }
1915 break;
1916 case E_RESET_JUMBO_RNG:
1917 {
1918 int i;
1919 for (i = 0; i < RX_JUMBO_RING_ENTRIES; i++) {
1920 if (ap->skb->rx_jumbo_skbuff[i].skb) {
1921 ap->rx_jumbo_ring[i].size = 0;
1922 set_aceaddr(&ap->rx_jumbo_ring[i].addr, 0);
1923 dev_kfree_skb(ap->skb->rx_jumbo_skbuff[i].skb);
1924 ap->skb->rx_jumbo_skbuff[i].skb = NULL;
1925 }
1926 }
1927
1928 if (ACE_IS_TIGON_I(ap)) {
1929 struct cmd cmd;
1930 cmd.evt = C_SET_RX_JUMBO_PRD_IDX;
1931 cmd.code = 0;
1932 cmd.idx = 0;
1933 ace_issue_cmd(ap->regs, &cmd);
1934 } else {
1935 writel(0, &((ap->regs)->RxJumboPrd));
1936 wmb();
1937 }
1938
1939 ap->jumbo = 0;
1940 ap->rx_jumbo_skbprd = 0;
1941 printk(KERN_INFO "%s: Jumbo ring flushed\n",
1942 dev->name);
1943 if (!ap->tx_full)
1944 netif_wake_queue(dev);
1945 clear_bit(0, &ap->jumbo_refill_busy);
1946 break;
1947 }
1948 default:
1949 printk(KERN_ERR "%s: Unhandled event 0x%02x\n",
1950 dev->name, ap->evt_ring[evtcsm].evt);
1951 }
1952 evtcsm = (evtcsm + 1) % EVT_RING_ENTRIES;
1953 }
1954
1955 return evtcsm;
1956 }
1957
1958
1959 static void ace_rx_int(struct net_device *dev, u32 rxretprd, u32 rxretcsm)
1960 {
1961 struct ace_private *ap = dev->priv;
1962 u32 idx;
1963 int mini_count = 0, std_count = 0;
1964
1965 idx = rxretcsm;
1966
1967 while (idx != rxretprd) {
1968 struct ring_info *rip;
1969 struct sk_buff *skb;
1970 struct rx_desc *rxdesc, *retdesc;
1971 u32 skbidx;
1972 int desc_type, mapsize;
1973 u16 csum;
1974
1975 retdesc = &ap->rx_return_ring[idx];
1976 skbidx = retdesc->idx;
1977 desc_type = retdesc->flags & (BD_FLG_JUMBO | BD_FLG_MINI);
1978
1979 switch(desc_type) {
1980 /*
1981 * Normal frames do not have any flags set
1982 *
1983 * Mini and normal frames arrive frequently,
1984 * so use a local counter to avoid doing
1985 * atomic operations for each packet arriving.
1986 */
1987 case 0:
1988 rip = &ap->skb->rx_std_skbuff[skbidx];
1989 mapsize = ACE_STD_BUFSIZE - (2 + 16);
1990 rxdesc = &ap->rx_std_ring[skbidx];
1991 std_count++;
1992 break;
1993 case BD_FLG_JUMBO:
1994 rip = &ap->skb->rx_jumbo_skbuff[skbidx];
1995 mapsize = ACE_JUMBO_BUFSIZE - (2 + 16);
1996 rxdesc = &ap->rx_jumbo_ring[skbidx];
1997 atomic_dec(&ap->cur_jumbo_bufs);
1998 break;
1999 case BD_FLG_MINI:
2000 rip = &ap->skb->rx_mini_skbuff[skbidx];
2001 mapsize = ACE_MINI_BUFSIZE - (2 + 16);
2002 rxdesc = &ap->rx_mini_ring[skbidx];
2003 mini_count++;
2004 break;
2005 default:
2006 printk(KERN_INFO "%s: unknown frame type (0x%02x) "
2007 "returned by NIC\n", dev->name,
2008 retdesc->flags);
2009 goto error;
2010 }
2011
2012 skb = rip->skb;
2013 rip->skb = NULL;
2014 pci_unmap_single(ap->pdev, rip->mapping, mapsize,
2015 PCI_DMA_FROMDEVICE);
2016 skb_put(skb, retdesc->size);
2017 #if 0
2018 /* unncessary */
2019 rxdesc->size = 0;
2020 #endif
2021
2022 /*
2023 * Fly baby, fly!
2024 */
2025 csum = retdesc->tcp_udp_csum;
2026
2027 skb->dev = dev;
2028 skb->protocol = eth_type_trans(skb, dev);
2029
2030 /*
2031 * If the checksum is correct and this is not a
2032 * fragment, tell the stack that the data is correct.
2033 */
2034 if(!(csum ^ 0xffff) &&
2035 (!(((struct iphdr *)skb->data)->frag_off &
2036 __constant_htons(IP_MF|IP_OFFSET))))
2037 skb->ip_summed = CHECKSUM_UNNECESSARY;
2038 else
2039 skb->ip_summed = CHECKSUM_NONE;
2040
2041 netif_rx(skb); /* send it up */
2042
2043 ap->stats.rx_packets++;
2044 ap->stats.rx_bytes += retdesc->size;
2045
2046 idx = (idx + 1) % RX_RETURN_RING_ENTRIES;
2047 }
2048
2049 atomic_sub(std_count, &ap->cur_rx_bufs);
2050 if (!ACE_IS_TIGON_I(ap))
2051 atomic_sub(mini_count, &ap->cur_mini_bufs);
2052
2053 out:
2054 /*
2055 * According to the documentation RxRetCsm is obsolete with
2056 * the 12.3.x Firmware - my Tigon I NICs seem to disagree!
2057 */
2058 if (ACE_IS_TIGON_I(ap)) {
2059 struct ace_regs *regs = ap->regs;
2060 writel(idx, ®s->RxRetCsm);
2061 }
2062 ap->cur_rx = idx;
2063
2064 return;
2065 error:
2066 idx = rxretprd;
2067 goto out;
2068 }
2069
2070
2071 static void ace_interrupt(int irq, void *dev_id, struct pt_regs *ptregs)
2072 {
2073 struct ace_private *ap;
2074 struct ace_regs *regs;
2075 struct net_device *dev = (struct net_device *)dev_id;
2076 u32 idx;
2077 u32 txcsm, rxretcsm, rxretprd;
2078 u32 evtcsm, evtprd;
2079
2080 ap = dev->priv;
2081 regs = ap->regs;
2082
2083 /*
2084 * In case of PCI shared interrupts or spurious interrupts,
2085 * we want to make sure it is actually our interrupt before
2086 * spending any time in here.
2087 */
2088 if (!(readl(®s->HostCtrl) & IN_INT))
2089 return;
2090
2091 /*
2092 * Tell the card not to generate interrupts while we are in here.
2093 */
2094 writel(1, ®s->Mb0Lo);
2095
2096 /*
2097 * There is no conflict between transmit handling in
2098 * start_xmit and receive processing, thus there is no reason
2099 * to take a spin lock for RX handling. Wait until we start
2100 * working on the other stuff - hey we don't need a spin lock
2101 * anymore.
2102 */
2103 rxretprd = *ap->rx_ret_prd;
2104 rxretcsm = ap->cur_rx;
2105
2106 if (rxretprd != rxretcsm)
2107 ace_rx_int(dev, rxretprd, rxretcsm);
2108
2109 txcsm = *ap->tx_csm;
2110 idx = ap->tx_ret_csm;
2111
2112 if (txcsm != idx) {
2113 do {
2114 struct sk_buff *skb;
2115
2116 skb = ap->skb->tx_skbuff[idx].skb;
2117 /*
2118 * Race condition between the code cleaning
2119 * the tx queue in the interrupt handler and the
2120 * interface close,
2121 *
2122 * This is a kludge that really should be fixed
2123 * by preventing the driver from generating a tx
2124 * interrupt when the packet has already been
2125 * removed from the tx queue.
2126 *
2127 * Nailed by Don Dugger and Chip Salzenberg of
2128 * VA Linux.
2129 */
2130 if (skb) {
2131 dma_addr_t mapping;
2132
2133 mapping = ap->skb->tx_skbuff[idx].mapping;
2134
2135 ap->stats.tx_packets++;
2136 ap->stats.tx_bytes += skb->len;
2137 pci_unmap_single(ap->pdev, mapping, skb->len,
2138 PCI_DMA_TODEVICE);
2139 dev_kfree_skb_irq(skb);
2140
2141 ap->skb->tx_skbuff[idx].skb = NULL;
2142 }
2143
2144 /*
2145 * Question here is whether one should not skip
2146 * these writes - I have never seen any errors
2147 * caused by the NIC actually trying to access
2148 * these incorrectly.
2149 */
2150 #ifdef ACE_64BIT_PTR
2151 ap->tx_ring[idx].addr.addrhi = 0;
2152 #endif
2153 ap->tx_ring[idx].addr.addrlo = 0;
2154 ap->tx_ring[idx].flagsize = 0;
2155
2156 idx = (idx + 1) % TX_RING_ENTRIES;
2157 } while (idx != txcsm);
2158
2159 /*
2160 * Once we actually get to this point the tx ring has
2161 * already been trimmed thus it cannot be full!
2162 * Ie. skip the comparison of the tx producer vs. the
2163 * consumer.
2164 */
2165 if (netif_queue_stopped(dev) && xchg(&ap->tx_full, 0)) {
2166 /*
2167 * This does not need to be atomic (and expensive),
2168 * I've seen cases where it would fail otherwise ;-(
2169 */
2170 netif_wake_queue(dev);
2171 ace_mark_net_bh();
2172
2173 /*
2174 * TX ring is no longer full, aka the
2175 * transmitter is working fine - kill timer.
2176 */
2177 del_timer(&ap->timer);
2178 }
2179
2180 ap->tx_ret_csm = txcsm;
2181 wmb();
2182 }
2183
2184 evtcsm = readl(®s->EvtCsm);
2185 evtprd = *ap->evt_prd;
2186
2187 if (evtcsm != evtprd) {
2188 evtcsm = ace_handle_event(dev, evtcsm, evtprd);
2189 writel(evtcsm, ®s->EvtCsm);
2190 }
2191
2192 /*
2193 * This has to go last in the interrupt handler and run with
2194 * the spin lock released ... what lock?
2195 */
2196 if (netif_running(dev)) {
2197 int cur_size;
2198 int run_tasklet = 0;
2199
2200 cur_size = atomic_read(&ap->cur_rx_bufs);
2201 if (cur_size < RX_LOW_STD_THRES) {
2202 if ((cur_size < RX_PANIC_STD_THRES) &&
2203 !test_and_set_bit(0, &ap->std_refill_busy)) {
2204 #if DEBUG
2205 printk("low on std buffers %i\n", cur_size);
2206 #endif
2207 ace_load_std_rx_ring(ap,
2208 RX_RING_SIZE - cur_size);
2209 } else
2210 run_tasklet = 1;
2211 }
2212
2213 if (!ACE_IS_TIGON_I(ap)) {
2214 cur_size = atomic_read(&ap->cur_mini_bufs);
2215 if (cur_size < RX_LOW_MINI_THRES) {
2216 if ((cur_size < RX_PANIC_MINI_THRES) &&
2217 !test_and_set_bit(0,
2218 &ap->mini_refill_busy)) {
2219 #if DEBUG
2220 printk("low on mini buffers %i\n",
2221 cur_size);
2222 #endif
2223 ace_load_mini_rx_ring(ap, RX_MINI_SIZE - cur_size);
2224 } else
2225 run_tasklet = 1;
2226 }
2227 }
2228
2229 if (ap->jumbo) {
2230 cur_size = atomic_read(&ap->cur_jumbo_bufs);
2231 if (cur_size < RX_LOW_JUMBO_THRES) {
2232 if ((cur_size < RX_PANIC_JUMBO_THRES) &&
2233 !test_and_set_bit(0,
2234 &ap->jumbo_refill_busy)){
2235 #if DEBUG
2236 printk("low on jumbo buffers %i\n",
2237 cur_size);
2238 #endif
2239 ace_load_jumbo_rx_ring(ap, RX_JUMBO_SIZE - cur_size);
2240 } else
2241 run_tasklet = 1;
2242 }
2243 }
2244 if (run_tasklet && !ap->tasklet_pending) {
2245 ap->tasklet_pending = 1;
2246 tasklet_schedule(&ap->ace_tasklet);
2247 }
2248 }
2249
2250 /*
2251 * Allow the card to generate interrupts again
2252 */
2253 writel(0, ®s->Mb0Lo);
2254 }
2255
2256
2257 static int ace_open(struct net_device *dev)
2258 {
2259 struct ace_private *ap;
2260 struct ace_regs *regs;
2261 struct cmd cmd;
2262
2263 ap = dev->priv;
2264 regs = ap->regs;
2265
2266 if (!(ap->fw_running)) {
2267 printk(KERN_WARNING "%s: Firmware not running!\n", dev->name);
2268 return -EBUSY;
2269 }
2270
2271 writel(dev->mtu + ETH_HLEN + 4, ®s->IfMtu);
2272
2273 /*
2274 * Zero the stats when restarting the interface...
2275 */
2276 memset(&ap->stats, 0, sizeof(ap->stats));
2277
2278 cmd.evt = C_CLEAR_STATS;
2279 cmd.code = 0;
2280 cmd.idx = 0;
2281 ace_issue_cmd(regs, &cmd);
2282
2283 cmd.evt = C_HOST_STATE;
2284 cmd.code = C_C_STACK_UP;
2285 cmd.idx = 0;
2286 ace_issue_cmd(regs, &cmd);
2287
2288 if (ap->jumbo &&
2289 !test_and_set_bit(0, &ap->jumbo_refill_busy))
2290 ace_load_jumbo_rx_ring(ap, RX_JUMBO_SIZE);
2291
2292 if (dev->flags & IFF_PROMISC) {
2293 cmd.evt = C_SET_PROMISC_MODE;
2294 cmd.code = C_C_PROMISC_ENABLE;
2295 cmd.idx = 0;
2296 ace_issue_cmd(regs, &cmd);
2297
2298 ap->promisc = 1;
2299 }else
2300 ap->promisc = 0;
2301 ap->mcast_all = 0;
2302
2303 #if 0
2304 cmd.evt = C_LNK_NEGOTIATION;
2305 cmd.code = 0;
2306 cmd.idx = 0;
2307 ace_issue_cmd(regs, &cmd);
2308 #endif
2309
2310 netif_start_queue(dev);
2311
2312 ACE_MOD_INC_USE_COUNT;
2313
2314 /*
2315 * Setup the timer
2316 */
2317 init_timer(&ap->timer);
2318 ap->timer.data = (unsigned long)dev;
2319 ap->timer.function = ace_timer;
2320
2321 /*
2322 * Setup the bottom half rx ring refill handler
2323 */
2324 tasklet_init(&ap->ace_tasklet, ace_tasklet, (unsigned long)dev);
2325 return 0;
2326 }
2327
2328
2329 static int ace_close(struct net_device *dev)
2330 {
2331 struct ace_private *ap;
2332 struct ace_regs *regs;
2333 struct cmd cmd;
2334 unsigned long flags;
2335 short i;
2336
2337 ace_if_down(dev);
2338 netif_stop_queue(dev);
2339
2340 ap = dev->priv;
2341 regs = ap->regs;
2342
2343 del_timer(&ap->timer);
2344
2345 if (ap->promisc) {
2346 cmd.evt = C_SET_PROMISC_MODE;
2347 cmd.code = C_C_PROMISC_DISABLE;
2348 cmd.idx = 0;
2349 ace_issue_cmd(regs, &cmd);
2350 ap->promisc = 0;
2351 }
2352
2353 cmd.evt = C_HOST_STATE;
2354 cmd.code = C_C_STACK_DOWN;
2355 cmd.idx = 0;
2356 ace_issue_cmd(regs, &cmd);
2357
2358 tasklet_kill(&ap->ace_tasklet);
2359
2360 /*
2361 * Make sure one CPU is not processing packets while
2362 * buffers are being released by another.
2363 */
2364 save_flags(flags);
2365 cli();
2366
2367 for (i = 0; i < TX_RING_ENTRIES; i++) {
2368 struct sk_buff *skb;
2369 dma_addr_t mapping;
2370
2371 skb = ap->skb->tx_skbuff[i].skb;
2372 mapping = ap->skb->tx_skbuff[i].mapping;
2373 if (skb) {
2374 memset(&ap->tx_ring[i].addr, 0, sizeof(struct tx_desc));
2375 pci_unmap_single(ap->pdev, mapping, skb->len,
2376 PCI_DMA_TODEVICE);
2377 dev_kfree_skb(skb);
2378 ap->skb->tx_skbuff[i].skb = NULL;
2379 }
2380 }
2381
2382 if (ap->jumbo) {
2383 cmd.evt = C_RESET_JUMBO_RNG;
2384 cmd.code = 0;
2385 cmd.idx = 0;
2386 ace_issue_cmd(regs, &cmd);
2387 }
2388
2389 restore_flags(flags);
2390
2391 ACE_MOD_DEC_USE_COUNT;
2392 return 0;
2393 }
2394
2395
2396 static int ace_start_xmit(struct sk_buff *skb, struct net_device *dev)
2397 {
2398 struct ace_private *ap = dev->priv;
2399 struct ace_regs *regs = ap->regs;
2400 unsigned long addr;
2401 u32 idx, flagsize;
2402
2403 /*
2404 * This only happens with pre-softnet, ie. 2.2.x kernels.
2405 */
2406 if (early_stop_netif_stop_queue(dev))
2407 return 1;
2408
2409 idx = ap->tx_prd;
2410
2411 if ((idx + 1) % TX_RING_ENTRIES == ap->tx_ret_csm) {
2412 ap->tx_full = 1;
2413 #if DEBUG
2414 printk("%s: trying to transmit while the tx ring is full "
2415 "- this should not happen!\n", dev->name);
2416 #endif
2417 return 1;
2418 }
2419
2420 ap->skb->tx_skbuff[idx].skb = skb;
2421 ap->skb->tx_skbuff[idx].mapping =
2422 pci_map_single(ap->pdev, skb->data, skb->len,
2423 PCI_DMA_TODEVICE);
2424 addr = (unsigned long) ap->skb->tx_skbuff[idx].mapping;
2425 flagsize = (skb->len << 16) | (BD_FLG_END) ;
2426 set_aceaddr(&ap->tx_ring[idx].addr, addr);
2427 ap->tx_ring[idx].flagsize = flagsize;
2428 wmb();
2429 idx = (idx + 1) % TX_RING_ENTRIES;
2430
2431 ap->tx_prd = idx;
2432 ace_set_txprd(regs, ap, idx);
2433
2434 /*
2435 * tx_csm is set by the NIC whereas we set tx_ret_csm which
2436 * is always trying to catch tx_csm
2437 */
2438 if ((idx + 2) % TX_RING_ENTRIES == ap->tx_ret_csm) {
2439 ap->tx_full = 1;
2440 /*
2441 * Queue is full, add timer to detect whether the
2442 * transmitter is stuck. Use mod_timer as we can get
2443 * into the situation where we risk adding several
2444 * timers.
2445 */
2446 mod_timer(&ap->timer, jiffies + (3 * HZ));
2447
2448 /*
2449 * The following check will fix a race between the interrupt
2450 * handler increasing the tx_ret_csm and testing for tx_full
2451 * and this tx routine's testing the tx_ret_csm and setting
2452 * the tx_full; note that this fix makes assumptions on the
2453 * ordering of writes (sequential consistency will fly; TSO
2454 * processor order would work too) but that's what lock-less
2455 * programming is all about
2456 */
2457 if (((idx + 2) % TX_RING_ENTRIES != ap->tx_ret_csm)
2458 && xchg(&ap->tx_full, 0)) {
2459 del_timer(&ap->timer);
2460 /*
2461 * We may not need this one in the post softnet era
2462 * in this case this can be changed to a
2463 * early_stop_netif_wake_queue(dev);
2464 */
2465 netif_wake_queue(dev);
2466 } else {
2467 late_stop_netif_stop_queue(dev);
2468 }
2469 } else {
2470 early_stop_netif_wake_queue(dev);
2471 }
2472
2473 dev->trans_start = jiffies;
2474 return 0;
2475 }
2476
2477
2478 static int ace_change_mtu(struct net_device *dev, int new_mtu)
2479 {
2480 struct ace_private *ap = dev->priv;
2481 struct ace_regs *regs = ap->regs;
2482
2483 if ((new_mtu < 68) || (new_mtu > ACE_JUMBO_MTU))
2484 return -EINVAL;
2485
2486 writel(new_mtu + ETH_HLEN + 4, ®s->IfMtu);
2487 dev->mtu = new_mtu;
2488
2489 if (new_mtu > ACE_STD_MTU) {
2490 if (!(ap->jumbo)) {
2491 printk(KERN_INFO "%s: Enabling Jumbo frame "
2492 "support\n", dev->name);
2493 ap->jumbo = 1;
2494 if (!test_and_set_bit(0, &ap->jumbo_refill_busy))
2495 ace_load_jumbo_rx_ring(ap, RX_JUMBO_SIZE);
2496 ace_set_rxtx_parms(dev, 1);
2497 }
2498 } else {
2499 netif_stop_queue(dev);
2500 while (test_and_set_bit(0, &ap->jumbo_refill_busy));
2501 synchronize_irq();
2502 ace_set_rxtx_parms(dev, 0);
2503 if (ap->jumbo) {
2504 struct cmd cmd;
2505
2506 cmd.evt = C_RESET_JUMBO_RNG;
2507 cmd.code = 0;
2508 cmd.idx = 0;
2509 ace_issue_cmd(regs, &cmd);
2510 }
2511 }
2512
2513 return 0;
2514 }
2515
2516
2517 static int ace_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
2518 {
2519 #ifdef SIOCETHTOOL
2520 struct ace_private *ap = dev->priv;
2521 struct ace_regs *regs = ap->regs;
2522 struct ethtool_cmd ecmd;
2523 u32 link, speed;
2524
2525 #ifdef SPIN_DEBUG
2526 if (cmd == (SIOCDEVPRIVATE+0x0e)) {
2527 printk(KERN_NOTICE "%s: dumping debug info\n", dev->name);
2528 printk(KERN_NOTICE "%s: tbusy %li, tx_ret_csm %i, "
2529 "tx_prd %i\n", dev->name, dev->tbusy,
2530 ap->tx_ret_csm, ap->tx_prd);
2531 printk(KERN_NOTICE "%s: cur_rx %i, std_refill %li, "
2532 "mini_rx %i, mini_refill %li\n", dev->name,
2533 atomic_read(&ap->cur_rx_bufs), ap->std_refill_busy,
2534 atomic_read(&ap->cur_mini_bufs), ap->mini_refill_busy);
2535 printk(KERN_NOTICE "%s: CpuCtrl %08x\n",
2536 dev->name, readl(®s->CpuCtrl));
2537 return 0;
2538 }
2539 #endif
2540 if (cmd != SIOCETHTOOL)
2541 return -EOPNOTSUPP;
2542 if (copy_from_user(&ecmd, ifr->ifr_data, sizeof(ecmd)))
2543 return -EFAULT;
2544
2545 if (ecmd.cmd == ETHTOOL_GSET) {
2546 ecmd.supported =
2547 (SUPPORTED_10baseT_Half | SUPPORTED_10baseT_Full |
2548 SUPPORTED_100baseT_Half | SUPPORTED_100baseT_Full |
2549 SUPPORTED_1000baseT_Half | SUPPORTED_1000baseT_Full |
2550 SUPPORTED_Autoneg | SUPPORTED_FIBRE);
2551
2552 ecmd.port = PORT_FIBRE;
2553 ecmd.transceiver = XCVR_INTERNAL;
2554 ecmd.phy_address = 0;
2555
2556 link = readl(®s->GigLnkState);
2557 if (link & LNK_1000MB)
2558 ecmd.speed = SPEED_1000;
2559 else {
2560 link = readl(®s->FastLnkState);
2561 if (link & LNK_100MB)
2562 ecmd.speed = SPEED_100;
2563 else if (link & LNK_100MB)
2564 ecmd.speed = SPEED_10;
2565 else
2566 ecmd.speed = 0;
2567 }
2568 if (link & LNK_FULL_DUPLEX)
2569 ecmd.duplex = DUPLEX_FULL;
2570 else
2571 ecmd.duplex = DUPLEX_HALF;
2572
2573 if (link & LNK_NEGOTIATE)
2574 ecmd.autoneg = AUTONEG_ENABLE;
2575 else
2576 ecmd.autoneg = AUTONEG_DISABLE;
2577
2578 #if 0
2579 /*
2580 * Current struct ethtool_cmd is insufficient
2581 */
2582 ecmd.trace = readl(®s->TuneTrace);
2583
2584 ecmd.txcoal = readl(®s->TuneTxCoalTicks);
2585 ecmd.rxcoal = readl(®s->TuneRxCoalTicks);
2586 #endif
2587 ecmd.maxtxpkt = readl(®s->TuneMaxTxDesc);
2588 ecmd.maxrxpkt = readl(®s->TuneMaxRxDesc);
2589
2590 if(copy_to_user(ifr->ifr_data, &ecmd, sizeof(ecmd)))
2591 return -EFAULT;
2592 return 0;
2593 } else if (ecmd.cmd == ETHTOOL_SSET) {
2594 if(!capable(CAP_NET_ADMIN))
2595 return -EPERM;
2596
2597 link = readl(®s->GigLnkState);
2598 if (link & LNK_1000MB)
2599 speed = SPEED_1000;
2600 else {
2601 link = readl(®s->FastLnkState);
2602 if (link & LNK_100MB)
2603 speed = SPEED_100;
2604 else if (link & LNK_100MB)
2605 speed = SPEED_10;
2606 else
2607 speed = SPEED_100;
2608 }
2609
2610 link = LNK_ENABLE | LNK_1000MB | LNK_100MB | LNK_10MB |
2611 LNK_RX_FLOW_CTL_Y | LNK_NEG_FCTL;
2612 if (!ACE_IS_TIGON_I(ap))
2613 link |= LNK_TX_FLOW_CTL_Y;
2614 if (ecmd.autoneg == AUTONEG_ENABLE)
2615 link |= LNK_NEGOTIATE;
2616 if (ecmd.speed != speed) {
2617 link &= ~(LNK_1000MB | LNK_100MB | LNK_10MB);
2618 switch (speed) {
2619 case SPEED_1000:
2620 link |= LNK_1000MB;
2621 break;
2622 case SPEED_100:
2623 link |= LNK_100MB;
2624 break;
2625 case SPEED_10:
2626 link |= LNK_10MB;
2627 break;
2628 }
2629 }
2630 if (ecmd.duplex == DUPLEX_FULL)
2631 link |= LNK_FULL_DUPLEX;
2632
2633 if (link != ap->link) {
2634 struct cmd cmd;
2635 printk(KERN_INFO "%s: Renegotiating link state\n",
2636 dev->name);
2637
2638 ap->link = link;
2639 writel(link, ®s->TuneLink);
2640 if (!ACE_IS_TIGON_I(ap))
2641 writel(link, ®s->TuneFastLink);
2642 wmb();
2643
2644 cmd.evt = C_LNK_NEGOTIATION;
2645 cmd.code = 0;
2646 cmd.idx = 0;
2647 ace_issue_cmd(regs, &cmd);
2648 }
2649 return 0;
2650 }
2651 #endif
2652
2653 return -EOPNOTSUPP;
2654 }
2655
2656
2657 /*
2658 * Set the hardware MAC address.
2659 */
2660 static int ace_set_mac_addr(struct net_device *dev, void *p)
2661 {
2662 struct sockaddr *addr=p;
2663 struct ace_regs *regs;
2664 u8 *da;
2665 struct cmd cmd;
2666
2667 if(netif_running(dev))
2668 return -EBUSY;
2669
2670 memcpy(dev->dev_addr, addr->sa_data,dev->addr_len);
2671
2672 da = (u8 *)dev->dev_addr;
2673
2674 regs = ((struct ace_private *)dev->priv)->regs;
2675 writel(da[0] << 8 | da[1], ®s->MacAddrHi);
2676 writel((da[2] << 24) | (da[3] << 16) | (da[4] << 8) | da[5] , ®s->MacAddrLo);
2677
2678 cmd.evt = C_SET_MAC_ADDR;
2679 cmd.code = 0;
2680 cmd.idx = 0;
2681 ace_issue_cmd(regs, &cmd);
2682
2683 return 0;
2684 }
2685
2686
2687 static void ace_set_multicast_list(struct net_device *dev)
2688 {
2689 struct ace_private *ap = dev->priv;
2690 struct ace_regs *regs = ap->regs;
2691 struct cmd cmd;
2692
2693 if ((dev->flags & IFF_ALLMULTI) && !(ap->mcast_all)) {
2694 cmd.evt = C_SET_MULTICAST_MODE;
2695 cmd.code = C_C_MCAST_ENABLE;
2696 cmd.idx = 0;
2697 ace_issue_cmd(regs, &cmd);
2698 ap->mcast_all = 1;
2699 } else if (ap->mcast_all) {
2700 cmd.evt = C_SET_MULTICAST_MODE;
2701 cmd.code = C_C_MCAST_DISABLE;
2702 cmd.idx = 0;
2703 ace_issue_cmd(regs, &cmd);
2704 ap->mcast_all = 0;
2705 }
2706
2707 if ((dev->flags & IFF_PROMISC) && !(ap->promisc)) {
2708 cmd.evt = C_SET_PROMISC_MODE;
2709 cmd.code = C_C_PROMISC_ENABLE;
2710 cmd.idx = 0;
2711 ace_issue_cmd(regs, &cmd);
2712 ap->promisc = 1;
2713 }else if (!(dev->flags & IFF_PROMISC) && (ap->promisc)) {
2714 cmd.evt = C_SET_PROMISC_MODE;
2715 cmd.code = C_C_PROMISC_DISABLE;
2716 cmd.idx = 0;
2717 ace_issue_cmd(regs, &cmd);
2718 ap->promisc = 0;
2719 }
2720
2721 /*
2722 * For the time being multicast relies on the upper layers
2723 * filtering it properly. The Firmware does not allow one to
2724 * set the entire multicast list at a time and keeping track of
2725 * it here is going to be messy.
2726 */
2727 if ((dev->mc_count) && !(ap->mcast_all)) {
2728 cmd.evt = C_SET_MULTICAST_MODE;
2729 cmd.code = C_C_MCAST_ENABLE;
2730 cmd.idx = 0;
2731 ace_issue_cmd(regs, &cmd);
2732 }else if (!ap->mcast_all) {
2733 cmd.evt = C_SET_MULTICAST_MODE;
2734 cmd.code = C_C_MCAST_DISABLE;
2735 cmd.idx = 0;
2736 ace_issue_cmd(regs, &cmd);
2737 }
2738 }
2739
2740
2741 static struct net_device_stats *ace_get_stats(struct net_device *dev)
2742 {
2743 struct ace_private *ap = dev->priv;
2744 struct ace_mac_stats *mac_stats =
2745 (struct ace_mac_stats *)ap->regs->Stats;
2746
2747 ap->stats.rx_missed_errors = readl(&mac_stats->drop_space);
2748 ap->stats.multicast = readl(&mac_stats->kept_mc);
2749 ap->stats.collisions = readl(&mac_stats->coll);
2750
2751 return(&ap->stats);
2752 }
2753
2754
2755 void __init ace_copy(struct ace_regs *regs, void *src, u32 dest, int size)
2756 {
2757 unsigned long tdest;
2758 u32 *wsrc;
2759 short tsize, i;
2760
2761 if (size <= 0)
2762 return;
2763
2764 while (size > 0) {
2765 tsize = min(((~dest & (ACE_WINDOW_SIZE - 1)) + 1),
2766 min(size, ACE_WINDOW_SIZE));
2767 tdest = (unsigned long)®s->Window +
2768 (dest & (ACE_WINDOW_SIZE - 1));
2769 writel(dest & ~(ACE_WINDOW_SIZE - 1), ®s->WinBase);
2770 /*
2771 * This requires byte swapping on big endian, however
2772 * writel does that for us
2773 */
2774 wsrc = src;
2775 for (i = 0; i < (tsize / 4); i++) {
2776 writel(wsrc[i], tdest + i*4);
2777 }
2778 dest += tsize;
2779 src += tsize;
2780 size -= tsize;
2781 }
2782
2783 return;
2784 }
2785
2786
2787 void __init ace_clear(struct ace_regs *regs, u32 dest, int size)
2788 {
2789 unsigned long tdest;
2790 short tsize = 0, i;
2791
2792 if (size <= 0)
2793 return;
2794
2795 while (size > 0) {
2796 tsize = min(((~dest & (ACE_WINDOW_SIZE - 1)) + 1),
2797 min(size, ACE_WINDOW_SIZE));
2798 tdest = (unsigned long)®s->Window +
2799 (dest & (ACE_WINDOW_SIZE - 1));
2800 writel(dest & ~(ACE_WINDOW_SIZE - 1), ®s->WinBase);
2801
2802 for (i = 0; i < (tsize / 4); i++) {
2803 writel(0, tdest + i*4);
2804 }
2805
2806 dest += tsize;
2807 size -= tsize;
2808 }
2809
2810 return;
2811 }
2812
2813
2814 /*
2815 * Download the firmware into the SRAM on the NIC
2816 *
2817 * This operation requires the NIC to be halted and is performed with
2818 * interrupts disabled and with the spinlock hold.
2819 */
2820 int __init ace_load_firmware(struct net_device *dev)
2821 {
2822 struct ace_private *ap;
2823 struct ace_regs *regs;
2824
2825 ap = dev->priv;
2826 regs = ap->regs;
2827
2828 if (!(readl(®s->CpuCtrl) & CPU_HALTED)) {
2829 printk(KERN_ERR "%s: trying to download firmware while the "
2830 "CPU is running!\n", dev->name);
2831 return -EFAULT;
2832 }
2833
2834 /*
2835 * Do not try to clear more than 512KB or we end up seeing
2836 * funny things on NICs with only 512KB SRAM
2837 */
2838 ace_clear(regs, 0x2000, 0x80000-0x2000);
2839 if (ACE_IS_TIGON_I(ap)) {
2840 ace_copy(regs, tigonFwText, tigonFwTextAddr, tigonFwTextLen);
2841 ace_copy(regs, tigonFwData, tigonFwDataAddr, tigonFwDataLen);
2842 ace_copy(regs, tigonFwRodata, tigonFwRodataAddr,
2843 tigonFwRodataLen);
2844 ace_clear(regs, tigonFwBssAddr, tigonFwBssLen);
2845 ace_clear(regs, tigonFwSbssAddr, tigonFwSbssLen);
2846 }else if (ap->version == 2) {
2847 ace_clear(regs, tigon2FwBssAddr, tigon2FwBssLen);
2848 ace_clear(regs, tigon2FwSbssAddr, tigon2FwSbssLen);
2849 ace_copy(regs, tigon2FwText, tigon2FwTextAddr,tigon2FwTextLen);
2850 ace_copy(regs, tigon2FwRodata, tigon2FwRodataAddr,
2851 tigon2FwRodataLen);
2852 ace_copy(regs, tigon2FwData, tigon2FwDataAddr,tigon2FwDataLen);
2853 }
2854
2855 return 0;
2856 }
2857
2858
2859 /*
2860 * The eeprom on the AceNIC is an Atmel i2c EEPROM.
2861 *
2862 * Accessing the EEPROM is `interesting' to say the least - don't read
2863 * this code right after dinner.
2864 *
2865 * This is all about black magic and bit-banging the device .... I
2866 * wonder in what hospital they have put the guy who designed the i2c
2867 * specs.
2868 *
2869 * Oh yes, this is only the beginning!
2870 *
2871 * Thanks to Stevarino Webinski for helping tracking down the bugs in the
2872 * code i2c readout code by beta testing all my hacks.
2873 */
2874 static void __init eeprom_start(struct ace_regs *regs)
2875 {
2876 u32 local;
2877
2878 udelay(ACE_SHORT_DELAY);
2879 local = readl(®s->LocalCtrl);
2880 local |= EEPROM_DATA_OUT | EEPROM_WRITE_ENABLE;
2881 writel(local, ®s->LocalCtrl);
2882 mb();
2883 udelay(ACE_SHORT_DELAY);
2884 local |= EEPROM_CLK_OUT;
2885 writel(local, ®s->LocalCtrl);
2886 mb();
2887 udelay(ACE_SHORT_DELAY);
2888 local &= ~EEPROM_DATA_OUT;
2889 writel(local, ®s->LocalCtrl);
2890 mb();
2891 udelay(ACE_SHORT_DELAY);
2892 local &= ~EEPROM_CLK_OUT;
2893 writel(local, ®s->LocalCtrl);
2894 mb();
2895 }
2896
2897
2898 static void __init eeprom_prep(struct ace_regs *regs, u8 magic)
2899 {
2900 short i;
2901 u32 local;
2902
2903 udelay(ACE_SHORT_DELAY);
2904 local = readl(®s->LocalCtrl);
2905 local &= ~EEPROM_DATA_OUT;
2906 local |= EEPROM_WRITE_ENABLE;
2907 writel(local, ®s->LocalCtrl);
2908 mb();
2909
2910 for (i = 0; i < 8; i++, magic <<= 1) {
2911 udelay(ACE_SHORT_DELAY);
2912 if (magic & 0x80)
2913 local |= EEPROM_DATA_OUT;
2914 else
2915 local &= ~EEPROM_DATA_OUT;
2916 writel(local, ®s->LocalCtrl);
2917 mb();
2918
2919 udelay(ACE_SHORT_DELAY);
2920 local |= EEPROM_CLK_OUT;
2921 writel(local, ®s->LocalCtrl);
2922 mb();
2923 udelay(ACE_SHORT_DELAY);
2924 local &= ~(EEPROM_CLK_OUT | EEPROM_DATA_OUT);
2925 writel(local, ®s->LocalCtrl);
2926 mb();
2927 }
2928 }
2929
2930
2931 static int __init eeprom_check_ack(struct ace_regs *regs)
2932 {
2933 int state;
2934 u32 local;
2935
2936 local = readl(®s->LocalCtrl);
2937 local &= ~EEPROM_WRITE_ENABLE;
2938 writel(local, ®s->LocalCtrl);
2939 mb();
2940 udelay(ACE_LONG_DELAY);
2941 local |= EEPROM_CLK_OUT;
2942 writel(local, ®s->LocalCtrl);
2943 mb();
2944 udelay(ACE_SHORT_DELAY);
2945 /* sample data in middle of high clk */
2946 state = (readl(®s->LocalCtrl) & EEPROM_DATA_IN) != 0;
2947 udelay(ACE_SHORT_DELAY);
2948 mb();
2949 writel(readl(®s->LocalCtrl) & ~EEPROM_CLK_OUT, ®s->LocalCtrl);
2950 mb();
2951
2952 return state;
2953 }
2954
2955
2956 static void __init eeprom_stop(struct ace_regs *regs)
2957 {
2958 u32 local;
2959
2960 udelay(ACE_SHORT_DELAY);
2961 local = readl(®s->LocalCtrl);
2962 local |= EEPROM_WRITE_ENABLE;
2963 writel(local, ®s->LocalCtrl);
2964 mb();
2965 udelay(ACE_SHORT_DELAY);
2966 local &= ~EEPROM_DATA_OUT;
2967 writel(local, ®s->LocalCtrl);
2968 mb();
2969 udelay(ACE_SHORT_DELAY);
2970 local |= EEPROM_CLK_OUT;
2971 writel(local, ®s->LocalCtrl);
2972 mb();
2973 udelay(ACE_SHORT_DELAY);
2974 local |= EEPROM_DATA_OUT;
2975 writel(local, ®s->LocalCtrl);
2976 mb();
2977 udelay(ACE_LONG_DELAY);
2978 local &= ~EEPROM_CLK_OUT;
2979 writel(local, ®s->LocalCtrl);
2980 mb();
2981 }
2982
2983
2984 /*
2985 * Read a whole byte from the EEPROM.
2986 */
2987 static int __init read_eeprom_byte(struct net_device *dev,
2988 unsigned long offset)
2989 {
2990 struct ace_regs *regs;
2991 unsigned long flags;
2992 u32 local;
2993 int result = 0;
2994 short i;
2995
2996 if (!dev) {
2997 printk(KERN_ERR "No device!\n");
2998 result = -ENODEV;
2999 goto eeprom_read_error;
3000 }
3001
3002 regs = ((struct ace_private *)dev->priv)->regs;
3003
3004 /*
3005 * Don't take interrupts on this CPU will bit banging
3006 * the %#%#@$ I2C device
3007 */
3008 __save_flags(flags);
3009 __cli();
3010
3011 eeprom_start(regs);
3012
3013 eeprom_prep(regs, EEPROM_WRITE_SELECT);
3014 if (eeprom_check_ack(regs)) {
3015 __restore_flags(flags);
3016 printk(KERN_ERR "%s: Unable to sync eeprom\n", dev->name);
3017 result = -EIO;
3018 goto eeprom_read_error;
3019 }
3020
3021 eeprom_prep(regs, (offset >> 8) & 0xff);
3022 if (eeprom_check_ack(regs)) {
3023 __restore_flags(flags);
3024 printk(KERN_ERR "%s: Unable to set address byte 0\n",
3025 dev->name);
3026 result = -EIO;
3027 goto eeprom_read_error;
3028 }
3029
3030 eeprom_prep(regs, offset & 0xff);
3031 if (eeprom_check_ack(regs)) {
3032 __restore_flags(flags);
3033 printk(KERN_ERR "%s: Unable to set address byte 1\n",
3034 dev->name);
3035 result = -EIO;
3036 goto eeprom_read_error;
3037 }
3038
3039 eeprom_start(regs);
3040 eeprom_prep(regs, EEPROM_READ_SELECT);
3041 if (eeprom_check_ack(regs)) {
3042 __restore_flags(flags);
3043 printk(KERN_ERR "%s: Unable to set READ_SELECT\n",
3044 dev->name);
3045 result = -EIO;
3046 goto eeprom_read_error;
3047 }
3048
3049 for (i = 0; i < 8; i++) {
3050 local = readl(®s->LocalCtrl);
3051 local &= ~EEPROM_WRITE_ENABLE;
3052 writel(local, ®s->LocalCtrl);
3053 udelay(ACE_LONG_DELAY);
3054 mb();
3055 local |= EEPROM_CLK_OUT;
3056 writel(local, ®s->LocalCtrl);
3057 mb();
3058 udelay(ACE_SHORT_DELAY);
3059 /* sample data mid high clk */
3060 result = (result << 1) |
3061 ((readl(®s->LocalCtrl) & EEPROM_DATA_IN) != 0);
3062 udelay(ACE_SHORT_DELAY);
3063 mb();
3064 local = readl(®s->LocalCtrl);
3065 local &= ~EEPROM_CLK_OUT;
3066 writel(local, ®s->LocalCtrl);
3067 udelay(ACE_SHORT_DELAY);
3068 mb();
3069 if (i == 7) {
3070 local |= EEPROM_WRITE_ENABLE;
3071 writel(local, ®s->LocalCtrl);
3072 mb();
3073 udelay(ACE_SHORT_DELAY);
3074 }
3075 }
3076
3077 local |= EEPROM_DATA_OUT;
3078 writel(local, ®s->LocalCtrl);
3079 mb();
3080 udelay(ACE_SHORT_DELAY);
3081 writel(readl(®s->LocalCtrl) | EEPROM_CLK_OUT, ®s->LocalCtrl);
3082 udelay(ACE_LONG_DELAY);
3083 writel(readl(®s->LocalCtrl) & ~EEPROM_CLK_OUT, ®s->LocalCtrl);
3084 mb();
3085 udelay(ACE_SHORT_DELAY);
3086 eeprom_stop(regs);
3087
3088 __restore_flags(flags);
3089 out:
3090 return result;
3091
3092 eeprom_read_error:
3093 printk(KERN_ERR "%s: Unable to read eeprom byte 0x%02lx\n",
3094 dev->name, offset);
3095 goto out;
3096 }
3097
3098
3099 /*
3100 * Local variables:
3101 * compile-command: "gcc -D__KERNEL__ -DMODULE -I../../include -Wall -Wstrict-prototypes -O2 -fomit-frame-pointer -pipe -fno-strength-reduce -DMODVERSIONS -include ../../include/linux/modversions.h -c -o acenic.o acenic.c"
3102 * End:
3103 */
3104
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