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Linux Cross Reference
Linux/drivers/media/video/saa7196.h

Version: ~ [ 2.2.5 ] ~ [ 2.4.1 ] ~ [ 2.4.9 ] ~ [ 2.6.17.10 ] ~
Architecture: ~ [ i386 ] ~ [ alpha ] ~ [ m68k ] ~ [ mips ] ~ [ ppc ] ~ [ sparc ] ~ [ sparc64 ] ~

  1 /*
  2     Definitions for the Philips SAA7196 digital video decoder,
  3     scaler, and clock generator circuit (DESCpro), as used in
  4     the PlanB video input of the Powermac 7x00/8x00 series.
  5   
  6     Copyright (C) 1998 Michel Lanners (mlan@cpu.lu)
  7 
  8     The register defines are shamelessly copied from the meteor
  9     driver out of NetBSD (with permission),
 10     and are copyrighted (c) 1995 Mark Tinguely and Jim Lowe
 11     (Thanks !)
 12   
 13     Additional debugging and coding by Takashi Oe (toe@unlinfo.unl.edu)
 14 
 15     The default values used for PlanB are my mistakes.
 16 */
 17 
 18 /* $Id: saa7196.h,v 1.5 1999/03/26 23:28:47 mlan Exp $ */
 19 
 20 #ifndef _SAA7196_H_
 21 #define _SAA7196_H_
 22 
 23 #define SAA7196_NUMREGS 0x31    /* Number of registers (used)*/
 24 #define NUM_SUPPORTED_NORM 3    /* Number of supported norms by PlanB */
 25 
 26 /* Decoder part: */
 27 #define SAA7196_IDEL    0x00    /* Increment delay */
 28 #define SAA7196_HSB5    0x01    /* H-sync begin; 50 hz */
 29 #define SAA7196_HSS5    0x02    /* H-sync stop; 50 hz */
 30 #define SAA7196_HCB5    0x03    /* H-clamp begin; 50 hz */
 31 #define SAA7196_HCS5    0x04    /* H-clamp stop; 50 hz */
 32 #define SAA7196_HSP5    0x05    /* H-sync after PHI1; 50 hz */
 33 #define SAA7196_LUMC    0x06    /* Luminance control */
 34 #define SAA7196_HUEC    0x07    /* Hue control */
 35 #define SAA7196_CKTQ    0x08    /* Colour Killer Threshold QAM (PAL, NTSC) */
 36 #define SAA7196_CKTS    0x09    /* Colour Killer Threshold SECAM */
 37 #define SAA7196_PALS    0x0a    /* PAL switch sensitivity */
 38 #define SAA7196_SECAMS  0x0b    /* SECAM switch sensitivity */
 39 #define SAA7196_CGAINC  0x0c    /* Chroma gain control */
 40 #define SAA7196_STDC    0x0d    /* Standard/Mode control */
 41 #define SAA7196_IOCC    0x0e    /* I/O and Clock Control */
 42 #define SAA7196_CTRL1   0x0f    /* Control #1 */
 43 #define SAA7196_CTRL2   0x10    /* Control #2 */
 44 #define SAA7196_CGAINR  0x11    /* Chroma Gain Reference */
 45 #define SAA7196_CSAT    0x12    /* Chroma Saturation */
 46 #define SAA7196_CONT    0x13    /* Luminance Contrast */
 47 #define SAA7196_HSB6    0x14    /* H-sync begin; 60 hz */
 48 #define SAA7196_HSS6    0x15    /* H-sync stop; 60 hz */
 49 #define SAA7196_HCB6    0x16    /* H-clamp begin; 60 hz */
 50 #define SAA7196_HCS6    0x17    /* H-clamp stop; 60 hz */
 51 #define SAA7196_HSP6    0x18    /* H-sync after PHI1; 60 hz */
 52 #define SAA7196_BRIG    0x19    /* Luminance Brightness */
 53 
 54 /* Scaler part: */
 55 #define SAA7196_FMTS    0x20    /* Formats and sequence */
 56 #define SAA7196_OUTPIX  0x21    /* Output data pixel/line */
 57 #define SAA7196_INPIX   0x22    /* Input data pixel/line */
 58 #define SAA7196_HWS     0x23    /* Horiz. window start */
 59 #define SAA7196_HFILT   0x24    /* Horiz. filter */
 60 #define SAA7196_OUTLINE 0x25    /* Output data lines/field */
 61 #define SAA7196_INLINE  0x26    /* Input data lines/field */
 62 #define SAA7196_VWS     0x27    /* Vertical window start */
 63 #define SAA7196_VYP     0x28    /* AFS/vertical Y processing */
 64 #define SAA7196_VBS     0x29    /* Vertical Bypass start */
 65 #define SAA7196_VBCNT   0x2a    /* Vertical Bypass count */
 66 #define SAA7196_VBP     0x2b    /* veritcal Bypass Polarity */
 67 #define SAA7196_VLOW    0x2c    /* Colour-keying lower V limit */
 68 #define SAA7196_VHIGH   0x2d    /* Colour-keying upper V limit */
 69 #define SAA7196_ULOW    0x2e    /* Colour-keying lower U limit */
 70 #define SAA7196_UHIGH   0x2f    /* Colour-keying upper U limit */
 71 #define SAA7196_DPATH   0x30    /* Data path setting  */
 72 
 73 /* Initialization default values: */
 74 
 75 unsigned char saa_regs[NUM_SUPPORTED_NORM][SAA7196_NUMREGS] = {
 76 
 77 /* PAL, 768x576 (no scaling), composite video-in */
 78 /* Decoder: */
 79       { 0x50, 0x30, 0x00, 0xe8, 0xb6, 0xe5, 0x63, 0xff,
 80         0xfe, 0xf0, 0xfe, 0xe0, 0x20, 0x06, 0x3b, 0x98,
 81         0x00, 0x59, 0x41, 0x45, 0x34, 0x0a, 0xf4, 0xd2,
 82         0xe9, 0xa2,
 83 /* Padding */
 84                     0x80, 0x80, 0x80, 0x80, 0x80, 0x80,
 85 /* Scaler: */
 86         0x72, 0x80, 0x00, 0x03, 0x8d, 0x20, 0x20, 0x12,
 87         0xa5, 0x12, 0x00, 0x00, 0x04, 0x00, 0x04, 0x00,
 88         0x87 },
 89 
 90 /* NTSC, 640x480? (no scaling), composite video-in */
 91 /* Decoder: */
 92       { 0x50, 0x30, 0x00, 0xe8, 0xb6, 0xe5, 0x50, 0x00,
 93         0xf8, 0xf0, 0xfe, 0xe0, 0x00, 0x06, 0x3b, 0x98,
 94         0x00, 0x2c, 0x3d, 0x40, 0x34, 0x0a, 0xf4, 0xd2,
 95         0xe9, 0x98,
 96 /* Padding */
 97                     0x80, 0x80, 0x80, 0x80, 0x80, 0x80,
 98 /* Scaler: */
 99         0x72, 0x80, 0x80, 0x03, 0x89, 0xf0, 0xf0, 0x0d,
100         0xa0, 0x0d, 0x00, 0x00, 0x04, 0x00, 0x04, 0x00,
101         0x87 },
102 
103 /* SECAM, 768x576 (no scaling), composite video-in */
104 /* Decoder: */
105       { 0x50, 0x30, 0x00, 0xe8, 0xb6, 0xe5, 0x63, 0xff,
106         0xfe, 0xf0, 0xfe, 0xe0, 0x20, 0x07, 0x3b, 0x98,
107         0x00, 0x59, 0x41, 0x45, 0x34, 0x0a, 0xf4, 0xd2,
108         0xe9, 0xa2,
109 /* Padding */
110                     0x80, 0x80, 0x80, 0x80, 0x80, 0x80,
111 /* Scaler: */
112         0x72, 0x80, 0x00, 0x03, 0x8d, 0x20, 0x20, 0x12,
113         0xa5, 0x12, 0x00, 0x00, 0x04, 0x00, 0x04, 0x00,
114         0x87 }
115         };
116 
117 #endif /* _SAA7196_H_ */
118 

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