1 /*
2 * linux/drivers/ide/ide-dma.c Version 4.10 June 9, 2000
3 *
4 * Copyright (c) 1999-2000 Andre Hedrick <andre@linux-ide.org>
5 * May be copied or modified under the terms of the GNU General Public License
6 */
7
8 /*
9 * Special Thanks to Mark for his Six years of work.
10 *
11 * Copyright (c) 1995-1998 Mark Lord
12 * May be copied or modified under the terms of the GNU General Public License
13 */
14
15 /*
16 * This module provides support for the bus-master IDE DMA functions
17 * of various PCI chipsets, including the Intel PIIX (i82371FB for
18 * the 430 FX chipset), the PIIX3 (i82371SB for the 430 HX/VX and
19 * 440 chipsets), and the PIIX4 (i82371AB for the 430 TX chipset)
20 * ("PIIX" stands for "PCI ISA IDE Xcellerator").
21 *
22 * Pretty much the same code works for other IDE PCI bus-mastering chipsets.
23 *
24 * DMA is supported for all IDE devices (disk drives, cdroms, tapes, floppies).
25 *
26 * By default, DMA support is prepared for use, but is currently enabled only
27 * for drives which already have DMA enabled (UltraDMA or mode 2 multi/single),
28 * or which are recognized as "good" (see table below). Drives with only mode0
29 * or mode1 (multi/single) DMA should also work with this chipset/driver
30 * (eg. MC2112A) but are not enabled by default.
31 *
32 * Use "hdparm -i" to view modes supported by a given drive.
33 *
34 * The hdparm-3.5 (or later) utility can be used for manually enabling/disabling
35 * DMA support, but must be (re-)compiled against this kernel version or later.
36 *
37 * To enable DMA, use "hdparm -d1 /dev/hd?" on a per-drive basis after booting.
38 * If problems arise, ide.c will disable DMA operation after a few retries.
39 * This error recovery mechanism works and has been extremely well exercised.
40 *
41 * IDE drives, depending on their vintage, may support several different modes
42 * of DMA operation. The boot-time modes are indicated with a "*" in
43 * the "hdparm -i" listing, and can be changed with *knowledgeable* use of
44 * the "hdparm -X" feature. There is seldom a need to do this, as drives
45 * normally power-up with their "best" PIO/DMA modes enabled.
46 *
47 * Testing has been done with a rather extensive number of drives,
48 * with Quantum & Western Digital models generally outperforming the pack,
49 * and Fujitsu & Conner (and some Seagate which are really Conner) drives
50 * showing more lackluster throughput.
51 *
52 * Keep an eye on /var/adm/messages for "DMA disabled" messages.
53 *
54 * Some people have reported trouble with Intel Zappa motherboards.
55 * This can be fixed by upgrading the AMI BIOS to version 1.00.04.BS0,
56 * available from ftp://ftp.intel.com/pub/bios/10004bs0.exe
57 * (thanks to Glen Morrell <glen@spin.Stanford.edu> for researching this).
58 *
59 * Thanks to "Christopher J. Reimer" <reimer@doe.carleton.ca> for
60 * fixing the problem with the BIOS on some Acer motherboards.
61 *
62 * Thanks to "Benoit Poulot-Cazajous" <poulot@chorus.fr> for testing
63 * "TX" chipset compatibility and for providing patches for the "TX" chipset.
64 *
65 * Thanks to Christian Brunner <chb@muc.de> for taking a good first crack
66 * at generic DMA -- his patches were referred to when preparing this code.
67 *
68 * Most importantly, thanks to Robert Bringman <rob@mars.trion.com>
69 * for supplying a Promise UDMA board & WD UDMA drive for this work!
70 *
71 * And, yes, Intel Zappa boards really *do* use both PIIX IDE ports.
72 *
73 * check_drive_lists(ide_drive_t *drive, int good_bad)
74 *
75 * ATA-66/100 and recovery functions, I forgot the rest......
76 * SELECT_READ_WRITE(hwif,drive,func) for active tuning based on IO direction.
77 *
78 */
79
80 #include <linux/config.h>
81 #include <linux/types.h>
82 #include <linux/kernel.h>
83 #include <linux/timer.h>
84 #include <linux/mm.h>
85 #include <linux/interrupt.h>
86 #include <linux/pci.h>
87 #include <linux/init.h>
88 #include <linux/ide.h>
89
90 #include <asm/io.h>
91 #include <asm/irq.h>
92
93 #undef CONFIG_BLK_DEV_IDEDMA_TIMEOUT
94
95 extern char *ide_dmafunc_verbose(ide_dma_action_t dmafunc);
96
97 #ifdef CONFIG_IDEDMA_NEW_DRIVE_LISTINGS
98
99 struct drive_list_entry {
100 char * id_model;
101 char * id_firmware;
102 };
103
104 struct drive_list_entry drive_whitelist [] = {
105
106 { "Micropolis 2112A" , "ALL" },
107 { "CONNER CTMA 4000" , "ALL" },
108 { "CONNER CTT8000-A" , "ALL" },
109 { "ST34342A" , "ALL" },
110 { 0 , 0 }
111 };
112
113 struct drive_list_entry drive_blacklist [] = {
114
115 { "WDC AC11000H" , "ALL" },
116 { "WDC AC22100H" , "ALL" },
117 { "WDC AC32500H" , "ALL" },
118 { "WDC AC33100H" , "ALL" },
119 { "WDC AC31600H" , "ALL" },
120 { "WDC AC32100H" , "24.09P07" },
121 { "WDC AC23200L" , "21.10N21" },
122 { 0 , 0 }
123
124 };
125
126 int in_drive_list(struct hd_driveid *id, struct drive_list_entry * drive_table)
127 {
128 for ( ; drive_table->id_model ; drive_table++)
129 if ((!strcmp(drive_table->id_model, id->model)) &&
130 ((!strstr(drive_table->id_firmware, id->fw_rev)) ||
131 (!strcmp(drive_table->id_firmware, "ALL"))))
132 return 1;
133 return 0;
134 }
135
136 #else /* !CONFIG_IDEDMA_NEW_DRIVE_LISTINGS */
137
138 /*
139 * good_dma_drives() lists the model names (from "hdparm -i")
140 * of drives which do not support mode2 DMA but which are
141 * known to work fine with this interface under Linux.
142 */
143 const char *good_dma_drives[] = {"Micropolis 2112A",
144 "CONNER CTMA 4000",
145 "CONNER CTT8000-A",
146 "ST34342A", /* for Sun Ultra */
147 NULL};
148
149 /*
150 * bad_dma_drives() lists the model names (from "hdparm -i")
151 * of drives which supposedly support (U)DMA but which are
152 * known to corrupt data with this interface under Linux.
153 *
154 * This is an empirical list. Its generated from bug reports. That means
155 * while it reflects actual problem distributions it doesn't answer whether
156 * the drive or the controller, or cabling, or software, or some combination
157 * thereof is the fault. If you don't happen to agree with the kernel's
158 * opinion of your drive - use hdparm to turn DMA on.
159 */
160 const char *bad_dma_drives[] = {"WDC AC11000H",
161 "WDC AC22100H",
162 "WDC AC32100H",
163 "WDC AC32500H",
164 "WDC AC33100H",
165 "WDC AC31600H",
166 NULL};
167
168 #endif /* CONFIG_IDEDMA_NEW_DRIVE_LISTINGS */
169
170 /*
171 * Our Physical Region Descriptor (PRD) table should be large enough
172 * to handle the biggest I/O request we are likely to see. Since requests
173 * can have no more than 256 sectors, and since the typical blocksize is
174 * two or more sectors, we could get by with a limit of 128 entries here for
175 * the usual worst case. Most requests seem to include some contiguous blocks,
176 * further reducing the number of table entries required.
177 *
178 * The driver reverts to PIO mode for individual requests that exceed
179 * this limit (possible with 512 byte blocksizes, eg. MSDOS f/s), so handling
180 * 100% of all crazy scenarios here is not necessary.
181 *
182 * As it turns out though, we must allocate a full 4KB page for this,
183 * so the two PRD tables (ide0 & ide1) will each get half of that,
184 * allowing each to have about 256 entries (8 bytes each) from this.
185 */
186 #define PRD_BYTES 8
187 #define PRD_ENTRIES (PAGE_SIZE / (2 * PRD_BYTES))
188
189 /*
190 * dma_intr() is the handler for disk read/write DMA interrupts
191 */
192 ide_startstop_t ide_dma_intr (ide_drive_t *drive)
193 {
194 int i;
195 byte stat, dma_stat;
196
197 dma_stat = HWIF(drive)->dmaproc(ide_dma_end, drive);
198 stat = GET_STAT(); /* get drive status */
199 if (OK_STAT(stat,DRIVE_READY,drive->bad_wstat|DRQ_STAT)) {
200 if (!dma_stat) {
201 struct request *rq = HWGROUP(drive)->rq;
202 rq = HWGROUP(drive)->rq;
203 for (i = rq->nr_sectors; i > 0;) {
204 i -= rq->current_nr_sectors;
205 ide_end_request(1, HWGROUP(drive));
206 }
207 return ide_stopped;
208 }
209 printk("%s: dma_intr: bad DMA status\n", drive->name);
210 }
211 return ide_error(drive, "dma_intr", stat);
212 }
213
214 static int ide_build_sglist (ide_hwif_t *hwif, struct request *rq)
215 {
216 struct buffer_head *bh;
217 struct scatterlist *sg = hwif->sg_table;
218 int nents = 0;
219
220 if (rq->cmd == READ)
221 hwif->sg_dma_direction = PCI_DMA_FROMDEVICE;
222 else
223 hwif->sg_dma_direction = PCI_DMA_TODEVICE;
224 bh = rq->bh;
225 do {
226 unsigned char *virt_addr = bh->b_data;
227 unsigned int size = bh->b_size;
228
229 if (nents >= PRD_ENTRIES)
230 return 0;
231
232 while ((bh = bh->b_reqnext) != NULL) {
233 if ((virt_addr + size) != (unsigned char *) bh->b_data)
234 break;
235 size += bh->b_size;
236 }
237 memset(&sg[nents], 0, sizeof(*sg));
238 sg[nents].address = virt_addr;
239 sg[nents].length = size;
240 nents++;
241 } while (bh != NULL);
242
243 return pci_map_sg(hwif->pci_dev, sg, nents, hwif->sg_dma_direction);
244 }
245
246 /*
247 * ide_build_dmatable() prepares a dma request.
248 * Returns 0 if all went okay, returns 1 otherwise.
249 * May also be invoked from trm290.c
250 */
251 int ide_build_dmatable (ide_drive_t *drive, ide_dma_action_t func)
252 {
253 unsigned int *table = HWIF(drive)->dmatable_cpu;
254 #ifdef CONFIG_BLK_DEV_TRM290
255 unsigned int is_trm290_chipset = (HWIF(drive)->chipset == ide_trm290);
256 #else
257 const int is_trm290_chipset = 0;
258 #endif
259 unsigned int count = 0;
260 int i;
261 struct scatterlist *sg;
262
263 HWIF(drive)->sg_nents = i = ide_build_sglist(HWIF(drive), HWGROUP(drive)->rq);
264
265 if (!i)
266 return 0;
267
268 sg = HWIF(drive)->sg_table;
269 while (i && sg_dma_len(sg)) {
270 u32 cur_addr;
271 u32 cur_len;
272
273 cur_addr = sg_dma_address(sg);
274 cur_len = sg_dma_len(sg);
275
276 /*
277 * Fill in the dma table, without crossing any 64kB boundaries.
278 * Most hardware requires 16-bit alignment of all blocks,
279 * but the trm290 requires 32-bit alignment.
280 */
281
282 while (cur_len) {
283 if (count++ >= PRD_ENTRIES) {
284 printk("%s: DMA table too small\n", drive->name);
285 pci_unmap_sg(HWIF(drive)->pci_dev,
286 HWIF(drive)->sg_table,
287 HWIF(drive)->sg_nents,
288 HWIF(drive)->sg_dma_direction);
289 return 0; /* revert to PIO for this request */
290 } else {
291 u32 xcount, bcount = 0x10000 - (cur_addr & 0xffff);
292
293 if (bcount > cur_len)
294 bcount = cur_len;
295 *table++ = cpu_to_le32(cur_addr);
296 xcount = bcount & 0xffff;
297 if (is_trm290_chipset)
298 xcount = ((xcount >> 2) - 1) << 16;
299 *table++ = cpu_to_le32(xcount);
300 cur_addr += bcount;
301 cur_len -= bcount;
302 }
303 }
304
305 sg++;
306 i--;
307 }
308
309 if (!count)
310 printk("%s: empty DMA table?\n", drive->name);
311 else if (!is_trm290_chipset)
312 *--table |= cpu_to_le32(0x80000000);
313
314 return count;
315 }
316
317 /* Teardown mappings after DMA has completed. */
318 void ide_destroy_dmatable (ide_drive_t *drive)
319 {
320 struct pci_dev *dev = HWIF(drive)->pci_dev;
321 struct scatterlist *sg = HWIF(drive)->sg_table;
322 int nents = HWIF(drive)->sg_nents;
323
324 pci_unmap_sg(dev, sg, nents, HWIF(drive)->sg_dma_direction);
325 }
326
327 /*
328 * For both Blacklisted and Whitelisted drives.
329 * This is setup to be called as an extern for future support
330 * to other special driver code.
331 */
332 int check_drive_lists (ide_drive_t *drive, int good_bad)
333 {
334 struct hd_driveid *id = drive->id;
335
336 #ifdef CONFIG_IDEDMA_NEW_DRIVE_LISTINGS
337 if (good_bad) {
338 return in_drive_list(id, drive_whitelist);
339 } else {
340 int blacklist = in_drive_list(id, drive_blacklist);
341 if (blacklist)
342 printk("%s: Disabling (U)DMA for %s\n", drive->name, id->model);
343 return(blacklist);
344 }
345 #else /* !CONFIG_IDEDMA_NEW_DRIVE_LISTINGS */
346 const char **list;
347
348 if (good_bad) {
349 /* Consult the list of known "good" drives */
350 list = good_dma_drives;
351 while (*list) {
352 if (!strcmp(*list++,id->model))
353 return 1;
354 }
355 } else {
356 /* Consult the list of known "bad" drives */
357 list = bad_dma_drives;
358 while (*list) {
359 if (!strcmp(*list++,id->model)) {
360 printk("%s: Disabling (U)DMA for %s\n",
361 drive->name, id->model);
362 return 1;
363 }
364 }
365 }
366 #endif /* CONFIG_IDEDMA_NEW_DRIVE_LISTINGS */
367 return 0;
368 }
369
370 int report_drive_dmaing (ide_drive_t *drive)
371 {
372 struct hd_driveid *id = drive->id;
373
374 if ((id->field_valid & 4) && (eighty_ninty_three(drive)) &&
375 (id->dma_ultra & (id->dma_ultra >> 11) & 7)) {
376 if ((id->dma_ultra >> 13) & 1) {
377 printk(", UDMA(100)"); /* UDMA BIOS-enabled! */
378 } else if ((id->dma_ultra >> 12) & 1) {
379 printk(", UDMA(66)"); /* UDMA BIOS-enabled! */
380 } else {
381 printk(", UDMA(44)"); /* UDMA BIOS-enabled! */
382 }
383 } else if ((id->field_valid & 4) &&
384 (id->dma_ultra & (id->dma_ultra >> 8) & 7)) {
385 if ((id->dma_ultra >> 10) & 1) {
386 printk(", UDMA(33)"); /* UDMA BIOS-enabled! */
387 } else if ((id->dma_ultra >> 9) & 1) {
388 printk(", UDMA(25)"); /* UDMA BIOS-enabled! */
389 } else {
390 printk(", UDMA(16)"); /* UDMA BIOS-enabled! */
391 }
392 } else if (id->field_valid & 4) {
393 printk(", (U)DMA"); /* Can be BIOS-enabled! */
394 } else {
395 printk(", DMA");
396 }
397 return 1;
398 }
399
400 static int config_drive_for_dma (ide_drive_t *drive)
401 {
402 struct hd_driveid *id = drive->id;
403 ide_hwif_t *hwif = HWIF(drive);
404
405 if (id && (id->capability & 1) && hwif->autodma) {
406 /* Consult the list of known "bad" drives */
407 if (ide_dmaproc(ide_dma_bad_drive, drive))
408 return hwif->dmaproc(ide_dma_off, drive);
409
410 /* Enable DMA on any drive that has UltraDMA (mode 3/4/5) enabled */
411 if ((id->field_valid & 4) && (eighty_ninty_three(drive)))
412 if ((id->dma_ultra & (id->dma_ultra >> 11) & 7))
413 return hwif->dmaproc(ide_dma_on, drive);
414 /* Enable DMA on any drive that has UltraDMA (mode 0/1/2) enabled */
415 if (id->field_valid & 4) /* UltraDMA */
416 if ((id->dma_ultra & (id->dma_ultra >> 8) & 7))
417 return hwif->dmaproc(ide_dma_on, drive);
418 /* Enable DMA on any drive that has mode2 DMA (multi or single) enabled */
419 if (id->field_valid & 2) /* regular DMA */
420 if ((id->dma_mword & 0x404) == 0x404 || (id->dma_1word & 0x404) == 0x404)
421 return hwif->dmaproc(ide_dma_on, drive);
422 /* Consult the list of known "good" drives */
423 if (ide_dmaproc(ide_dma_good_drive, drive))
424 return hwif->dmaproc(ide_dma_on, drive);
425 }
426 return hwif->dmaproc(ide_dma_off_quietly, drive);
427 }
428
429 /*
430 * 1 dmaing, 2 error, 4 intr
431 */
432 static int dma_timer_expiry (ide_drive_t *drive)
433 {
434 byte dma_stat = inb(HWIF(drive)->dma_base+2);
435
436 #ifdef DEBUG
437 printk("%s: dma_timer_expiry: dma status == 0x%02x\n", drive->name, dma_stat);
438 #endif /* DEBUG */
439
440 #if 1
441 HWGROUP(drive)->expiry = NULL; /* one free ride for now */
442 #endif
443
444 if (dma_stat & 2) { /* ERROR */
445 byte stat = GET_STAT();
446 return ide_error(drive, "dma_timer_expiry", stat);
447 }
448 if (dma_stat & 1) /* DMAing */
449 return WAIT_CMD;
450 return 0;
451 }
452
453 /*
454 * ide_dmaproc() initiates/aborts DMA read/write operations on a drive.
455 *
456 * The caller is assumed to have selected the drive and programmed the drive's
457 * sector address using CHS or LBA. All that remains is to prepare for DMA
458 * and then issue the actual read/write DMA/PIO command to the drive.
459 *
460 * For ATAPI devices, we just prepare for DMA and return. The caller should
461 * then issue the packet command to the drive and call us again with
462 * ide_dma_begin afterwards.
463 *
464 * Returns 0 if all went well.
465 * Returns 1 if DMA read/write could not be started, in which case
466 * the caller should revert to PIO for the current request.
467 * May also be invoked from trm290.c
468 */
469 int ide_dmaproc (ide_dma_action_t func, ide_drive_t *drive)
470 {
471 ide_hwif_t *hwif = HWIF(drive);
472 unsigned long dma_base = hwif->dma_base;
473 byte unit = (drive->select.b.unit & 0x01);
474 unsigned int count, reading = 0;
475 byte dma_stat;
476
477 switch (func) {
478 case ide_dma_off:
479 printk("%s: DMA disabled\n", drive->name);
480 case ide_dma_off_quietly:
481 outb(inb(dma_base+2) & ~(1<<(5+unit)), dma_base+2);
482 case ide_dma_on:
483 drive->using_dma = (func == ide_dma_on);
484 if (drive->using_dma)
485 outb(inb(dma_base+2)|(1<<(5+unit)), dma_base+2);
486 return 0;
487 case ide_dma_check:
488 return config_drive_for_dma (drive);
489 case ide_dma_read:
490 reading = 1 << 3;
491 case ide_dma_write:
492 SELECT_READ_WRITE(hwif,drive,func);
493 if (!(count = ide_build_dmatable(drive, func)))
494 return 1; /* try PIO instead of DMA */
495 outl(hwif->dmatable_dma, dma_base + 4); /* PRD table */
496 outb(reading, dma_base); /* specify r/w */
497 outb(inb(dma_base+2)|6, dma_base+2); /* clear INTR & ERROR flags */
498 drive->waiting_for_dma = 1;
499 if (drive->media != ide_disk)
500 return 0;
501 ide_set_handler(drive, &ide_dma_intr, WAIT_CMD, dma_timer_expiry); /* issue cmd to drive */
502 OUT_BYTE(reading ? WIN_READDMA : WIN_WRITEDMA, IDE_COMMAND_REG);
503 case ide_dma_begin:
504 /* Note that this is done *after* the cmd has
505 * been issued to the drive, as per the BM-IDE spec.
506 * The Promise Ultra33 doesn't work correctly when
507 * we do this part before issuing the drive cmd.
508 */
509 outb(inb(dma_base)|1, dma_base); /* start DMA */
510 return 0;
511 case ide_dma_end: /* returns 1 on error, 0 otherwise */
512 drive->waiting_for_dma = 0;
513 outb(inb(dma_base)&~1, dma_base); /* stop DMA */
514 dma_stat = inb(dma_base+2); /* get DMA status */
515 outb(dma_stat|6, dma_base+2); /* clear the INTR & ERROR bits */
516 ide_destroy_dmatable(drive); /* purge DMA mappings */
517 return (dma_stat & 7) != 4; /* verify good DMA status */
518 case ide_dma_test_irq: /* returns 1 if dma irq issued, 0 otherwise */
519 dma_stat = inb(dma_base+2);
520 #if 0 /* do not set unless you know what you are doing */
521 if (dma_stat & 4) {
522 byte stat = GET_STAT();
523 outb(dma_base+2, dma_stat & 0xE4);
524 }
525 #endif
526 return (dma_stat & 4) == 4; /* return 1 if INTR asserted */
527 case ide_dma_bad_drive:
528 case ide_dma_good_drive:
529 return check_drive_lists(drive, (func == ide_dma_good_drive));
530 case ide_dma_verbose:
531 return report_drive_dmaing(drive);
532 case ide_dma_timeout:
533 #ifdef CONFIG_BLK_DEV_IDEDMA_TIMEOUT
534 /*
535 * Have to issue an abort and requeue the request
536 * DMA engine got turned off by a goofy ASIC, and
537 * we have to clean up the mess, and here is as good
538 * as any. Do it globally for all chipsets.
539 */
540 #endif /* CONFIG_BLK_DEV_IDEDMA_TIMEOUT */
541 case ide_dma_retune:
542 case ide_dma_lostirq:
543 printk("ide_dmaproc: chipset supported %s func only: %d\n", ide_dmafunc_verbose(func), func);
544 return 1;
545 default:
546 printk("ide_dmaproc: unsupported %s func: %d\n", ide_dmafunc_verbose(func), func);
547 return 1;
548 }
549 }
550
551 /*
552 * Needed for allowing full modular support of ide-driver
553 */
554 int ide_release_dma (ide_hwif_t *hwif)
555 {
556 if (hwif->dmatable_cpu) {
557 pci_free_consistent(hwif->pci_dev,
558 PRD_ENTRIES * PRD_BYTES,
559 hwif->dmatable_cpu,
560 hwif->dmatable_dma);
561 hwif->dmatable_cpu = NULL;
562 }
563 if (hwif->sg_table) {
564 kfree(hwif->sg_table);
565 hwif->sg_table = NULL;
566 }
567 if ((hwif->dma_extra) && (hwif->channel == 0))
568 release_region((hwif->dma_base + 16), hwif->dma_extra);
569 release_region(hwif->dma_base, 8);
570 return 1;
571 }
572
573 /*
574 * This can be called for a dynamically installed interface. Don't __init it
575 */
576
577 void ide_setup_dma (ide_hwif_t *hwif, unsigned long dma_base, unsigned int num_ports)
578 {
579 printk(" %s: BM-DMA at 0x%04lx-0x%04lx", hwif->name, dma_base, dma_base + num_ports - 1);
580 if (check_region(dma_base, num_ports)) {
581 printk(" -- ERROR, PORT ADDRESSES ALREADY IN USE\n");
582 return;
583 }
584 request_region(dma_base, num_ports, hwif->name);
585 hwif->dma_base = dma_base;
586 hwif->dmatable_cpu = pci_alloc_consistent(hwif->pci_dev,
587 PRD_ENTRIES * PRD_BYTES,
588 &hwif->dmatable_dma);
589 if (hwif->dmatable_cpu == NULL)
590 goto dma_alloc_failure;
591
592 hwif->sg_table = kmalloc(sizeof(struct scatterlist) * PRD_ENTRIES,
593 GFP_KERNEL);
594 if (hwif->sg_table == NULL) {
595 pci_free_consistent(hwif->pci_dev, PRD_ENTRIES * PRD_BYTES,
596 hwif->dmatable_cpu, hwif->dmatable_dma);
597 goto dma_alloc_failure;
598 }
599
600 hwif->dmaproc = &ide_dmaproc;
601
602 if (hwif->chipset != ide_trm290) {
603 byte dma_stat = inb(dma_base+2);
604 printk(", BIOS settings: %s:%s, %s:%s",
605 hwif->drives[0].name, (dma_stat & 0x20) ? "DMA" : "pio",
606 hwif->drives[1].name, (dma_stat & 0x40) ? "DMA" : "pio");
607 }
608 printk("\n");
609 return;
610
611 dma_alloc_failure:
612 printk(" -- ERROR, UNABLE TO ALLOCATE DMA TABLES\n");
613 }
614
615 /*
616 * Fetch the DMA Bus-Master-I/O-Base-Address (BMIBA) from PCI space:
617 */
618 unsigned long __init ide_get_or_set_dma_base (ide_hwif_t *hwif, int extra, const char *name)
619 {
620 unsigned long dma_base = 0;
621 struct pci_dev *dev = hwif->pci_dev;
622
623 if (hwif->mate && hwif->mate->dma_base) {
624 dma_base = hwif->mate->dma_base - (hwif->channel ? 0 : 8);
625 } else {
626 dma_base = pci_resource_start(dev, 4);
627 if (!dma_base) {
628 printk("%s: dma_base is invalid (0x%04lx)\n", name, dma_base);
629 dma_base = 0;
630 }
631 }
632 if (dma_base) {
633 if (extra) /* PDC20246, PDC20262, HPT343, & HPT366 */
634 request_region(dma_base+16, extra, name);
635 dma_base += hwif->channel ? 8 : 0;
636 hwif->dma_extra = extra;
637
638 switch(dev->device) {
639 case PCI_DEVICE_ID_AL_M5219:
640 case PCI_DEVICE_ID_AMD_VIPER_7409:
641 case PCI_DEVICE_ID_CMD_643:
642 outb(inb(dma_base+2) & 0x60, dma_base+2);
643 if (inb(dma_base+2) & 0x80) {
644 printk("%s: simplex device: DMA forced\n", name);
645 }
646 break;
647 default:
648 /*
649 * If the device claims "simplex" DMA,
650 * this means only one of the two interfaces
651 * can be trusted with DMA at any point in time.
652 * So we should enable DMA only on one of the
653 * two interfaces.
654 */
655 if ((inb(dma_base+2) & 0x80)) { /* simplex device? */
656 if ((!hwif->drives[0].present && !hwif->drives[1].present) ||
657 (hwif->mate && hwif->mate->dma_base)) {
658 printk("%s: simplex device: DMA disabled\n", name);
659 dma_base = 0;
660 }
661 }
662 }
663 }
664 return dma_base;
665 }
666
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