1 /*
2
3 Linux Driver for Mylex DAC960/AcceleRAID/eXtremeRAID PCI RAID Controllers
4
5 Copyright 1998-2001 by Leonard N. Zubkoff <lnz@dandelion.com>
6
7 This program is free software; you may redistribute and/or modify it under
8 the terms of the GNU General Public License Version 2 as published by the
9 Free Software Foundation.
10
11 This program is distributed in the hope that it will be useful, but
12 WITHOUT ANY WARRANTY, without even the implied warranty of MERCHANTABILITY
13 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
14 for complete details.
15
16 The author respectfully requests that any modifications to this software be
17 sent directly to him for evaluation and testing.
18
19 */
20
21
22 #define DAC960_DriverVersion "2.4.10"
23 #define DAC960_DriverDate "23 July 2001"
24
25
26 #include <linux/version.h>
27 #include <linux/module.h>
28 #include <linux/types.h>
29 #include <linux/blk.h>
30 #include <linux/blkdev.h>
31 #include <linux/completion.h>
32 #include <linux/delay.h>
33 #include <linux/hdreg.h>
34 #include <linux/interrupt.h>
35 #include <linux/ioport.h>
36 #include <linux/locks.h>
37 #include <linux/mm.h>
38 #include <linux/slab.h>
39 #include <linux/proc_fs.h>
40 #include <linux/reboot.h>
41 #include <linux/spinlock.h>
42 #include <linux/timer.h>
43 #include <linux/pci.h>
44 #include <asm/io.h>
45 #include <asm/segment.h>
46 #include <asm/uaccess.h>
47 #include "DAC960.h"
48
49
50 /*
51 DAC960_ControllerCount is the number of DAC960 Controllers detected.
52 */
53
54 static int
55 DAC960_ControllerCount = 0;
56
57
58 /*
59 DAC960_ActiveControllerCount is the number of active DAC960 Controllers
60 detected.
61 */
62
63 static int
64 DAC960_ActiveControllerCount = 0;
65
66
67 /*
68 DAC960_Controllers is an array of pointers to the DAC960 Controller
69 structures.
70 */
71
72 static DAC960_Controller_T
73 *DAC960_Controllers[DAC960_MaxControllers] = { NULL };
74
75
76 /*
77 DAC960_BlockDeviceOperations is the Block Device Operations structure for
78 DAC960 Logical Disk Devices.
79 */
80
81 static BlockDeviceOperations_T
82 DAC960_BlockDeviceOperations =
83 { open: DAC960_Open,
84 release: DAC960_Release,
85 ioctl: DAC960_IOCTL };
86
87
88 /*
89 DAC960_ProcDirectoryEntry is the DAC960 /proc/rd directory entry.
90 */
91
92 static PROC_DirectoryEntry_T
93 *DAC960_ProcDirectoryEntry;
94
95
96 /*
97 DAC960_NotifierBlock is the Notifier Block structure for DAC960 Driver.
98 */
99
100 static NotifierBlock_T
101 DAC960_NotifierBlock = { DAC960_Finalize, NULL, 0 };
102
103
104 /*
105 DAC960_AnnounceDriver announces the Driver Version and Date, Author's Name,
106 Copyright Notice, and Electronic Mail Address.
107 */
108
109 static void DAC960_AnnounceDriver(DAC960_Controller_T *Controller)
110 {
111 DAC960_Announce("***** DAC960 RAID Driver Version "
112 DAC960_DriverVersion " of "
113 DAC960_DriverDate " *****\n", Controller);
114 DAC960_Announce("Copyright 1998-2001 by Leonard N. Zubkoff "
115 "<lnz@dandelion.com>\n", Controller);
116 }
117
118
119 /*
120 DAC960_Failure prints a standardized error message, and then returns false.
121 */
122
123 static boolean DAC960_Failure(DAC960_Controller_T *Controller,
124 unsigned char *ErrorMessage)
125 {
126 DAC960_Error("While configuring DAC960 PCI RAID Controller at\n",
127 Controller);
128 if (Controller->IO_Address == 0)
129 DAC960_Error("PCI Bus %d Device %d Function %d I/O Address N/A "
130 "PCI Address 0x%X\n", Controller,
131 Controller->Bus, Controller->Device,
132 Controller->Function, Controller->PCI_Address);
133 else DAC960_Error("PCI Bus %d Device %d Function %d I/O Address "
134 "0x%X PCI Address 0x%X\n", Controller,
135 Controller->Bus, Controller->Device,
136 Controller->Function, Controller->IO_Address,
137 Controller->PCI_Address);
138 DAC960_Error("%s FAILED - DETACHING\n", Controller, ErrorMessage);
139 return false;
140 }
141
142
143 /*
144 DAC960_CreateAuxiliaryStructures allocates and initializes the auxiliary
145 data structures for Controller. It returns true on success and false on
146 failure.
147 */
148
149 static boolean DAC960_CreateAuxiliaryStructures(DAC960_Controller_T *Controller)
150 {
151 int CommandAllocationLength, CommandAllocationGroupSize;
152 int CommandsRemaining = 0, CommandIdentifier, CommandGroupByteCount;
153 void *AllocationPointer = NULL;
154 if (Controller->FirmwareType == DAC960_V1_Controller)
155 {
156 CommandAllocationLength = offsetof(DAC960_Command_T, V1.EndMarker);
157 CommandAllocationGroupSize = DAC960_V1_CommandAllocationGroupSize;
158 }
159 else
160 {
161 CommandAllocationLength = offsetof(DAC960_Command_T, V2.EndMarker);
162 CommandAllocationGroupSize = DAC960_V2_CommandAllocationGroupSize;
163 }
164 Controller->CommandAllocationGroupSize = CommandAllocationGroupSize;
165 Controller->FreeCommands = NULL;
166 for (CommandIdentifier = 1;
167 CommandIdentifier <= Controller->DriverQueueDepth;
168 CommandIdentifier++)
169 {
170 DAC960_Command_T *Command;
171 if (--CommandsRemaining <= 0)
172 {
173 CommandsRemaining =
174 Controller->DriverQueueDepth - CommandIdentifier + 1;
175 if (CommandsRemaining > CommandAllocationGroupSize)
176 CommandsRemaining = CommandAllocationGroupSize;
177 CommandGroupByteCount =
178 CommandsRemaining * CommandAllocationLength;
179 AllocationPointer = kmalloc(CommandGroupByteCount, GFP_ATOMIC);
180 if (AllocationPointer == NULL)
181 return DAC960_Failure(Controller, "AUXILIARY STRUCTURE CREATION");
182 memset(AllocationPointer, 0, CommandGroupByteCount);
183 }
184 Command = (DAC960_Command_T *) AllocationPointer;
185 AllocationPointer += CommandAllocationLength;
186 Command->CommandIdentifier = CommandIdentifier;
187 Command->Controller = Controller;
188 Command->Next = Controller->FreeCommands;
189 Controller->FreeCommands = Command;
190 Controller->Commands[CommandIdentifier-1] = Command;
191 }
192 return true;
193 }
194
195
196 /*
197 DAC960_DestroyAuxiliaryStructures deallocates the auxiliary data
198 structures for Controller.
199 */
200
201 static void DAC960_DestroyAuxiliaryStructures(DAC960_Controller_T *Controller)
202 {
203 int i;
204 Controller->FreeCommands = NULL;
205 for (i = 0; i < Controller->DriverQueueDepth; i++)
206 {
207 DAC960_Command_T *Command = Controller->Commands[i];
208 if (Command != NULL &&
209 (Command->CommandIdentifier
210 % Controller->CommandAllocationGroupSize) == 1)
211 kfree(Command);
212 Controller->Commands[i] = NULL;
213 }
214 if (Controller->CombinedStatusBuffer != NULL)
215 {
216 kfree(Controller->CombinedStatusBuffer);
217 Controller->CombinedStatusBuffer = NULL;
218 Controller->CurrentStatusBuffer = NULL;
219 }
220 if (Controller->FirmwareType == DAC960_V1_Controller) return;
221 for (i = 0; i < DAC960_MaxLogicalDrives; i++)
222 if (Controller->V2.LogicalDeviceInformation[i] != NULL)
223 {
224 kfree(Controller->V2.LogicalDeviceInformation[i]);
225 Controller->V2.LogicalDeviceInformation[i] = NULL;
226 }
227 for (i = 0; i < DAC960_V2_MaxPhysicalDevices; i++)
228 {
229 if (Controller->V2.PhysicalDeviceInformation[i] != NULL)
230 {
231 kfree(Controller->V2.PhysicalDeviceInformation[i]);
232 Controller->V2.PhysicalDeviceInformation[i] = NULL;
233 }
234 if (Controller->V2.InquiryUnitSerialNumber[i] != NULL)
235 {
236 kfree(Controller->V2.InquiryUnitSerialNumber[i]);
237 Controller->V2.InquiryUnitSerialNumber[i] = NULL;
238 }
239 }
240 }
241
242
243 /*
244 DAC960_V1_ClearCommand clears critical fields of Command for DAC960 V1
245 Firmware Controllers.
246 */
247
248 static inline void DAC960_V1_ClearCommand(DAC960_Command_T *Command)
249 {
250 DAC960_V1_CommandMailbox_T *CommandMailbox = &Command->V1.CommandMailbox;
251 memset(CommandMailbox, 0, sizeof(DAC960_V1_CommandMailbox_T));
252 Command->V1.CommandStatus = 0;
253 }
254
255
256 /*
257 DAC960_V2_ClearCommand clears critical fields of Command for DAC960 V2
258 Firmware Controllers.
259 */
260
261 static inline void DAC960_V2_ClearCommand(DAC960_Command_T *Command)
262 {
263 DAC960_V2_CommandMailbox_T *CommandMailbox = &Command->V2.CommandMailbox;
264 memset(CommandMailbox, 0, sizeof(DAC960_V2_CommandMailbox_T));
265 Command->V2.CommandStatus = 0;
266 }
267
268
269 /*
270 DAC960_AllocateCommand allocates a Command structure from Controller's
271 free list.
272 */
273
274 static inline DAC960_Command_T *DAC960_AllocateCommand(DAC960_Controller_T
275 *Controller)
276 {
277 DAC960_Command_T *Command = Controller->FreeCommands;
278 if (Command == NULL) return NULL;
279 Controller->FreeCommands = Command->Next;
280 Command->Next = NULL;
281 return Command;
282 }
283
284
285 /*
286 DAC960_DeallocateCommand deallocates Command, returning it to Controller's
287 free list.
288 */
289
290 static inline void DAC960_DeallocateCommand(DAC960_Command_T *Command)
291 {
292 DAC960_Controller_T *Controller = Command->Controller;
293 Command->Next = Controller->FreeCommands;
294 Controller->FreeCommands = Command;
295 }
296
297
298 /*
299 DAC960_WaitForCommand waits for a wake_up on Controller's Command Wait Queue.
300 */
301
302 static void DAC960_WaitForCommand(DAC960_Controller_T *Controller)
303 {
304 spin_unlock_irq(&io_request_lock);
305 __wait_event(Controller->CommandWaitQueue, Controller->FreeCommands);
306 spin_lock_irq(&io_request_lock);
307 }
308
309
310 /*
311 DAC960_BA_QueueCommand queues Command for DAC960 BA Series Controllers.
312 */
313
314 static void DAC960_BA_QueueCommand(DAC960_Command_T *Command)
315 {
316 DAC960_Controller_T *Controller = Command->Controller;
317 void *ControllerBaseAddress = Controller->BaseAddress;
318 DAC960_V2_CommandMailbox_T *CommandMailbox = &Command->V2.CommandMailbox;
319 DAC960_V2_CommandMailbox_T *NextCommandMailbox =
320 Controller->V2.NextCommandMailbox;
321 CommandMailbox->Common.CommandIdentifier = Command->CommandIdentifier;
322 DAC960_BA_WriteCommandMailbox(NextCommandMailbox, CommandMailbox);
323 if (Controller->V2.PreviousCommandMailbox1->Words[0] == 0 ||
324 Controller->V2.PreviousCommandMailbox2->Words[0] == 0)
325 DAC960_BA_MemoryMailboxNewCommand(ControllerBaseAddress);
326 Controller->V2.PreviousCommandMailbox2 =
327 Controller->V2.PreviousCommandMailbox1;
328 Controller->V2.PreviousCommandMailbox1 = NextCommandMailbox;
329 if (++NextCommandMailbox > Controller->V2.LastCommandMailbox)
330 NextCommandMailbox = Controller->V2.FirstCommandMailbox;
331 Controller->V2.NextCommandMailbox = NextCommandMailbox;
332 }
333
334
335 /*
336 DAC960_LP_QueueCommand queues Command for DAC960 LP Series Controllers.
337 */
338
339 static void DAC960_LP_QueueCommand(DAC960_Command_T *Command)
340 {
341 DAC960_Controller_T *Controller = Command->Controller;
342 void *ControllerBaseAddress = Controller->BaseAddress;
343 DAC960_V2_CommandMailbox_T *CommandMailbox = &Command->V2.CommandMailbox;
344 DAC960_V2_CommandMailbox_T *NextCommandMailbox =
345 Controller->V2.NextCommandMailbox;
346 CommandMailbox->Common.CommandIdentifier = Command->CommandIdentifier;
347 DAC960_LP_WriteCommandMailbox(NextCommandMailbox, CommandMailbox);
348 if (Controller->V2.PreviousCommandMailbox1->Words[0] == 0 ||
349 Controller->V2.PreviousCommandMailbox2->Words[0] == 0)
350 DAC960_LP_MemoryMailboxNewCommand(ControllerBaseAddress);
351 Controller->V2.PreviousCommandMailbox2 =
352 Controller->V2.PreviousCommandMailbox1;
353 Controller->V2.PreviousCommandMailbox1 = NextCommandMailbox;
354 if (++NextCommandMailbox > Controller->V2.LastCommandMailbox)
355 NextCommandMailbox = Controller->V2.FirstCommandMailbox;
356 Controller->V2.NextCommandMailbox = NextCommandMailbox;
357 }
358
359
360 /*
361 DAC960_LA_QueueCommandDualMode queues Command for DAC960 LA Series
362 Controllers with Dual Mode Firmware.
363 */
364
365 static void DAC960_LA_QueueCommandDualMode(DAC960_Command_T *Command)
366 {
367 DAC960_Controller_T *Controller = Command->Controller;
368 void *ControllerBaseAddress = Controller->BaseAddress;
369 DAC960_V1_CommandMailbox_T *CommandMailbox = &Command->V1.CommandMailbox;
370 DAC960_V1_CommandMailbox_T *NextCommandMailbox =
371 Controller->V1.NextCommandMailbox;
372 CommandMailbox->Common.CommandIdentifier = Command->CommandIdentifier;
373 DAC960_LA_WriteCommandMailbox(NextCommandMailbox, CommandMailbox);
374 if (Controller->V1.PreviousCommandMailbox1->Words[0] == 0 ||
375 Controller->V1.PreviousCommandMailbox2->Words[0] == 0)
376 DAC960_LA_MemoryMailboxNewCommand(ControllerBaseAddress);
377 Controller->V1.PreviousCommandMailbox2 =
378 Controller->V1.PreviousCommandMailbox1;
379 Controller->V1.PreviousCommandMailbox1 = NextCommandMailbox;
380 if (++NextCommandMailbox > Controller->V1.LastCommandMailbox)
381 NextCommandMailbox = Controller->V1.FirstCommandMailbox;
382 Controller->V1.NextCommandMailbox = NextCommandMailbox;
383 }
384
385
386 /*
387 DAC960_LA_QueueCommandSingleMode queues Command for DAC960 LA Series
388 Controllers with Single Mode Firmware.
389 */
390
391 static void DAC960_LA_QueueCommandSingleMode(DAC960_Command_T *Command)
392 {
393 DAC960_Controller_T *Controller = Command->Controller;
394 void *ControllerBaseAddress = Controller->BaseAddress;
395 DAC960_V1_CommandMailbox_T *CommandMailbox = &Command->V1.CommandMailbox;
396 DAC960_V1_CommandMailbox_T *NextCommandMailbox =
397 Controller->V1.NextCommandMailbox;
398 CommandMailbox->Common.CommandIdentifier = Command->CommandIdentifier;
399 DAC960_LA_WriteCommandMailbox(NextCommandMailbox, CommandMailbox);
400 if (Controller->V1.PreviousCommandMailbox1->Words[0] == 0 ||
401 Controller->V1.PreviousCommandMailbox2->Words[0] == 0)
402 DAC960_LA_HardwareMailboxNewCommand(ControllerBaseAddress);
403 Controller->V1.PreviousCommandMailbox2 =
404 Controller->V1.PreviousCommandMailbox1;
405 Controller->V1.PreviousCommandMailbox1 = NextCommandMailbox;
406 if (++NextCommandMailbox > Controller->V1.LastCommandMailbox)
407 NextCommandMailbox = Controller->V1.FirstCommandMailbox;
408 Controller->V1.NextCommandMailbox = NextCommandMailbox;
409 }
410
411
412 /*
413 DAC960_PG_QueueCommandDualMode queues Command for DAC960 PG Series
414 Controllers with Dual Mode Firmware.
415 */
416
417 static void DAC960_PG_QueueCommandDualMode(DAC960_Command_T *Command)
418 {
419 DAC960_Controller_T *Controller = Command->Controller;
420 void *ControllerBaseAddress = Controller->BaseAddress;
421 DAC960_V1_CommandMailbox_T *CommandMailbox = &Command->V1.CommandMailbox;
422 DAC960_V1_CommandMailbox_T *NextCommandMailbox =
423 Controller->V1.NextCommandMailbox;
424 CommandMailbox->Common.CommandIdentifier = Command->CommandIdentifier;
425 DAC960_PG_WriteCommandMailbox(NextCommandMailbox, CommandMailbox);
426 if (Controller->V1.PreviousCommandMailbox1->Words[0] == 0 ||
427 Controller->V1.PreviousCommandMailbox2->Words[0] == 0)
428 DAC960_PG_MemoryMailboxNewCommand(ControllerBaseAddress);
429 Controller->V1.PreviousCommandMailbox2 =
430 Controller->V1.PreviousCommandMailbox1;
431 Controller->V1.PreviousCommandMailbox1 = NextCommandMailbox;
432 if (++NextCommandMailbox > Controller->V1.LastCommandMailbox)
433 NextCommandMailbox = Controller->V1.FirstCommandMailbox;
434 Controller->V1.NextCommandMailbox = NextCommandMailbox;
435 }
436
437
438 /*
439 DAC960_PG_QueueCommandSingleMode queues Command for DAC960 PG Series
440 Controllers with Single Mode Firmware.
441 */
442
443 static void DAC960_PG_QueueCommandSingleMode(DAC960_Command_T *Command)
444 {
445 DAC960_Controller_T *Controller = Command->Controller;
446 void *ControllerBaseAddress = Controller->BaseAddress;
447 DAC960_V1_CommandMailbox_T *CommandMailbox = &Command->V1.CommandMailbox;
448 DAC960_V1_CommandMailbox_T *NextCommandMailbox =
449 Controller->V1.NextCommandMailbox;
450 CommandMailbox->Common.CommandIdentifier = Command->CommandIdentifier;
451 DAC960_PG_WriteCommandMailbox(NextCommandMailbox, CommandMailbox);
452 if (Controller->V1.PreviousCommandMailbox1->Words[0] == 0 ||
453 Controller->V1.PreviousCommandMailbox2->Words[0] == 0)
454 DAC960_PG_HardwareMailboxNewCommand(ControllerBaseAddress);
455 Controller->V1.PreviousCommandMailbox2 =
456 Controller->V1.PreviousCommandMailbox1;
457 Controller->V1.PreviousCommandMailbox1 = NextCommandMailbox;
458 if (++NextCommandMailbox > Controller->V1.LastCommandMailbox)
459 NextCommandMailbox = Controller->V1.FirstCommandMailbox;
460 Controller->V1.NextCommandMailbox = NextCommandMailbox;
461 }
462
463
464 /*
465 DAC960_PD_QueueCommand queues Command for DAC960 PD Series Controllers.
466 */
467
468 static void DAC960_PD_QueueCommand(DAC960_Command_T *Command)
469 {
470 DAC960_Controller_T *Controller = Command->Controller;
471 void *ControllerBaseAddress = Controller->BaseAddress;
472 DAC960_V1_CommandMailbox_T *CommandMailbox = &Command->V1.CommandMailbox;
473 CommandMailbox->Common.CommandIdentifier = Command->CommandIdentifier;
474 while (DAC960_PD_MailboxFullP(ControllerBaseAddress))
475 udelay(1);
476 DAC960_PD_WriteCommandMailbox(ControllerBaseAddress, CommandMailbox);
477 DAC960_PD_NewCommand(ControllerBaseAddress);
478 }
479
480
481 /*
482 DAC960_ExecuteCommand executes Command and waits for completion.
483 */
484
485 static void DAC960_ExecuteCommand(DAC960_Command_T *Command)
486 {
487 DAC960_Controller_T *Controller = Command->Controller;
488 DECLARE_COMPLETION(Completion);
489 unsigned long ProcessorFlags;
490 Command->Completion = &Completion;
491 DAC960_AcquireControllerLock(Controller, &ProcessorFlags);
492 DAC960_QueueCommand(Command);
493 DAC960_ReleaseControllerLock(Controller, &ProcessorFlags);
494 if (in_interrupt()) return;
495 wait_for_completion(&Completion);
496 }
497
498
499 /*
500 DAC960_V1_ExecuteType3 executes a DAC960 V1 Firmware Controller Type 3
501 Command and waits for completion. It returns true on success and false
502 on failure.
503 */
504
505 static boolean DAC960_V1_ExecuteType3(DAC960_Controller_T *Controller,
506 DAC960_V1_CommandOpcode_T CommandOpcode,
507 void *DataPointer)
508 {
509 DAC960_Command_T *Command = DAC960_AllocateCommand(Controller);
510 DAC960_V1_CommandMailbox_T *CommandMailbox = &Command->V1.CommandMailbox;
511 DAC960_V1_CommandStatus_T CommandStatus;
512 DAC960_V1_ClearCommand(Command);
513 Command->CommandType = DAC960_ImmediateCommand;
514 CommandMailbox->Type3.CommandOpcode = CommandOpcode;
515 CommandMailbox->Type3.BusAddress = Virtual_to_Bus32(DataPointer);
516 DAC960_ExecuteCommand(Command);
517 CommandStatus = Command->V1.CommandStatus;
518 DAC960_DeallocateCommand(Command);
519 return (CommandStatus == DAC960_V1_NormalCompletion);
520 }
521
522
523 /*
524 DAC960_V1_ExecuteType3D executes a DAC960 V1 Firmware Controller Type 3D
525 Command and waits for completion. It returns true on success and false
526 on failure.
527 */
528
529 static boolean DAC960_V1_ExecuteType3D(DAC960_Controller_T *Controller,
530 DAC960_V1_CommandOpcode_T CommandOpcode,
531 unsigned char Channel,
532 unsigned char TargetID,
533 void *DataPointer)
534 {
535 DAC960_Command_T *Command = DAC960_AllocateCommand(Controller);
536 DAC960_V1_CommandMailbox_T *CommandMailbox = &Command->V1.CommandMailbox;
537 DAC960_V1_CommandStatus_T CommandStatus;
538 DAC960_V1_ClearCommand(Command);
539 Command->CommandType = DAC960_ImmediateCommand;
540 CommandMailbox->Type3D.CommandOpcode = CommandOpcode;
541 CommandMailbox->Type3D.Channel = Channel;
542 CommandMailbox->Type3D.TargetID = TargetID;
543 CommandMailbox->Type3D.BusAddress = Virtual_to_Bus32(DataPointer);
544 DAC960_ExecuteCommand(Command);
545 CommandStatus = Command->V1.CommandStatus;
546 DAC960_DeallocateCommand(Command);
547 return (CommandStatus == DAC960_V1_NormalCompletion);
548 }
549
550
551 /*
552 DAC960_V2_GeneralInfo executes a DAC960 V2 Firmware General Information
553 Reading IOCTL Command and waits for completion. It returns true on success
554 and false on failure.
555 */
556
557 static boolean DAC960_V2_GeneralInfo(DAC960_Controller_T *Controller,
558 DAC960_V2_IOCTL_Opcode_T IOCTL_Opcode,
559 void *DataPointer,
560 unsigned int DataByteCount)
561 {
562 DAC960_Command_T *Command = DAC960_AllocateCommand(Controller);
563 DAC960_V2_CommandMailbox_T *CommandMailbox = &Command->V2.CommandMailbox;
564 DAC960_V2_CommandStatus_T CommandStatus;
565 DAC960_V2_ClearCommand(Command);
566 Command->CommandType = DAC960_ImmediateCommand;
567 CommandMailbox->Common.CommandOpcode = DAC960_V2_IOCTL;
568 CommandMailbox->Common.CommandControlBits
569 .DataTransferControllerToHost = true;
570 CommandMailbox->Common.CommandControlBits
571 .NoAutoRequestSense = true;
572 CommandMailbox->Common.DataTransferSize = DataByteCount;
573 CommandMailbox->Common.IOCTL_Opcode = IOCTL_Opcode;
574 CommandMailbox->Common.DataTransferMemoryAddress
575 .ScatterGatherSegments[0]
576 .SegmentDataPointer =
577 Virtual_to_Bus64(DataPointer);
578 CommandMailbox->Common.DataTransferMemoryAddress
579 .ScatterGatherSegments[0]
580 .SegmentByteCount =
581 CommandMailbox->Common.DataTransferSize;
582 DAC960_ExecuteCommand(Command);
583 CommandStatus = Command->V2.CommandStatus;
584 DAC960_DeallocateCommand(Command);
585 return (CommandStatus == DAC960_V2_NormalCompletion);
586 }
587
588
589 /*
590 DAC960_V2_ControllerInfo executes a DAC960 V2 Firmware Controller
591 Information Reading IOCTL Command and waits for completion. It returns
592 true on success and false on failure.
593 */
594
595 static boolean DAC960_V2_ControllerInfo(DAC960_Controller_T *Controller,
596 DAC960_V2_IOCTL_Opcode_T IOCTL_Opcode,
597 void *DataPointer,
598 unsigned int DataByteCount)
599 {
600 DAC960_Command_T *Command = DAC960_AllocateCommand(Controller);
601 DAC960_V2_CommandMailbox_T *CommandMailbox = &Command->V2.CommandMailbox;
602 DAC960_V2_CommandStatus_T CommandStatus;
603 DAC960_V2_ClearCommand(Command);
604 Command->CommandType = DAC960_ImmediateCommand;
605 CommandMailbox->ControllerInfo.CommandOpcode = DAC960_V2_IOCTL;
606 CommandMailbox->ControllerInfo.CommandControlBits
607 .DataTransferControllerToHost = true;
608 CommandMailbox->ControllerInfo.CommandControlBits
609 .NoAutoRequestSense = true;
610 CommandMailbox->ControllerInfo.DataTransferSize = DataByteCount;
611 CommandMailbox->ControllerInfo.ControllerNumber = 0;
612 CommandMailbox->ControllerInfo.IOCTL_Opcode = IOCTL_Opcode;
613 CommandMailbox->ControllerInfo.DataTransferMemoryAddress
614 .ScatterGatherSegments[0]
615 .SegmentDataPointer =
616 Virtual_to_Bus64(DataPointer);
617 CommandMailbox->ControllerInfo.DataTransferMemoryAddress
618 .ScatterGatherSegments[0]
619 .SegmentByteCount =
620 CommandMailbox->ControllerInfo.DataTransferSize;
621 DAC960_ExecuteCommand(Command);
622 CommandStatus = Command->V2.CommandStatus;
623 DAC960_DeallocateCommand(Command);
624 return (CommandStatus == DAC960_V2_NormalCompletion);
625 }
626
627
628 /*
629 DAC960_V2_LogicalDeviceInfo executes a DAC960 V2 Firmware Controller Logical
630 Device Information Reading IOCTL Command and waits for completion. It
631 returns true on success and false on failure.
632 */
633
634 static boolean DAC960_V2_LogicalDeviceInfo(DAC960_Controller_T *Controller,
635 DAC960_V2_IOCTL_Opcode_T
636 IOCTL_Opcode,
637 unsigned short
638 LogicalDeviceNumber,
639 void *DataPointer,
640 unsigned int DataByteCount)
641 {
642 DAC960_Command_T *Command = DAC960_AllocateCommand(Controller);
643 DAC960_V2_CommandMailbox_T *CommandMailbox = &Command->V2.CommandMailbox;
644 DAC960_V2_CommandStatus_T CommandStatus;
645 DAC960_V2_ClearCommand(Command);
646 Command->CommandType = DAC960_ImmediateCommand;
647 CommandMailbox->LogicalDeviceInfo.CommandOpcode = DAC960_V2_IOCTL;
648 CommandMailbox->LogicalDeviceInfo.CommandControlBits
649 .DataTransferControllerToHost = true;
650 CommandMailbox->LogicalDeviceInfo.CommandControlBits
651 .NoAutoRequestSense = true;
652 CommandMailbox->LogicalDeviceInfo.DataTransferSize = DataByteCount;
653 CommandMailbox->LogicalDeviceInfo.LogicalDevice.LogicalDeviceNumber =
654 LogicalDeviceNumber;
655 CommandMailbox->LogicalDeviceInfo.IOCTL_Opcode = IOCTL_Opcode;
656 CommandMailbox->LogicalDeviceInfo.DataTransferMemoryAddress
657 .ScatterGatherSegments[0]
658 .SegmentDataPointer =
659 Virtual_to_Bus64(DataPointer);
660 CommandMailbox->LogicalDeviceInfo.DataTransferMemoryAddress
661 .ScatterGatherSegments[0]
662 .SegmentByteCount =
663 CommandMailbox->LogicalDeviceInfo.DataTransferSize;
664 DAC960_ExecuteCommand(Command);
665 CommandStatus = Command->V2.CommandStatus;
666 DAC960_DeallocateCommand(Command);
667 return (CommandStatus == DAC960_V2_NormalCompletion);
668 }
669
670
671 /*
672 DAC960_V2_PhysicalDeviceInfo executes a DAC960 V2 Firmware Controller Physical
673 Device Information Reading IOCTL Command and waits for completion. It
674 returns true on success and false on failure.
675 */
676
677 static boolean DAC960_V2_PhysicalDeviceInfo(DAC960_Controller_T *Controller,
678 DAC960_V2_IOCTL_Opcode_T
679 IOCTL_Opcode,
680 unsigned char Channel,
681 unsigned char TargetID,
682 unsigned char LogicalUnit,
683 void *DataPointer,
684 unsigned int DataByteCount)
685 {
686 DAC960_Command_T *Command = DAC960_AllocateCommand(Controller);
687 DAC960_V2_CommandMailbox_T *CommandMailbox = &Command->V2.CommandMailbox;
688 DAC960_V2_CommandStatus_T CommandStatus;
689 DAC960_V2_ClearCommand(Command);
690 Command->CommandType = DAC960_ImmediateCommand;
691 CommandMailbox->PhysicalDeviceInfo.CommandOpcode = DAC960_V2_IOCTL;
692 CommandMailbox->PhysicalDeviceInfo.CommandControlBits
693 .DataTransferControllerToHost = true;
694 CommandMailbox->PhysicalDeviceInfo.CommandControlBits
695 .NoAutoRequestSense = true;
696 CommandMailbox->PhysicalDeviceInfo.DataTransferSize = DataByteCount;
697 CommandMailbox->PhysicalDeviceInfo.PhysicalDevice.LogicalUnit = LogicalUnit;
698 CommandMailbox->PhysicalDeviceInfo.PhysicalDevice.TargetID = TargetID;
699 CommandMailbox->PhysicalDeviceInfo.PhysicalDevice.Channel = Channel;
700 CommandMailbox->PhysicalDeviceInfo.IOCTL_Opcode = IOCTL_Opcode;
701 CommandMailbox->PhysicalDeviceInfo.DataTransferMemoryAddress
702 .ScatterGatherSegments[0]
703 .SegmentDataPointer =
704 Virtual_to_Bus64(DataPointer);
705 CommandMailbox->PhysicalDeviceInfo.DataTransferMemoryAddress
706 .ScatterGatherSegments[0]
707 .SegmentByteCount =
708 CommandMailbox->PhysicalDeviceInfo.DataTransferSize;
709 DAC960_ExecuteCommand(Command);
710 CommandStatus = Command->V2.CommandStatus;
711 DAC960_DeallocateCommand(Command);
712 return (CommandStatus == DAC960_V2_NormalCompletion);
713 }
714
715
716 /*
717 DAC960_V2_DeviceOperation executes a DAC960 V2 Firmware Controller Device
718 Operation IOCTL Command and waits for completion. It returns true on
719 success and false on failure.
720 */
721
722 static boolean DAC960_V2_DeviceOperation(DAC960_Controller_T *Controller,
723 DAC960_V2_IOCTL_Opcode_T IOCTL_Opcode,
724 DAC960_V2_OperationDevice_T
725 OperationDevice)
726 {
727 DAC960_Command_T *Command = DAC960_AllocateCommand(Controller);
728 DAC960_V2_CommandMailbox_T *CommandMailbox = &Command->V2.CommandMailbox;
729 DAC960_V2_CommandStatus_T CommandStatus;
730 DAC960_V2_ClearCommand(Command);
731 Command->CommandType = DAC960_ImmediateCommand;
732 CommandMailbox->DeviceOperation.CommandOpcode = DAC960_V2_IOCTL;
733 CommandMailbox->DeviceOperation.CommandControlBits
734 .DataTransferControllerToHost = true;
735 CommandMailbox->DeviceOperation.CommandControlBits
736 .NoAutoRequestSense = true;
737 CommandMailbox->DeviceOperation.IOCTL_Opcode = IOCTL_Opcode;
738 CommandMailbox->DeviceOperation.OperationDevice = OperationDevice;
739 DAC960_ExecuteCommand(Command);
740 CommandStatus = Command->V2.CommandStatus;
741 DAC960_DeallocateCommand(Command);
742 return (CommandStatus == DAC960_V2_NormalCompletion);
743 }
744
745
746 /*
747 DAC960_V1_EnableMemoryMailboxInterface enables the Memory Mailbox Interface
748 for DAC960 V1 Firmware Controllers.
749 */
750
751 static boolean DAC960_V1_EnableMemoryMailboxInterface(DAC960_Controller_T
752 *Controller)
753 {
754 void *ControllerBaseAddress = Controller->BaseAddress;
755 DAC960_V1_CommandMailbox_T *CommandMailboxesMemory;
756 DAC960_V1_StatusMailbox_T *StatusMailboxesMemory;
757 DAC960_V1_CommandMailbox_T CommandMailbox;
758 DAC960_V1_CommandStatus_T CommandStatus;
759 unsigned long MemoryMailboxPagesAddress;
760 unsigned long MemoryMailboxPagesOrder;
761 unsigned long MemoryMailboxPagesSize;
762 void *SavedMemoryMailboxesAddress = NULL;
763 short NextCommandMailboxIndex = 0;
764 short NextStatusMailboxIndex = 0;
765 int TimeoutCounter = 1000000, i;
766 MemoryMailboxPagesOrder = 0;
767 MemoryMailboxPagesSize =
768 DAC960_V1_CommandMailboxCount * sizeof(DAC960_V1_CommandMailbox_T) +
769 DAC960_V1_StatusMailboxCount * sizeof(DAC960_V1_StatusMailbox_T);
770 while (MemoryMailboxPagesSize > PAGE_SIZE << MemoryMailboxPagesOrder)
771 MemoryMailboxPagesOrder++;
772 if (Controller->HardwareType == DAC960_LA_Controller)
773 DAC960_LA_RestoreMemoryMailboxInfo(Controller,
774 &SavedMemoryMailboxesAddress,
775 &NextCommandMailboxIndex,
776 &NextStatusMailboxIndex);
777 else DAC960_PG_RestoreMemoryMailboxInfo(Controller,
778 &SavedMemoryMailboxesAddress,
779 &NextCommandMailboxIndex,
780 &NextStatusMailboxIndex);
781 if (SavedMemoryMailboxesAddress == NULL)
782 {
783 MemoryMailboxPagesAddress =
784 __get_free_pages(GFP_KERNEL, MemoryMailboxPagesOrder);
785 Controller->MemoryMailboxPagesAddress = MemoryMailboxPagesAddress;
786 CommandMailboxesMemory =
787 (DAC960_V1_CommandMailbox_T *) MemoryMailboxPagesAddress;
788 }
789 else CommandMailboxesMemory = SavedMemoryMailboxesAddress;
790 if (CommandMailboxesMemory == NULL) return false;
791 Controller->MemoryMailboxPagesOrder = MemoryMailboxPagesOrder;
792 memset(CommandMailboxesMemory, 0, MemoryMailboxPagesSize);
793 Controller->V1.FirstCommandMailbox = CommandMailboxesMemory;
794 CommandMailboxesMemory += DAC960_V1_CommandMailboxCount - 1;
795 Controller->V1.LastCommandMailbox = CommandMailboxesMemory;
796 Controller->V1.NextCommandMailbox =
797 &Controller->V1.FirstCommandMailbox[NextCommandMailboxIndex];
798 if (--NextCommandMailboxIndex < 0)
799 NextCommandMailboxIndex = DAC960_V1_CommandMailboxCount - 1;
800 Controller->V1.PreviousCommandMailbox1 =
801 &Controller->V1.FirstCommandMailbox[NextCommandMailboxIndex];
802 if (--NextCommandMailboxIndex < 0)
803 NextCommandMailboxIndex = DAC960_V1_CommandMailboxCount - 1;
804 Controller->V1.PreviousCommandMailbox2 =
805 &Controller->V1.FirstCommandMailbox[NextCommandMailboxIndex];
806 StatusMailboxesMemory =
807 (DAC960_V1_StatusMailbox_T *) (CommandMailboxesMemory + 1);
808 Controller->V1.FirstStatusMailbox = StatusMailboxesMemory;
809 StatusMailboxesMemory += DAC960_V1_StatusMailboxCount - 1;
810 Controller->V1.LastStatusMailbox = StatusMailboxesMemory;
811 Controller->V1.NextStatusMailbox =
812 &Controller->V1.FirstStatusMailbox[NextStatusMailboxIndex];
813 if (SavedMemoryMailboxesAddress != NULL) return true;
814 /* Enable the Memory Mailbox Interface. */
815 Controller->V1.DualModeMemoryMailboxInterface = true;
816 CommandMailbox.TypeX.CommandOpcode = 0x2B;
817 CommandMailbox.TypeX.CommandIdentifier = 0;
818 CommandMailbox.TypeX.CommandOpcode2 = 0x14;
819 CommandMailbox.TypeX.CommandMailboxesBusAddress =
820 Virtual_to_Bus32(Controller->V1.FirstCommandMailbox);
821 CommandMailbox.TypeX.StatusMailboxesBusAddress =
822 Virtual_to_Bus32(Controller->V1.FirstStatusMailbox);
823 for (i = 0; i < 2; i++)
824 switch (Controller->HardwareType)
825 {
826 case DAC960_LA_Controller:
827 while (--TimeoutCounter >= 0)
828 {
829 if (!DAC960_LA_HardwareMailboxFullP(ControllerBaseAddress))
830 break;
831 udelay(10);
832 }
833 if (TimeoutCounter < 0) return false;
834 DAC960_LA_WriteHardwareMailbox(ControllerBaseAddress, &CommandMailbox);
835 DAC960_LA_HardwareMailboxNewCommand(ControllerBaseAddress);
836 while (--TimeoutCounter >= 0)
837 {
838 if (DAC960_LA_HardwareMailboxStatusAvailableP(
839 ControllerBaseAddress))
840 break;
841 udelay(10);
842 }
843 if (TimeoutCounter < 0) return false;
844 CommandStatus = DAC960_LA_ReadStatusRegister(ControllerBaseAddress);
845 DAC960_LA_AcknowledgeHardwareMailboxInterrupt(ControllerBaseAddress);
846 DAC960_LA_AcknowledgeHardwareMailboxStatus(ControllerBaseAddress);
847 if (CommandStatus == DAC960_V1_NormalCompletion) return true;
848 Controller->V1.DualModeMemoryMailboxInterface = false;
849 CommandMailbox.TypeX.CommandOpcode2 = 0x10;
850 break;
851 case DAC960_PG_Controller:
852 while (--TimeoutCounter >= 0)
853 {
854 if (!DAC960_PG_HardwareMailboxFullP(ControllerBaseAddress))
855 break;
856 udelay(10);
857 }
858 if (TimeoutCounter < 0) return false;
859 DAC960_PG_WriteHardwareMailbox(ControllerBaseAddress, &CommandMailbox);
860 DAC960_PG_HardwareMailboxNewCommand(ControllerBaseAddress);
861 while (--TimeoutCounter >= 0)
862 {
863 if (DAC960_PG_HardwareMailboxStatusAvailableP(
864 ControllerBaseAddress))
865 break;
866 udelay(10);
867 }
868 if (TimeoutCounter < 0) return false;
869 CommandStatus = DAC960_PG_ReadStatusRegister(ControllerBaseAddress);
870 DAC960_PG_AcknowledgeHardwareMailboxInterrupt(ControllerBaseAddress);
871 DAC960_PG_AcknowledgeHardwareMailboxStatus(ControllerBaseAddress);
872 if (CommandStatus == DAC960_V1_NormalCompletion) return true;
873 Controller->V1.DualModeMemoryMailboxInterface = false;
874 CommandMailbox.TypeX.CommandOpcode2 = 0x10;
875 break;
876 default:
877 break;
878 }
879 return false;
880 }
881
882
883 /*
884 DAC960_V2_EnableMemoryMailboxInterface enables the Memory Mailbox Interface
885 for DAC960 V2 Firmware Controllers.
886 */
887
888 static boolean DAC960_V2_EnableMemoryMailboxInterface(DAC960_Controller_T
889 *Controller)
890 {
891 void *ControllerBaseAddress = Controller->BaseAddress;
892 DAC960_V2_CommandMailbox_T *CommandMailboxesMemory;
893 DAC960_V2_StatusMailbox_T *StatusMailboxesMemory;
894 DAC960_V2_CommandMailbox_T CommandMailbox;
895 DAC960_V2_CommandStatus_T CommandStatus = 0;
896 unsigned long MemoryMailboxPagesAddress;
897 unsigned long MemoryMailboxPagesOrder;
898 unsigned long MemoryMailboxPagesSize;
899 MemoryMailboxPagesOrder = 0;
900 MemoryMailboxPagesSize =
901 DAC960_V2_CommandMailboxCount * sizeof(DAC960_V2_CommandMailbox_T) +
902 DAC960_V2_StatusMailboxCount * sizeof(DAC960_V2_StatusMailbox_T) +
903 sizeof(DAC960_V2_HealthStatusBuffer_T);
904 while (MemoryMailboxPagesSize > PAGE_SIZE << MemoryMailboxPagesOrder)
905 MemoryMailboxPagesOrder++;
906 MemoryMailboxPagesAddress =
907 __get_free_pages(GFP_KERNEL, MemoryMailboxPagesOrder);
908 Controller->MemoryMailboxPagesAddress = MemoryMailboxPagesAddress;
909 CommandMailboxesMemory =
910 (DAC960_V2_CommandMailbox_T *) MemoryMailboxPagesAddress;
911 if (CommandMailboxesMemory == NULL) return false;
912 Controller->MemoryMailboxPagesOrder = MemoryMailboxPagesOrder;
913 memset(CommandMailboxesMemory, 0, MemoryMailboxPagesSize);
914 Controller->V2.FirstCommandMailbox = CommandMailboxesMemory;
915 CommandMailboxesMemory += DAC960_V2_CommandMailboxCount - 1;
916 Controller->V2.LastCommandMailbox = CommandMailboxesMemory;
917 Controller->V2.NextCommandMailbox = Controller->V2.FirstCommandMailbox;
918 Controller->V2.PreviousCommandMailbox1 = Controller->V2.LastCommandMailbox;
919 Controller->V2.PreviousCommandMailbox2 =
920 Controller->V2.LastCommandMailbox - 1;
921 StatusMailboxesMemory =
922 (DAC960_V2_StatusMailbox_T *) (CommandMailboxesMemory + 1);
923 Controller->V2.FirstStatusMailbox = StatusMailboxesMemory;
924 StatusMailboxesMemory += DAC960_V2_StatusMailboxCount - 1;
925 Controller->V2.LastStatusMailbox = StatusMailboxesMemory;
926 Controller->V2.NextStatusMailbox = Controller->V2.FirstStatusMailbox;
927 Controller->V2.HealthStatusBuffer =
928 (DAC960_V2_HealthStatusBuffer_T *) (StatusMailboxesMemory + 1);
929 /* Enable the Memory Mailbox Interface. */
930 memset(&CommandMailbox, 0, sizeof(DAC960_V2_CommandMailbox_T));
931 CommandMailbox.SetMemoryMailbox.CommandIdentifier = 1;
932 CommandMailbox.SetMemoryMailbox.CommandOpcode = DAC960_V2_IOCTL;
933 CommandMailbox.SetMemoryMailbox.CommandControlBits.NoAutoRequestSense = true;
934 CommandMailbox.SetMemoryMailbox.FirstCommandMailboxSizeKB =
935 (DAC960_V2_CommandMailboxCount * sizeof(DAC960_V2_CommandMailbox_T)) >> 10;
936 CommandMailbox.SetMemoryMailbox.FirstStatusMailboxSizeKB =
937 (DAC960_V2_StatusMailboxCount * sizeof(DAC960_V2_StatusMailbox_T)) >> 10;
938 CommandMailbox.SetMemoryMailbox.SecondCommandMailboxSizeKB = 0;
939 CommandMailbox.SetMemoryMailbox.SecondStatusMailboxSizeKB = 0;
940 CommandMailbox.SetMemoryMailbox.RequestSenseSize = 0;
941 CommandMailbox.SetMemoryMailbox.IOCTL_Opcode = DAC960_V2_SetMemoryMailbox;
942 CommandMailbox.SetMemoryMailbox.HealthStatusBufferSizeKB = 1;
943 CommandMailbox.SetMemoryMailbox.HealthStatusBufferBusAddress =
944 Virtual_to_Bus64(Controller->V2.HealthStatusBuffer);
945 CommandMailbox.SetMemoryMailbox.FirstCommandMailboxBusAddress =
946 Virtual_to_Bus64(Controller->V2.FirstCommandMailbox);
947 CommandMailbox.SetMemoryMailbox.FirstStatusMailboxBusAddress =
948 Virtual_to_Bus64(Controller->V2.FirstStatusMailbox);
949 switch (Controller->HardwareType)
950 {
951 case DAC960_BA_Controller:
952 while (DAC960_BA_HardwareMailboxFullP(ControllerBaseAddress))
953 udelay(1);
954 DAC960_BA_WriteHardwareMailbox(ControllerBaseAddress, &CommandMailbox);
955 DAC960_BA_HardwareMailboxNewCommand(ControllerBaseAddress);
956 while (!DAC960_BA_HardwareMailboxStatusAvailableP(ControllerBaseAddress))
957 udelay(1);
958 CommandStatus = DAC960_BA_ReadCommandStatus(ControllerBaseAddress);
959 DAC960_BA_AcknowledgeHardwareMailboxInterrupt(ControllerBaseAddress);
960 DAC960_BA_AcknowledgeHardwareMailboxStatus(ControllerBaseAddress);
961 break;
962 case DAC960_LP_Controller:
963 while (DAC960_LP_HardwareMailboxFullP(ControllerBaseAddress))
964 udelay(1);
965 DAC960_LP_WriteHardwareMailbox(ControllerBaseAddress, &CommandMailbox);
966 DAC960_LP_HardwareMailboxNewCommand(ControllerBaseAddress);
967 while (!DAC960_LP_HardwareMailboxStatusAvailableP(ControllerBaseAddress))
968 udelay(1);
969 CommandStatus = DAC960_LP_ReadCommandStatus(ControllerBaseAddress);
970 DAC960_LP_AcknowledgeHardwareMailboxInterrupt(ControllerBaseAddress);
971 DAC960_LP_AcknowledgeHardwareMailboxStatus(ControllerBaseAddress);
972 break;
973 default:
974 break;
975 }
976 return (CommandStatus == DAC960_V2_NormalCompletion);
977 }
978
979
980 /*
981 DAC960_V1_ReadControllerConfiguration reads the Configuration Information
982 from DAC960 V1 Firmware Controllers and initializes the Controller structure.
983 */
984
985 static boolean DAC960_V1_ReadControllerConfiguration(DAC960_Controller_T
986 *Controller)
987 {
988 DAC960_V1_Enquiry2_T Enquiry2;
989 DAC960_V1_Config2_T Config2;
990 int LogicalDriveNumber, Channel, TargetID;
991 if (!DAC960_V1_ExecuteType3(Controller, DAC960_V1_Enquiry,
992 &Controller->V1.Enquiry))
993 return DAC960_Failure(Controller, "ENQUIRY");
994 if (!DAC960_V1_ExecuteType3(Controller, DAC960_V1_Enquiry2, &Enquiry2))
995 return DAC960_Failure(Controller, "ENQUIRY2");
996 if (!DAC960_V1_ExecuteType3(Controller, DAC960_V1_ReadConfig2, &Config2))
997 return DAC960_Failure(Controller, "READ CONFIG2");
998 if (!DAC960_V1_ExecuteType3(Controller, DAC960_V1_GetLogicalDriveInformation,
999 &Controller->V1.LogicalDriveInformation))
1000 return DAC960_Failure(Controller, "GET LOGICAL DRIVE INFORMATION");
1001 for (Channel = 0; Channel < Enquiry2.ActualChannels; Channel++)
1002 for (TargetID = 0; TargetID < Enquiry2.MaxTargets; TargetID++)
1003 if (!DAC960_V1_ExecuteType3D(Controller, DAC960_V1_GetDeviceState,
1004 Channel, TargetID,
1005 &Controller->V1.DeviceState
1006 [Channel][TargetID]))
1007 return DAC960_Failure(Controller, "GET DEVICE STATE");
1008 /*
1009 Initialize the Controller Model Name and Full Model Name fields.
1010 */
1011 switch (Enquiry2.HardwareID.SubModel)
1012 {
1013 case DAC960_V1_P_PD_PU:
1014 if (Enquiry2.SCSICapability.BusSpeed == DAC960_V1_Ultra)
1015 strcpy(Controller->ModelName, "DAC960PU");
1016 else strcpy(Controller->ModelName, "DAC960PD");
1017 break;
1018 case DAC960_V1_PL:
1019 strcpy(Controller->ModelName, "DAC960PL");
1020 break;
1021 case DAC960_V1_PG:
1022 strcpy(Controller->ModelName, "DAC960PG");
1023 break;
1024 case DAC960_V1_PJ:
1025 strcpy(Controller->ModelName, "DAC960PJ");
1026 break;
1027 case DAC960_V1_PR:
1028 strcpy(Controller->ModelName, "DAC960PR");
1029 break;
1030 case DAC960_V1_PT:
1031 strcpy(Controller->ModelName, "DAC960PT");
1032 break;
1033 case DAC960_V1_PTL0:
1034 strcpy(Controller->ModelName, "DAC960PTL0");
1035 break;
1036 case DAC960_V1_PRL:
1037 strcpy(Controller->ModelName, "DAC960PRL");
1038 break;
1039 case DAC960_V1_PTL1:
1040 strcpy(Controller->ModelName, "DAC960PTL1");
1041 break;
1042 case DAC960_V1_1164P:
1043 strcpy(Controller->ModelName, "DAC1164P");
1044 break;
1045 default:
1046 return DAC960_Failure(Controller, "MODEL VERIFICATION");
1047 }
1048 strcpy(Controller->FullModelName, "Mylex ");
1049 strcat(Controller->FullModelName, Controller->ModelName);
1050 /*
1051 Initialize the Controller Firmware Version field and verify that it
1052 is a supported firmware version. The supported firmware versions are:
1053
1054 DAC1164P 5.06 and above
1055 DAC960PTL/PRL/PJ/PG 4.06 and above
1056 DAC960PU/PD/PL 3.51 and above
1057 */
1058 sprintf(Controller->FirmwareVersion, "%d.%02d-%c-%02d",
1059 Enquiry2.FirmwareID.MajorVersion, Enquiry2.FirmwareID.MinorVersion,
1060 Enquiry2.FirmwareID.FirmwareType, Enquiry2.FirmwareID.TurnID);
1061 if (!((Controller->FirmwareVersion[0] == '5' &&
1062 strcmp(Controller->FirmwareVersion, "5.06") >= 0) ||
1063 (Controller->FirmwareVersion[0] == '4' &&
1064 strcmp(Controller->FirmwareVersion, "4.06") >= 0) ||
1065 (Controller->FirmwareVersion[0] == '3' &&
1066 strcmp(Controller->FirmwareVersion, "3.51") >= 0)))
1067 {
1068 DAC960_Failure(Controller, "FIRMWARE VERSION VERIFICATION");
1069 DAC960_Error("Firmware Version = '%s'\n", Controller,
1070 Controller->FirmwareVersion);
1071 return false;
1072 }
1073 /*
1074 Initialize the Controller Channels, Targets, Memory Size, and SAF-TE
1075 Enclosure Management Enabled fields.
1076 */
1077 Controller->Channels = Enquiry2.ActualChannels;
1078 Controller->Targets = Enquiry2.MaxTargets;
1079 Controller->MemorySize = Enquiry2.MemorySize >> 20;
1080 Controller->V1.SAFTE_EnclosureManagementEnabled =
1081 (Enquiry2.FaultManagementType == DAC960_V1_SAFTE);
1082 /*
1083 Initialize the Controller Queue Depth, Driver Queue Depth, Logical Drive
1084 Count, Maximum Blocks per Command, Controller Scatter/Gather Limit, and
1085 Driver Scatter/Gather Limit. The Driver Queue Depth must be at most one
1086 less than the Controller Queue Depth to allow for an automatic drive
1087 rebuild operation.
1088 */
1089 Controller->ControllerQueueDepth = Controller->V1.Enquiry.MaxCommands;
1090 Controller->DriverQueueDepth = Controller->ControllerQueueDepth - 1;
1091 if (Controller->DriverQueueDepth > DAC960_MaxDriverQueueDepth)
1092 Controller->DriverQueueDepth = DAC960_MaxDriverQueueDepth;
1093 Controller->LogicalDriveCount =
1094 Controller->V1.Enquiry.NumberOfLogicalDrives;
1095 Controller->MaxBlocksPerCommand = Enquiry2.MaxBlocksPerCommand;
1096 Controller->ControllerScatterGatherLimit = Enquiry2.MaxScatterGatherEntries;
1097 Controller->DriverScatterGatherLimit =
1098 Controller->ControllerScatterGatherLimit;
1099 if (Controller->DriverScatterGatherLimit > DAC960_V1_ScatterGatherLimit)
1100 Controller->DriverScatterGatherLimit = DAC960_V1_ScatterGatherLimit;
1101 /*
1102 Initialize the Stripe Size, Segment Size, and Geometry Translation.
1103 */
1104 Controller->V1.StripeSize = Config2.BlocksPerStripe * Config2.BlockFactor
1105 >> (10 - DAC960_BlockSizeBits);
1106 Controller->V1.SegmentSize = Config2.BlocksPerCacheLine * Config2.BlockFactor
1107 >> (10 - DAC960_BlockSizeBits);
1108 switch (Config2.DriveGeometry)
1109 {
1110 case DAC960_V1_Geometry_128_32:
1111 Controller->V1.GeometryTranslationHeads = 128;
1112 Controller->V1.GeometryTranslationSectors = 32;
1113 break;
1114 case DAC960_V1_Geometry_255_63:
1115 Controller->V1.GeometryTranslationHeads = 255;
1116 Controller->V1.GeometryTranslationSectors = 63;
1117 break;
1118 default:
1119 return DAC960_Failure(Controller, "CONFIG2 DRIVE GEOMETRY");
1120 }
1121 /*
1122 Initialize the Logical Drive Initially Accessible flag.
1123 */
1124 for (LogicalDriveNumber = 0;
1125 LogicalDriveNumber < Controller->LogicalDriveCount;
1126 LogicalDriveNumber++)
1127 if (Controller->V1.LogicalDriveInformation
1128 [LogicalDriveNumber].LogicalDriveState !=
1129 DAC960_V1_LogicalDrive_Offline)
1130 Controller->LogicalDriveInitiallyAccessible[LogicalDriveNumber] = true;
1131 Controller->V1.LastRebuildStatus = DAC960_V1_NoRebuildOrCheckInProgress;
1132 return true;
1133 }
1134
1135
1136 /*
1137 DAC960_V2_ReadControllerConfiguration reads the Configuration Information
1138 from DAC960 V2 Firmware Controllers and initializes the Controller structure.
1139 */
1140
1141 static boolean DAC960_V2_ReadControllerConfiguration(DAC960_Controller_T
1142 *Controller)
1143 {
1144 DAC960_V2_ControllerInfo_T *ControllerInfo =
1145 &Controller->V2.ControllerInformation;
1146 unsigned short LogicalDeviceNumber = 0;
1147 int ModelNameLength;
1148 if (!DAC960_V2_ControllerInfo(Controller, DAC960_V2_GetControllerInfo,
1149 ControllerInfo,
1150 sizeof(DAC960_V2_ControllerInfo_T)))
1151 return DAC960_Failure(Controller, "GET CONTROLLER INFO");
1152 if (!DAC960_V2_GeneralInfo(Controller, DAC960_V2_GetHealthStatus,
1153 Controller->V2.HealthStatusBuffer,
1154 sizeof(DAC960_V2_HealthStatusBuffer_T)))
1155 return DAC960_Failure(Controller, "GET HEALTH STATUS");
1156 /*
1157 Initialize the Controller Model Name and Full Model Name fields.
1158 */
1159 ModelNameLength = sizeof(ControllerInfo->ControllerName);
1160 if (ModelNameLength > sizeof(Controller->ModelName)-1)
1161 ModelNameLength = sizeof(Controller->ModelName)-1;
1162 memcpy(Controller->ModelName, ControllerInfo->ControllerName,
1163 ModelNameLength);
1164 ModelNameLength--;
1165 while (Controller->ModelName[ModelNameLength] == ' ' ||
1166 Controller->ModelName[ModelNameLength] == '\0')
1167 ModelNameLength--;
1168 Controller->ModelName[++ModelNameLength] = '\0';
1169 strcpy(Controller->FullModelName, "Mylex ");
1170 strcat(Controller->FullModelName, Controller->ModelName);
1171 /*
1172 Initialize the Controller Firmware Version field.
1173 */
1174 sprintf(Controller->FirmwareVersion, "%d.%02d-%02d",
1175 ControllerInfo->FirmwareMajorVersion,
1176 ControllerInfo->FirmwareMinorVersion,
1177 ControllerInfo->FirmwareTurnNumber);
1178 if (ControllerInfo->FirmwareMajorVersion == 6 &&
1179 ControllerInfo->FirmwareMinorVersion == 0 &&
1180 ControllerInfo->FirmwareTurnNumber < 1)
1181 {
1182 DAC960_Info("FIRMWARE VERSION %s DOES NOT PROVIDE THE CONTROLLER\n",
1183 Controller, Controller->FirmwareVersion);
1184 DAC960_Info("STATUS MONITORING FUNCTIONALITY NEEDED BY THIS DRIVER.\n",
1185 Controller);
1186 DAC960_Info("PLEASE UPGRADE TO VERSION 6.00-01 OR ABOVE.\n",
1187 Controller);
1188 }
1189 /*
1190 Initialize the Controller Channels, Targets, and Memory Size.
1191 */
1192 Controller->Channels = ControllerInfo->NumberOfPhysicalChannelsPresent;
1193 Controller->Targets =
1194 ControllerInfo->MaximumTargetsPerChannel
1195 [ControllerInfo->NumberOfPhysicalChannelsPresent-1];
1196 Controller->MemorySize = ControllerInfo->MemorySizeMB;
1197 /*
1198 Initialize the Controller Queue Depth, Driver Queue Depth, Logical Drive
1199 Count, Maximum Blocks per Command, Controller Scatter/Gather Limit, and
1200 Driver Scatter/Gather Limit. The Driver Queue Depth must be at most one
1201 less than the Controller Queue Depth to allow for an automatic drive
1202 rebuild operation.
1203 */
1204 Controller->ControllerQueueDepth = ControllerInfo->MaximumParallelCommands;
1205 Controller->DriverQueueDepth = Controller->ControllerQueueDepth - 1;
1206 if (Controller->DriverQueueDepth > DAC960_MaxDriverQueueDepth)
1207 Controller->DriverQueueDepth = DAC960_MaxDriverQueueDepth;
1208 Controller->LogicalDriveCount = ControllerInfo->LogicalDevicesPresent;
1209 Controller->MaxBlocksPerCommand =
1210 ControllerInfo->MaximumDataTransferSizeInBlocks;
1211 Controller->ControllerScatterGatherLimit =
1212 ControllerInfo->MaximumScatterGatherEntries;
1213 Controller->DriverScatterGatherLimit =
1214 Controller->ControllerScatterGatherLimit;
1215 if (Controller->DriverScatterGatherLimit > DAC960_V2_ScatterGatherLimit)
1216 Controller->DriverScatterGatherLimit = DAC960_V2_ScatterGatherLimit;
1217 /*
1218 Initialize the Logical Device Information.
1219 */
1220 while (true)
1221 {
1222 DAC960_V2_LogicalDeviceInfo_T *NewLogicalDeviceInfo =
1223 &Controller->V2.NewLogicalDeviceInformation;
1224 DAC960_V2_LogicalDeviceInfo_T *LogicalDeviceInfo;
1225 DAC960_V2_PhysicalDevice_T PhysicalDevice;
1226 if (!DAC960_V2_LogicalDeviceInfo(Controller,
1227 DAC960_V2_GetLogicalDeviceInfoValid,
1228 LogicalDeviceNumber,
1229 NewLogicalDeviceInfo,
1230 sizeof(DAC960_V2_LogicalDeviceInfo_T)))
1231 break;
1232 LogicalDeviceNumber = NewLogicalDeviceInfo->LogicalDeviceNumber;
1233 if (LogicalDeviceNumber > DAC960_MaxLogicalDrives)
1234 panic("DAC960: Logical Drive Number %d not supported\n",
1235 LogicalDeviceNumber);
1236 if (NewLogicalDeviceInfo->DeviceBlockSizeInBytes != DAC960_BlockSize)
1237 panic("DAC960: Logical Drive Block Size %d not supported\n",
1238 NewLogicalDeviceInfo->DeviceBlockSizeInBytes);
1239 PhysicalDevice.Controller = 0;
1240 PhysicalDevice.Channel = NewLogicalDeviceInfo->Channel;
1241 PhysicalDevice.TargetID = NewLogicalDeviceInfo->TargetID;
1242 PhysicalDevice.LogicalUnit = NewLogicalDeviceInfo->LogicalUnit;
1243 Controller->V2.LogicalDriveToVirtualDevice[LogicalDeviceNumber] =
1244 PhysicalDevice;
1245 if (NewLogicalDeviceInfo->LogicalDeviceState !=
1246 DAC960_V2_LogicalDevice_Offline)
1247 Controller->LogicalDriveInitiallyAccessible[LogicalDeviceNumber] = true;
1248 LogicalDeviceInfo = (DAC960_V2_LogicalDeviceInfo_T *)
1249 kmalloc(sizeof(DAC960_V2_LogicalDeviceInfo_T), GFP_ATOMIC);
1250 if (LogicalDeviceInfo == NULL)
1251 return DAC960_Failure(Controller, "LOGICAL DEVICE ALLOCATION");
1252 Controller->V2.LogicalDeviceInformation[LogicalDeviceNumber] =
1253 LogicalDeviceInfo;
1254 memcpy(LogicalDeviceInfo, NewLogicalDeviceInfo,
1255 sizeof(DAC960_V2_LogicalDeviceInfo_T));
1256 LogicalDeviceNumber++;
1257 }
1258 return true;
1259 }
1260
1261
1262 /*
1263 DAC960_ReportControllerConfiguration reports the Configuration Information
1264 for Controller.
1265 */
1266
1267 static boolean DAC960_ReportControllerConfiguration(DAC960_Controller_T
1268 *Controller)
1269 {
1270 DAC960_Info("Configuring Mylex %s PCI RAID Controller\n",
1271 Controller, Controller->ModelName);
1272 DAC960_Info(" Firmware Version: %s, Channels: %d, Memory Size: %dMB\n",
1273 Controller, Controller->FirmwareVersion,
1274 Controller->Channels, Controller->MemorySize);
1275 DAC960_Info(" PCI Bus: %d, Device: %d, Function: %d, I/O Address: ",
1276 Controller, Controller->Bus,
1277 Controller->Device, Controller->Function);
1278 if (Controller->IO_Address == 0)
1279 DAC960_Info("Unassigned\n", Controller);
1280 else DAC960_Info("0x%X\n", Controller, Controller->IO_Address);
1281 DAC960_Info(" PCI Address: 0x%X mapped at 0x%lX, IRQ Channel: %d\n",
1282 Controller, Controller->PCI_Address,
1283 (unsigned long) Controller->BaseAddress,
1284 Controller->IRQ_Channel);
1285 DAC960_Info(" Controller Queue Depth: %d, "
1286 "Maximum Blocks per Command: %d\n",
1287 Controller, Controller->ControllerQueueDepth,
1288 Controller->MaxBlocksPerCommand);
1289 DAC960_Info(" Driver Queue Depth: %d, "
1290 "Scatter/Gather Limit: %d of %d Segments\n",
1291 Controller, Controller->DriverQueueDepth,
1292 Controller->DriverScatterGatherLimit,
1293 Controller->ControllerScatterGatherLimit);
1294 if (Controller->FirmwareType == DAC960_V1_Controller)
1295 {
1296 DAC960_Info(" Stripe Size: %dKB, Segment Size: %dKB, "
1297 "BIOS Geometry: %d/%d\n", Controller,
1298 Controller->V1.StripeSize,
1299 Controller->V1.SegmentSize,
1300 Controller->V1.GeometryTranslationHeads,
1301 Controller->V1.GeometryTranslationSectors);
1302 if (Controller->V1.SAFTE_EnclosureManagementEnabled)
1303 DAC960_Info(" SAF-TE Enclosure Management Enabled\n", Controller);
1304 }
1305 return true;
1306 }
1307
1308
1309 /*
1310 DAC960_V1_ReadDeviceConfiguration reads the Device Configuration Information
1311 for DAC960 V1 Firmware Controllers by requesting the SCSI Inquiry and SCSI
1312 Inquiry Unit Serial Number information for each device connected to
1313 Controller.
1314 */
1315
1316 static boolean DAC960_V1_ReadDeviceConfiguration(DAC960_Controller_T
1317 *Controller)
1318 {
1319 DAC960_V1_DCDB_T DCDBs[DAC960_V1_MaxChannels], *DCDB;
1320 Completion_T Completions[DAC960_V1_MaxChannels], *Completion;
1321 unsigned long ProcessorFlags;
1322 int Channel, TargetID;
1323 for (TargetID = 0; TargetID < Controller->Targets; TargetID++)
1324 {
1325 for (Channel = 0; Channel < Controller->Channels; Channel++)
1326 {
1327 DAC960_Command_T *Command = Controller->Commands[Channel];
1328 DAC960_SCSI_Inquiry_T *InquiryStandardData =
1329 &Controller->V1.InquiryStandardData[Channel][TargetID];
1330 InquiryStandardData->PeripheralDeviceType = 0x1F;
1331 Completion = &Completions[Channel];
1332 init_completion(Completion);
1333 DCDB = &DCDBs[Channel];
1334 DAC960_V1_ClearCommand(Command);
1335 Command->CommandType = DAC960_ImmediateCommand;
1336 Command->Completion = Completion;
1337 Command->V1.CommandMailbox.Type3.CommandOpcode = DAC960_V1_DCDB;
1338 Command->V1.CommandMailbox.Type3.BusAddress = Virtual_to_Bus32(DCDB);
1339 DCDB->Channel = Channel;
1340 DCDB->TargetID = TargetID;
1341 DCDB->Direction = DAC960_V1_DCDB_DataTransferDeviceToSystem;
1342 DCDB->EarlyStatus = false;
1343 DCDB->Timeout = DAC960_V1_DCDB_Timeout_10_seconds;
1344 DCDB->NoAutomaticRequestSense = false;
1345 DCDB->DisconnectPermitted = true;
1346 DCDB->TransferLength = sizeof(DAC960_SCSI_Inquiry_T);
1347 DCDB->BusAddress = Virtual_to_Bus32(InquiryStandardData);
1348 DCDB->CDBLength = 6;
1349 DCDB->TransferLengthHigh4 = 0;
1350 DCDB->SenseLength = sizeof(DCDB->SenseData);
1351 DCDB->CDB[0] = 0x12; /* INQUIRY */
1352 DCDB->CDB[1] = 0; /* EVPD = 0 */
1353 DCDB->CDB[2] = 0; /* Page Code */
1354 DCDB->CDB[3] = 0; /* Reserved */
1355 DCDB->CDB[4] = sizeof(DAC960_SCSI_Inquiry_T);
1356 DCDB->CDB[5] = 0; /* Control */
1357 DAC960_AcquireControllerLock(Controller, &ProcessorFlags);
1358 DAC960_QueueCommand(Command);
1359 DAC960_ReleaseControllerLock(Controller, &ProcessorFlags);
1360 }
1361 for (Channel = 0; Channel < Controller->Channels; Channel++)
1362 {
1363 DAC960_Command_T *Command = Controller->Commands[Channel];
1364 DAC960_SCSI_Inquiry_UnitSerialNumber_T *InquiryUnitSerialNumber =
1365 &Controller->V1.InquiryUnitSerialNumber[Channel][TargetID];
1366 InquiryUnitSerialNumber->PeripheralDeviceType = 0x1F;
1367 Completion = &Completions[Channel];
1368 wait_for_completion(Completion);
1369 if (Command->V1.CommandStatus != DAC960_V1_NormalCompletion)
1370 continue;
1371 Command->Completion = Completion;
1372 DCDB = &DCDBs[Channel];
1373 DCDB->TransferLength = sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T);
1374 DCDB->BusAddress = Virtual_to_Bus32(InquiryUnitSerialNumber);
1375 DCDB->SenseLength = sizeof(DCDB->SenseData);
1376 DCDB->CDB[0] = 0x12; /* INQUIRY */
1377 DCDB->CDB[1] = 1; /* EVPD = 1 */
1378 DCDB->CDB[2] = 0x80; /* Page Code */
1379 DCDB->CDB[3] = 0; /* Reserved */
1380 DCDB->CDB[4] = sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T);
1381 DCDB->CDB[5] = 0; /* Control */
1382 DAC960_AcquireControllerLock(Controller, &ProcessorFlags);
1383 DAC960_QueueCommand(Command);
1384 DAC960_ReleaseControllerLock(Controller, &ProcessorFlags);
1385 wait_for_completion(Completion);
1386 }
1387 }
1388 return true;
1389 }
1390
1391
1392 /*
1393 DAC960_V2_ReadDeviceConfiguration reads the Device Configuration Information
1394 for DAC960 V2 Firmware Controllers by requesting the Physical Device
1395 Information and SCSI Inquiry Unit Serial Number information for each
1396 device connected to Controller.
1397 */
1398
1399 static boolean DAC960_V2_ReadDeviceConfiguration(DAC960_Controller_T
1400 *Controller)
1401 {
1402 unsigned char Channel = 0, TargetID = 0, LogicalUnit = 0;
1403 unsigned short PhysicalDeviceIndex = 0;
1404 while (true)
1405 {
1406 DAC960_V2_PhysicalDeviceInfo_T *NewPhysicalDeviceInfo =
1407 &Controller->V2.NewPhysicalDeviceInformation;
1408 DAC960_V2_PhysicalDeviceInfo_T *PhysicalDeviceInfo;
1409 DAC960_SCSI_Inquiry_UnitSerialNumber_T *InquiryUnitSerialNumber;
1410 DAC960_Command_T *Command;
1411 DAC960_V2_CommandMailbox_T *CommandMailbox;
1412 if (!DAC960_V2_PhysicalDeviceInfo(Controller,
1413 DAC960_V2_GetPhysicalDeviceInfoValid,
1414 Channel,
1415 TargetID,
1416 LogicalUnit,
1417 NewPhysicalDeviceInfo,
1418 sizeof(DAC960_V2_PhysicalDeviceInfo_T)))
1419 break;
1420 Channel = NewPhysicalDeviceInfo->Channel;
1421 TargetID = NewPhysicalDeviceInfo->TargetID;
1422 LogicalUnit = NewPhysicalDeviceInfo->LogicalUnit;
1423 PhysicalDeviceInfo = (DAC960_V2_PhysicalDeviceInfo_T *)
1424 kmalloc(sizeof(DAC960_V2_PhysicalDeviceInfo_T), GFP_ATOMIC);
1425 if (PhysicalDeviceInfo == NULL)
1426 return DAC960_Failure(Controller, "PHYSICAL DEVICE ALLOCATION");
1427 Controller->V2.PhysicalDeviceInformation[PhysicalDeviceIndex] =
1428 PhysicalDeviceInfo;
1429 memcpy(PhysicalDeviceInfo, NewPhysicalDeviceInfo,
1430 sizeof(DAC960_V2_PhysicalDeviceInfo_T));
1431 InquiryUnitSerialNumber = (DAC960_SCSI_Inquiry_UnitSerialNumber_T *)
1432 kmalloc(sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T), GFP_ATOMIC);
1433 if (InquiryUnitSerialNumber == NULL)
1434 return DAC960_Failure(Controller, "SERIAL NUMBER ALLOCATION");
1435 Controller->V2.InquiryUnitSerialNumber[PhysicalDeviceIndex] =
1436 InquiryUnitSerialNumber;
1437 memset(InquiryUnitSerialNumber, 0,
1438 sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T));
1439 InquiryUnitSerialNumber->PeripheralDeviceType = 0x1F;
1440 Command = DAC960_AllocateCommand(Controller);
1441 CommandMailbox = &Command->V2.CommandMailbox;
1442 DAC960_V2_ClearCommand(Command);
1443 Command->CommandType = DAC960_ImmediateCommand;
1444 CommandMailbox->SCSI_10.CommandOpcode = DAC960_V2_SCSI_10_Passthru;
1445 CommandMailbox->SCSI_10.CommandControlBits
1446 .DataTransferControllerToHost = true;
1447 CommandMailbox->SCSI_10.CommandControlBits
1448 .NoAutoRequestSense = true;
1449 CommandMailbox->SCSI_10.DataTransferSize =
1450 sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T);
1451 CommandMailbox->SCSI_10.PhysicalDevice.LogicalUnit = LogicalUnit;
1452 CommandMailbox->SCSI_10.PhysicalDevice.TargetID = TargetID;
1453 CommandMailbox->SCSI_10.PhysicalDevice.Channel = Channel;
1454 CommandMailbox->SCSI_10.CDBLength = 6;
1455 CommandMailbox->SCSI_10.SCSI_CDB[0] = 0x12; /* INQUIRY */
1456 CommandMailbox->SCSI_10.SCSI_CDB[1] = 1; /* EVPD = 1 */
1457 CommandMailbox->SCSI_10.SCSI_CDB[2] = 0x80; /* Page Code */
1458 CommandMailbox->SCSI_10.SCSI_CDB[3] = 0; /* Reserved */
1459 CommandMailbox->SCSI_10.SCSI_CDB[4] =
1460 sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T);
1461 CommandMailbox->SCSI_10.SCSI_CDB[5] = 0; /* Control */
1462 CommandMailbox->SCSI_10.DataTransferMemoryAddress
1463 .ScatterGatherSegments[0]
1464 .SegmentDataPointer =
1465 Virtual_to_Bus64(InquiryUnitSerialNumber);
1466 CommandMailbox->SCSI_10.DataTransferMemoryAddress
1467 .ScatterGatherSegments[0]
1468 .SegmentByteCount =
1469 CommandMailbox->SCSI_10.DataTransferSize;
1470 DAC960_ExecuteCommand(Command);
1471 DAC960_DeallocateCommand(Command);
1472 PhysicalDeviceIndex++;
1473 LogicalUnit++;
1474 }
1475 return true;
1476 }
1477
1478
1479 /*
1480 DAC960_SanitizeInquiryData sanitizes the Vendor, Model, Revision, and
1481 Product Serial Number fields of the Inquiry Standard Data and Inquiry
1482 Unit Serial Number structures.
1483 */
1484
1485 static void DAC960_SanitizeInquiryData(DAC960_SCSI_Inquiry_T
1486 *InquiryStandardData,
1487 DAC960_SCSI_Inquiry_UnitSerialNumber_T
1488 *InquiryUnitSerialNumber,
1489 unsigned char *Vendor,
1490 unsigned char *Model,
1491 unsigned char *Revision,
1492 unsigned char *SerialNumber)
1493 {
1494 int SerialNumberLength, i;
1495 if (InquiryStandardData->PeripheralDeviceType == 0x1F) return;
1496 for (i = 0; i < sizeof(InquiryStandardData->VendorIdentification); i++)
1497 {
1498 unsigned char VendorCharacter =
1499 InquiryStandardData->VendorIdentification[i];
1500 Vendor[i] = (VendorCharacter >= ' ' && VendorCharacter <= '~'
1501 ? VendorCharacter : ' ');
1502 }
1503 Vendor[sizeof(InquiryStandardData->VendorIdentification)] = '\0';
1504 for (i = 0; i < sizeof(InquiryStandardData->ProductIdentification); i++)
1505 {
1506 unsigned char ModelCharacter =
1507 InquiryStandardData->ProductIdentification[i];
1508 Model[i] = (ModelCharacter >= ' ' && ModelCharacter <= '~'
1509 ? ModelCharacter : ' ');
1510 }
1511 Model[sizeof(InquiryStandardData->ProductIdentification)] = '\0';
1512 for (i = 0; i < sizeof(InquiryStandardData->ProductRevisionLevel); i++)
1513 {
1514 unsigned char RevisionCharacter =
1515 InquiryStandardData->ProductRevisionLevel[i];
1516 Revision[i] = (RevisionCharacter >= ' ' && RevisionCharacter <= '~'
1517 ? RevisionCharacter : ' ');
1518 }
1519 Revision[sizeof(InquiryStandardData->ProductRevisionLevel)] = '\0';
1520 if (InquiryUnitSerialNumber->PeripheralDeviceType == 0x1F) return;
1521 SerialNumberLength = InquiryUnitSerialNumber->PageLength;
1522 if (SerialNumberLength >
1523 sizeof(InquiryUnitSerialNumber->ProductSerialNumber))
1524 SerialNumberLength = sizeof(InquiryUnitSerialNumber->ProductSerialNumber);
1525 for (i = 0; i < SerialNumberLength; i++)
1526 {
1527 unsigned char SerialNumberCharacter =
1528 InquiryUnitSerialNumber->ProductSerialNumber[i];
1529 SerialNumber[i] =
1530 (SerialNumberCharacter >= ' ' && SerialNumberCharacter <= '~'
1531 ? SerialNumberCharacter : ' ');
1532 }
1533 SerialNumber[SerialNumberLength] = '\0';
1534 }
1535
1536
1537 /*
1538 DAC960_V1_ReportDeviceConfiguration reports the Device Configuration
1539 Information for DAC960 V1 Firmware Controllers.
1540 */
1541
1542 static boolean DAC960_V1_ReportDeviceConfiguration(DAC960_Controller_T
1543 *Controller)
1544 {
1545 int LogicalDriveNumber, Channel, TargetID;
1546 DAC960_Info(" Physical Devices:\n", Controller);
1547 for (Channel = 0; Channel < Controller->Channels; Channel++)
1548 for (TargetID = 0; TargetID < Controller->Targets; TargetID++)
1549 {
1550 DAC960_SCSI_Inquiry_T *InquiryStandardData =
1551 &Controller->V1.InquiryStandardData[Channel][TargetID];
1552 DAC960_SCSI_Inquiry_UnitSerialNumber_T *InquiryUnitSerialNumber =
1553 &Controller->V1.InquiryUnitSerialNumber[Channel][TargetID];
1554 DAC960_V1_DeviceState_T *DeviceState =
1555 &Controller->V1.DeviceState[Channel][TargetID];
1556 DAC960_V1_ErrorTableEntry_T *ErrorEntry =
1557 &Controller->V1.ErrorTable.ErrorTableEntries[Channel][TargetID];
1558 char Vendor[1+sizeof(InquiryStandardData->VendorIdentification)];
1559 char Model[1+sizeof(InquiryStandardData->ProductIdentification)];
1560 char Revision[1+sizeof(InquiryStandardData->ProductRevisionLevel)];
1561 char SerialNumber[1+sizeof(InquiryUnitSerialNumber
1562 ->ProductSerialNumber)];
1563 if (InquiryStandardData->PeripheralDeviceType == 0x1F) continue;
1564 DAC960_SanitizeInquiryData(InquiryStandardData, InquiryUnitSerialNumber,
1565 Vendor, Model, Revision, SerialNumber);
1566 DAC960_Info(" %d:%d%s Vendor: %s Model: %s Revision: %s\n",
1567 Controller, Channel, TargetID, (TargetID < 10 ? " " : ""),
1568 Vendor, Model, Revision);
1569 if (InquiryUnitSerialNumber->PeripheralDeviceType != 0x1F)
1570 DAC960_Info(" Serial Number: %s\n", Controller, SerialNumber);
1571 if (DeviceState->Present &&
1572 DeviceState->DeviceType == DAC960_V1_DiskType)
1573 {
1574 if (Controller->V1.DeviceResetCount[Channel][TargetID] > 0)
1575 DAC960_Info(" Disk Status: %s, %d blocks, %d resets\n",
1576 Controller,
1577 (DeviceState->DeviceState == DAC960_V1_Device_Dead
1578 ? "Dead"
1579 : DeviceState->DeviceState
1580 == DAC960_V1_Device_WriteOnly
1581 ? "Write-Only"
1582 : DeviceState->DeviceState
1583 == DAC960_V1_Device_Online
1584 ? "Online" : "Standby"),
1585 DeviceState->DiskSize,
1586 Controller->V1.DeviceResetCount[Channel][TargetID]);
1587 else
1588 DAC960_Info(" Disk Status: %s, %d blocks\n", Controller,
1589 (DeviceState->DeviceState == DAC960_V1_Device_Dead
1590 ? "Dead"
1591 : DeviceState->DeviceState
1592 == DAC960_V1_Device_WriteOnly
1593 ? "Write-Only"
1594 : DeviceState->DeviceState
1595 == DAC960_V1_Device_Online
1596 ? "Online" : "Standby"),
1597 DeviceState->DiskSize);
1598 }
1599 if (ErrorEntry->ParityErrorCount > 0 ||
1600 ErrorEntry->SoftErrorCount > 0 ||
1601 ErrorEntry->HardErrorCount > 0 ||
1602 ErrorEntry->MiscErrorCount > 0)
1603 DAC960_Info(" Errors - Parity: %d, Soft: %d, "
1604 "Hard: %d, Misc: %d\n", Controller,
1605 ErrorEntry->ParityErrorCount,
1606 ErrorEntry->SoftErrorCount,
1607 ErrorEntry->HardErrorCount,
1608 ErrorEntry->MiscErrorCount);
1609 }
1610 DAC960_Info(" Logical Drives:\n", Controller);
1611 for (LogicalDriveNumber = 0;
1612 LogicalDriveNumber < Controller->LogicalDriveCount;
1613 LogicalDriveNumber++)
1614 {
1615 DAC960_V1_LogicalDriveInformation_T *LogicalDriveInformation =
1616 &Controller->V1.LogicalDriveInformation[LogicalDriveNumber];
1617 DAC960_Info(" /dev/rd/c%dd%d: RAID-%d, %s, %d blocks, %s\n",
1618 Controller, Controller->ControllerNumber, LogicalDriveNumber,
1619 LogicalDriveInformation->RAIDLevel,
1620 (LogicalDriveInformation->LogicalDriveState
1621 == DAC960_V1_LogicalDrive_Online
1622 ? "Online"
1623 : LogicalDriveInformation->LogicalDriveState
1624 == DAC960_V1_LogicalDrive_Critical
1625 ? "Critical" : "Offline"),
1626 LogicalDriveInformation->LogicalDriveSize,
1627 (LogicalDriveInformation->WriteBack
1628 ? "Write Back" : "Write Thru"));
1629 }
1630 return true;
1631 }
1632
1633
1634 /*
1635 DAC960_V2_ReportDeviceConfiguration reports the Device Configuration
1636 Information for DAC960 V2 Firmware Controllers.
1637 */
1638
1639 static boolean DAC960_V2_ReportDeviceConfiguration(DAC960_Controller_T
1640 *Controller)
1641 {
1642 int PhysicalDeviceIndex, LogicalDriveNumber;
1643 DAC960_Info(" Physical Devices:\n", Controller);
1644 for (PhysicalDeviceIndex = 0;
1645 PhysicalDeviceIndex < DAC960_V2_MaxPhysicalDevices;
1646 PhysicalDeviceIndex++)
1647 {
1648 DAC960_V2_PhysicalDeviceInfo_T *PhysicalDeviceInfo =
1649 Controller->V2.PhysicalDeviceInformation[PhysicalDeviceIndex];
1650 DAC960_SCSI_Inquiry_T *InquiryStandardData =
1651 (DAC960_SCSI_Inquiry_T *) &PhysicalDeviceInfo->SCSI_InquiryData;
1652 DAC960_SCSI_Inquiry_UnitSerialNumber_T *InquiryUnitSerialNumber =
1653 Controller->V2.InquiryUnitSerialNumber[PhysicalDeviceIndex];
1654 char Vendor[1+sizeof(InquiryStandardData->VendorIdentification)];
1655 char Model[1+sizeof(InquiryStandardData->ProductIdentification)];
1656 char Revision[1+sizeof(InquiryStandardData->ProductRevisionLevel)];
1657 char SerialNumber[1+sizeof(InquiryUnitSerialNumber->ProductSerialNumber)];
1658 if (PhysicalDeviceInfo == NULL) break;
1659 DAC960_SanitizeInquiryData(InquiryStandardData, InquiryUnitSerialNumber,
1660 Vendor, Model, Revision, SerialNumber);
1661 DAC960_Info(" %d:%d%s Vendor: %s Model: %s Revision: %s\n",
1662 Controller,
1663 PhysicalDeviceInfo->Channel,
1664 PhysicalDeviceInfo->TargetID,
1665 (PhysicalDeviceInfo->TargetID < 10 ? " " : ""),
1666 Vendor, Model, Revision);
1667 if (PhysicalDeviceInfo->NegotiatedSynchronousMegaTransfers == 0)
1668 DAC960_Info(" %sAsynchronous\n", Controller,
1669 (PhysicalDeviceInfo->NegotiatedDataWidthBits == 16
1670 ? "Wide " :""));
1671 else
1672 DAC960_Info(" %sSynchronous at %d MB/sec\n", Controller,
1673 (PhysicalDeviceInfo->NegotiatedDataWidthBits == 16
1674 ? "Wide " :""),
1675 (PhysicalDeviceInfo->NegotiatedSynchronousMegaTransfers
1676 * (PhysicalDeviceInfo->NegotiatedDataWidthBits == 16
1677 ? 2 : 1)));
1678 if (InquiryUnitSerialNumber->PeripheralDeviceType != 0x1F)
1679 DAC960_Info(" Serial Number: %s\n", Controller, SerialNumber);
1680 if (PhysicalDeviceInfo->PhysicalDeviceState ==
1681 DAC960_V2_Device_Unconfigured)
1682 continue;
1683 DAC960_Info(" Disk Status: %s, %d blocks\n", Controller,
1684 (PhysicalDeviceInfo->PhysicalDeviceState
1685 == DAC960_V2_Device_Online
1686 ? "Online"
1687 : PhysicalDeviceInfo->PhysicalDeviceState
1688 == DAC960_V2_Device_WriteOnly
1689 ? "Write-Only"
1690 : PhysicalDeviceInfo->PhysicalDeviceState
1691 == DAC960_V2_Device_Dead
1692 ? "Dead" : "Standby"),
1693 PhysicalDeviceInfo
1694 ->ConfigurableDeviceSizeIn512ByteBlocksOrMB);
1695 if (PhysicalDeviceInfo->ParityErrors == 0 &&
1696 PhysicalDeviceInfo->SoftErrors == 0 &&
1697 PhysicalDeviceInfo->HardErrors == 0 &&
1698 PhysicalDeviceInfo->MiscellaneousErrors == 0 &&
1699 PhysicalDeviceInfo->CommandTimeouts == 0 &&
1700 PhysicalDeviceInfo->Retries == 0 &&
1701 PhysicalDeviceInfo->Aborts == 0 &&
1702 PhysicalDeviceInfo->PredictedFailuresDetected == 0)
1703 continue;
1704 DAC960_Info(" Errors - Parity: %d, Soft: %d, "
1705 "Hard: %d, Misc: %d\n", Controller,
1706 PhysicalDeviceInfo->ParityErrors,
1707 PhysicalDeviceInfo->SoftErrors,
1708 PhysicalDeviceInfo->HardErrors,
1709 PhysicalDeviceInfo->MiscellaneousErrors);
1710 DAC960_Info(" Timeouts: %d, Retries: %d, "
1711 "Aborts: %d, Predicted: %d\n", Controller,
1712 PhysicalDeviceInfo->CommandTimeouts,
1713 PhysicalDeviceInfo->Retries,
1714 PhysicalDeviceInfo->Aborts,
1715 PhysicalDeviceInfo->PredictedFailuresDetected);
1716 }
1717 DAC960_Info(" Logical Drives:\n", Controller);
1718 for (LogicalDriveNumber = 0;
1719 LogicalDriveNumber < DAC960_MaxLogicalDrives;
1720 LogicalDriveNumber++)
1721 {
1722 DAC960_V2_LogicalDeviceInfo_T *LogicalDeviceInfo =
1723 Controller->V2.LogicalDeviceInformation[LogicalDriveNumber];
1724 unsigned char *ReadCacheStatus[] = { "Read Cache Disabled",
1725 "Read Cache Enabled",
1726 "Read Ahead Enabled",
1727 "Intelligent Read Ahead Enabled",
1728 "-", "-", "-", "-" };
1729 unsigned char *WriteCacheStatus[] = { "Write Cache Disabled",
1730 "Logical Device Read Only",
1731 "Write Cache Enabled",
1732 "Intelligent Write Cache Enabled",
1733 "-", "-", "-", "-" };
1734 unsigned char *GeometryTranslation;
1735 if (LogicalDeviceInfo == NULL) continue;
1736 switch(LogicalDeviceInfo->DriveGeometry)
1737 {
1738 case DAC960_V2_Geometry_128_32:
1739 GeometryTranslation = "128/32";
1740 break;
1741 case DAC960_V2_Geometry_255_63:
1742 GeometryTranslation = "255/63";
1743 break;
1744 default:
1745 GeometryTranslation = "Invalid";
1746 DAC960_Error("Illegal Logical Device Geometry %d\n",
1747 Controller, LogicalDeviceInfo->DriveGeometry);
1748 break;
1749 }
1750 DAC960_Info(" /dev/rd/c%dd%d: RAID-%d, %s, %d blocks\n",
1751 Controller, Controller->ControllerNumber, LogicalDriveNumber,
1752 LogicalDeviceInfo->RAIDLevel,
1753 (LogicalDeviceInfo->LogicalDeviceState
1754 == DAC960_V2_LogicalDevice_Online
1755 ? "Online"
1756 : LogicalDeviceInfo->LogicalDeviceState
1757 == DAC960_V2_LogicalDevice_Critical
1758 ? "Critical" : "Offline"),
1759 LogicalDeviceInfo->ConfigurableDeviceSizeIn512ByteBlocksOrMB);
1760 DAC960_Info(" Logical Device %s, BIOS Geometry: %s\n",
1761 Controller,
1762 (LogicalDeviceInfo->LogicalDeviceControl
1763 .LogicalDeviceInitialized
1764 ? "Initialized" : "Uninitialized"),
1765 GeometryTranslation);
1766 if (LogicalDeviceInfo->StripeSize == 0)
1767 {
1768 if (LogicalDeviceInfo->CacheLineSize == 0)
1769 DAC960_Info(" Stripe Size: N/A, "
1770 "Segment Size: N/A\n", Controller);
1771 else
1772 DAC960_Info(" Stripe Size: N/A, "
1773 "Segment Size: %dKB\n", Controller,
1774 1 << (LogicalDeviceInfo->CacheLineSize - 2));
1775 }
1776 else
1777 {
1778 if (LogicalDeviceInfo->CacheLineSize == 0)
1779 DAC960_Info(" Stripe Size: %dKB, "
1780 "Segment Size: N/A\n", Controller,
1781 1 << (LogicalDeviceInfo->StripeSize - 2));
1782 else
1783 DAC960_Info(" Stripe Size: %dKB, "
1784 "Segment Size: %dKB\n", Controller,
1785 1 << (LogicalDeviceInfo->StripeSize - 2),
1786 1 << (LogicalDeviceInfo->CacheLineSize - 2));
1787 }
1788 DAC960_Info(" %s, %s\n", Controller,
1789 ReadCacheStatus[
1790 LogicalDeviceInfo->LogicalDeviceControl.ReadCache],
1791 WriteCacheStatus[
1792 LogicalDeviceInfo->LogicalDeviceControl.WriteCache]);
1793 if (LogicalDeviceInfo->SoftErrors > 0 ||
1794 LogicalDeviceInfo->CommandsFailed > 0 ||
1795 LogicalDeviceInfo->DeferredWriteErrors)
1796 DAC960_Info(" Errors - Soft: %d, Failed: %d, "
1797 "Deferred Write: %d\n", Controller,
1798 LogicalDeviceInfo->SoftErrors,
1799 LogicalDeviceInfo->CommandsFailed,
1800 LogicalDeviceInfo->DeferredWriteErrors);
1801
1802 }
1803 return true;
1804 }
1805
1806
1807 /*
1808 DAC960_BackMergeFunction is the Back Merge Function for the DAC960 driver.
1809 */
1810
1811 static int DAC960_BackMergeFunction(RequestQueue_T *RequestQueue,
1812 IO_Request_T *Request,
1813 BufferHeader_T *BufferHeader,
1814 int MaxSegments)
1815 {
1816 DAC960_Controller_T *Controller =
1817 (DAC960_Controller_T *) RequestQueue->queuedata;
1818 if (Request->bhtail->b_data + Request->bhtail->b_size == BufferHeader->b_data)
1819 return true;
1820 if (Request->nr_segments < MaxSegments &&
1821 Request->nr_segments < Controller->DriverScatterGatherLimit)
1822 {
1823 Request->nr_segments++;
1824 return true;
1825 }
1826 return false;
1827 }
1828
1829
1830 /*
1831 DAC960_FrontMergeFunction is the Front Merge Function for the DAC960 driver.
1832 */
1833
1834 static int DAC960_FrontMergeFunction(RequestQueue_T *RequestQueue,
1835 IO_Request_T *Request,
1836 BufferHeader_T *BufferHeader,
1837 int MaxSegments)
1838 {
1839 DAC960_Controller_T *Controller =
1840 (DAC960_Controller_T *) RequestQueue->queuedata;
1841 if (BufferHeader->b_data + BufferHeader->b_size == Request->bh->b_data)
1842 return true;
1843 if (Request->nr_segments < MaxSegments &&
1844 Request->nr_segments < Controller->DriverScatterGatherLimit)
1845 {
1846 Request->nr_segments++;
1847 return true;
1848 }
1849 return false;
1850 }
1851
1852
1853 /*
1854 DAC960_MergeRequestsFunction is the Merge Requests Function for the
1855 DAC960 driver.
1856 */
1857
1858 static int DAC960_MergeRequestsFunction(RequestQueue_T *RequestQueue,
1859 IO_Request_T *Request,
1860 IO_Request_T *NextRequest,
1861 int MaxSegments)
1862 {
1863 DAC960_Controller_T *Controller =
1864 (DAC960_Controller_T *) RequestQueue->queuedata;
1865 int TotalSegments = Request->nr_segments + NextRequest->nr_segments;
1866 if (Request->bhtail->b_data + Request->bhtail->b_size
1867 == NextRequest->bh->b_data)
1868 TotalSegments--;
1869 if (TotalSegments > MaxSegments ||
1870 TotalSegments > Controller->DriverScatterGatherLimit)
1871 return false;
1872 Request->nr_segments = TotalSegments;
1873 return true;
1874 }
1875
1876
1877 /*
1878 DAC960_RegisterBlockDevice registers the Block Device structures
1879 associated with Controller.
1880 */
1881
1882 static boolean DAC960_RegisterBlockDevice(DAC960_Controller_T *Controller)
1883 {
1884 int MajorNumber = DAC960_MAJOR + Controller->ControllerNumber;
1885 GenericDiskInfo_T *GenericDiskInfo;
1886 RequestQueue_T *RequestQueue;
1887 int MinorNumber;
1888 /*
1889 Register the Block Device Major Number for this DAC960 Controller.
1890 */
1891 if (devfs_register_blkdev(MajorNumber, "dac960",
1892 &DAC960_BlockDeviceOperations) < 0)
1893 {
1894 DAC960_Error("UNABLE TO ACQUIRE MAJOR NUMBER %d - DETACHING\n",
1895 Controller, MajorNumber);
1896 return false;
1897 }
1898 /*
1899 Initialize the I/O Request Queue.
1900 */
1901 RequestQueue = BLK_DEFAULT_QUEUE(MajorNumber);
1902 blk_init_queue(RequestQueue, DAC960_RequestFunction);
1903 blk_queue_headactive(RequestQueue, 0);
1904 RequestQueue->back_merge_fn = DAC960_BackMergeFunction;
1905 RequestQueue->front_merge_fn = DAC960_FrontMergeFunction;
1906 RequestQueue->merge_requests_fn = DAC960_MergeRequestsFunction;
1907 RequestQueue->queuedata = Controller;
1908 Controller->RequestQueue = RequestQueue;
1909 /*
1910 Initialize the Disk Partitions array, Partition Sizes array, Block Sizes
1911 array, and Max Sectors per Request array.
1912 */
1913 for (MinorNumber = 0; MinorNumber < DAC960_MinorCount; MinorNumber++)
1914 {
1915 Controller->BlockSizes[MinorNumber] = BLOCK_SIZE;
1916 Controller->MaxSectorsPerRequest[MinorNumber] =
1917 Controller->MaxBlocksPerCommand;
1918 }
1919 Controller->GenericDiskInfo.part = Controller->DiskPartitions;
1920 Controller->GenericDiskInfo.sizes = Controller->PartitionSizes;
1921 blksize_size[MajorNumber] = Controller->BlockSizes;
1922 max_sectors[MajorNumber] = Controller->MaxSectorsPerRequest;
1923 /*
1924 Initialize Read Ahead to 128 sectors.
1925 */
1926 read_ahead[MajorNumber] = 128;
1927 /*
1928 Complete initialization of the Generic Disk Information structure.
1929 */
1930 Controller->GenericDiskInfo.major = MajorNumber;
1931 Controller->GenericDiskInfo.major_name = "rd";
1932 Controller->GenericDiskInfo.minor_shift = DAC960_MaxPartitionsBits;
1933 Controller->GenericDiskInfo.max_p = DAC960_MaxPartitions;
1934 Controller->GenericDiskInfo.nr_real = Controller->LogicalDriveCount;
1935 Controller->GenericDiskInfo.next = NULL;
1936 Controller->GenericDiskInfo.fops = &DAC960_BlockDeviceOperations;
1937 /*
1938 Install the Generic Disk Information structure at the end of the list.
1939 */
1940 if ((GenericDiskInfo = gendisk_head) != NULL)
1941 {
1942 while (GenericDiskInfo->next != NULL)
1943 GenericDiskInfo = GenericDiskInfo->next;
1944 GenericDiskInfo->next = &Controller->GenericDiskInfo;
1945 }
1946 else gendisk_head = &Controller->GenericDiskInfo;
1947 /*
1948 Indicate the Block Device Registration completed successfully,
1949 */
1950 return true;
1951 }
1952
1953
1954 /*
1955 DAC960_UnregisterBlockDevice unregisters the Block Device structures
1956 associated with Controller.
1957 */
1958
1959 static void DAC960_UnregisterBlockDevice(DAC960_Controller_T *Controller)
1960 {
1961 int MajorNumber = DAC960_MAJOR + Controller->ControllerNumber;
1962 /*
1963 Unregister the Block Device Major Number for this DAC960 Controller.
1964 */
1965 devfs_unregister_blkdev(MajorNumber, "dac960");
1966 /*
1967 Remove the I/O Request Queue.
1968 */
1969 blk_cleanup_queue(BLK_DEFAULT_QUEUE(MajorNumber));
1970 /*
1971 Remove the Disk Partitions array, Partition Sizes array, Block Sizes
1972 array, Max Sectors per Request array, and Max Segments per Request array.
1973 */
1974 Controller->GenericDiskInfo.part = NULL;
1975 Controller->GenericDiskInfo.sizes = NULL;
1976 blk_size[MajorNumber] = NULL;
1977 blksize_size[MajorNumber] = NULL;
1978 max_sectors[MajorNumber] = NULL;
1979 /*
1980 Remove the Generic Disk Information structure from the list.
1981 */
1982 if (gendisk_head != &Controller->GenericDiskInfo)
1983 {
1984 GenericDiskInfo_T *GenericDiskInfo = gendisk_head;
1985 while (GenericDiskInfo != NULL &&
1986 GenericDiskInfo->next != &Controller->GenericDiskInfo)
1987 GenericDiskInfo = GenericDiskInfo->next;
1988 if (GenericDiskInfo != NULL)
1989 GenericDiskInfo->next = GenericDiskInfo->next->next;
1990 }
1991 else gendisk_head = Controller->GenericDiskInfo.next;
1992 }
1993
1994
1995 /*
1996 DAC960_RegisterDisk registers the DAC960 Logical Disk Device for Logical
1997 Drive Number if it exists.
1998 */
1999
2000 static void DAC960_RegisterDisk(DAC960_Controller_T *Controller,
2001 int LogicalDriveNumber)
2002 {
2003 if (Controller->FirmwareType == DAC960_V1_Controller)
2004 {
2005 if (LogicalDriveNumber > Controller->LogicalDriveCount - 1) return;
2006 register_disk(&Controller->GenericDiskInfo,
2007 DAC960_KernelDevice(Controller->ControllerNumber,
2008 LogicalDriveNumber, 0),
2009 DAC960_MaxPartitions, &DAC960_BlockDeviceOperations,
2010 Controller->V1.LogicalDriveInformation
2011 [LogicalDriveNumber].LogicalDriveSize);
2012 }
2013 else
2014 {
2015 DAC960_V2_LogicalDeviceInfo_T *LogicalDeviceInfo =
2016 Controller->V2.LogicalDeviceInformation[LogicalDriveNumber];
2017 if (LogicalDeviceInfo == NULL) return;
2018 register_disk(&Controller->GenericDiskInfo,
2019 DAC960_KernelDevice(Controller->ControllerNumber,
2020 LogicalDriveNumber, 0),
2021 DAC960_MaxPartitions, &DAC960_BlockDeviceOperations,
2022 LogicalDeviceInfo
2023 ->ConfigurableDeviceSizeIn512ByteBlocksOrMB);
2024 }
2025 }
2026
2027
2028 /*
2029 DAC960_ReportErrorStatus reports Controller BIOS Messages passed through
2030 the Error Status Register when the driver performs the BIOS handshaking.
2031 It returns true for fatal errors and false otherwise.
2032 */
2033
2034 static boolean DAC960_ReportErrorStatus(DAC960_Controller_T *Controller,
2035 unsigned char ErrorStatus,
2036 unsigned char Parameter0,
2037 unsigned char Parameter1)
2038 {
2039 switch (ErrorStatus)
2040 {
2041 case 0x00:
2042 DAC960_Notice("Physical Device %d:%d Not Responding\n",
2043 Controller, Parameter1, Parameter0);
2044 break;
2045 case 0x08:
2046 if (Controller->DriveSpinUpMessageDisplayed) break;
2047 DAC960_Notice("Spinning Up Drives\n", Controller);
2048 Controller->DriveSpinUpMessageDisplayed = true;
2049 break;
2050 case 0x30:
2051 DAC960_Notice("Configuration Checksum Error\n", Controller);
2052 break;
2053 case 0x60:
2054 DAC960_Notice("Mirror Race Recovery Failed\n", Controller);
2055 break;
2056 case 0x70:
2057 DAC960_Notice("Mirror Race Recovery In Progress\n", Controller);
2058 break;
2059 case 0x90:
2060 DAC960_Notice("Physical Device %d:%d COD Mismatch\n",
2061 Controller, Parameter1, Parameter0);
2062 break;
2063 case 0xA0:
2064 DAC960_Notice("Logical Drive Installation Aborted\n", Controller);
2065 break;
2066 case 0xB0:
2067 DAC960_Notice("Mirror Race On A Critical Logical Drive\n", Controller);
2068 break;
2069 case 0xD0:
2070 DAC960_Notice("New Controller Configuration Found\n", Controller);
2071 break;
2072 case 0xF0:
2073 DAC960_Error("Fatal Memory Parity Error for Controller at\n", Controller);
2074 return true;
2075 default:
2076 DAC960_Error("Unknown Initialization Error %02X for Controller at\n",
2077 Controller, ErrorStatus);
2078 return true;
2079 }
2080 return false;
2081 }
2082
2083
2084 /*
2085 DAC960_DetectControllers detects Mylex DAC960/AcceleRAID/eXtremeRAID
2086 PCI RAID Controllers by interrogating the PCI Configuration Space for
2087 Controller Type.
2088 */
2089
2090 static void DAC960_DetectControllers(DAC960_HardwareType_T HardwareType)
2091 {
2092 void (*InterruptHandler)(int, void *, Registers_T *) = NULL;
2093 DAC960_FirmwareType_T FirmwareType = 0;
2094 unsigned short VendorID = 0, DeviceID = 0;
2095 unsigned int MemoryWindowSize = 0;
2096 PCI_Device_T *PCI_Device = NULL;
2097 switch (HardwareType)
2098 {
2099 case DAC960_BA_Controller:
2100 VendorID = PCI_VENDOR_ID_MYLEX;
2101 DeviceID = PCI_DEVICE_ID_MYLEX_DAC960_BA;
2102 FirmwareType = DAC960_V2_Controller;
2103 InterruptHandler = DAC960_BA_InterruptHandler;
2104 MemoryWindowSize = DAC960_BA_RegisterWindowSize;
2105 break;
2106 case DAC960_LP_Controller:
2107 VendorID = PCI_VENDOR_ID_MYLEX;
2108 DeviceID = PCI_DEVICE_ID_MYLEX_DAC960_LP;
2109 FirmwareType = DAC960_LP_Controller;
2110 InterruptHandler = DAC960_LP_InterruptHandler;
2111 MemoryWindowSize = DAC960_LP_RegisterWindowSize;
2112 break;
2113 case DAC960_LA_Controller:
2114 VendorID = PCI_VENDOR_ID_DEC;
2115 DeviceID = PCI_DEVICE_ID_DEC_21285;
2116 FirmwareType = DAC960_V1_Controller;
2117 InterruptHandler = DAC960_LA_InterruptHandler;
2118 MemoryWindowSize = DAC960_LA_RegisterWindowSize;
2119 break;
2120 case DAC960_PG_Controller:
2121 VendorID = PCI_VENDOR_ID_MYLEX;
2122 DeviceID = PCI_DEVICE_ID_MYLEX_DAC960_PG;
2123 FirmwareType = DAC960_V1_Controller;
2124 InterruptHandler = DAC960_PG_InterruptHandler;
2125 MemoryWindowSize = DAC960_PG_RegisterWindowSize;
2126 break;
2127 case DAC960_PD_Controller:
2128 VendorID = PCI_VENDOR_ID_MYLEX;
2129 DeviceID = PCI_DEVICE_ID_MYLEX_DAC960_PD;
2130 FirmwareType = DAC960_V1_Controller;
2131 InterruptHandler = DAC960_PD_InterruptHandler;
2132 MemoryWindowSize = DAC960_PD_RegisterWindowSize;
2133 break;
2134 }
2135 while ((PCI_Device = pci_find_device(VendorID, DeviceID, PCI_Device)) != NULL)
2136 {
2137 DAC960_Controller_T *Controller = NULL;
2138 DAC960_IO_Address_T IO_Address = 0;
2139 DAC960_PCI_Address_T PCI_Address = 0;
2140 unsigned char Bus = PCI_Device->bus->number;
2141 unsigned char DeviceFunction = PCI_Device->devfn;
2142 unsigned char Device = DeviceFunction >> 3;
2143 unsigned char Function = DeviceFunction & 0x7;
2144 unsigned char ErrorStatus, Parameter0, Parameter1;
2145 unsigned int IRQ_Channel = PCI_Device->irq;
2146 void *BaseAddress;
2147 if (pci_enable_device(PCI_Device) != 0) continue;
2148 switch (HardwareType)
2149 {
2150 case DAC960_BA_Controller:
2151 PCI_Address = pci_resource_start(PCI_Device, 0);
2152 break;
2153 case DAC960_LP_Controller:
2154 PCI_Address = pci_resource_start(PCI_Device, 0);
2155 break;
2156 case DAC960_LA_Controller:
2157 if (!(PCI_Device->subsystem_vendor == PCI_VENDOR_ID_MYLEX &&
2158 PCI_Device->subsystem_device == PCI_DEVICE_ID_MYLEX_DAC960_LA))
2159 continue;
2160 PCI_Address = pci_resource_start(PCI_Device, 0);
2161 break;
2162 case DAC960_PG_Controller:
2163 PCI_Address = pci_resource_start(PCI_Device, 0);
2164 break;
2165 case DAC960_PD_Controller:
2166 IO_Address = pci_resource_start(PCI_Device, 0);
2167 PCI_Address = pci_resource_start(PCI_Device, 1);
2168 break;
2169 }
2170 if (DAC960_ControllerCount == DAC960_MaxControllers)
2171 {
2172 DAC960_Error("More than %d DAC960 Controllers detected - "
2173 "ignoring from Controller at\n",
2174 NULL, DAC960_MaxControllers);
2175 goto Failure;
2176 }
2177 Controller = (DAC960_Controller_T *)
2178 kmalloc(sizeof(DAC960_Controller_T), GFP_ATOMIC);
2179 if (Controller == NULL)
2180 {
2181 DAC960_Error("Unable to allocate Controller structure for "
2182 "Controller at\n", NULL);
2183 goto Failure;
2184 }
2185 memset(Controller, 0, sizeof(DAC960_Controller_T));
2186 Controller->ControllerNumber = DAC960_ControllerCount;
2187 init_waitqueue_head(&Controller->CommandWaitQueue);
2188 init_waitqueue_head(&Controller->HealthStatusWaitQueue);
2189 DAC960_Controllers[DAC960_ControllerCount++] = Controller;
2190 DAC960_AnnounceDriver(Controller);
2191 Controller->FirmwareType = FirmwareType;
2192 Controller->HardwareType = HardwareType;
2193 Controller->IO_Address = IO_Address;
2194 Controller->PCI_Address = PCI_Address;
2195 Controller->Bus = Bus;
2196 Controller->Device = Device;
2197 Controller->Function = Function;
2198 /*
2199 Map the Controller Register Window.
2200 */
2201 if (MemoryWindowSize < PAGE_SIZE)
2202 MemoryWindowSize = PAGE_SIZE;
2203 Controller->MemoryMappedAddress =
2204 ioremap_nocache(PCI_Address & PAGE_MASK, MemoryWindowSize);
2205 Controller->BaseAddress =
2206 Controller->MemoryMappedAddress + (PCI_Address & ~PAGE_MASK);
2207 if (Controller->MemoryMappedAddress == NULL)
2208 {
2209 DAC960_Error("Unable to map Controller Register Window for "
2210 "Controller at\n", Controller);
2211 goto Failure;
2212 }
2213 BaseAddress = Controller->BaseAddress;
2214 switch (HardwareType)
2215 {
2216 case DAC960_BA_Controller:
2217 DAC960_BA_DisableInterrupts(Controller->BaseAddress);
2218 DAC960_BA_AcknowledgeHardwareMailboxStatus(BaseAddress);
2219 udelay(1000);
2220 while (DAC960_BA_InitializationInProgressP(BaseAddress))
2221 {
2222 if (DAC960_BA_ReadErrorStatus(BaseAddress, &ErrorStatus,
2223 &Parameter0, &Parameter1) &&
2224 DAC960_ReportErrorStatus(Controller, ErrorStatus,
2225 Parameter0, Parameter1))
2226 goto Failure;
2227 udelay(10);
2228 }
2229 if (!DAC960_V2_EnableMemoryMailboxInterface(Controller))
2230 {
2231 DAC960_Error("Unable to Enable Memory Mailbox Interface "
2232 "for Controller at\n", Controller);
2233 goto Failure;
2234 }
2235 DAC960_BA_EnableInterrupts(Controller->BaseAddress);
2236 Controller->QueueCommand = DAC960_BA_QueueCommand;
2237 Controller->ReadControllerConfiguration =
2238 DAC960_V2_ReadControllerConfiguration;
2239 Controller->ReadDeviceConfiguration =
2240 DAC960_V2_ReadDeviceConfiguration;
2241 Controller->ReportDeviceConfiguration =
2242 DAC960_V2_ReportDeviceConfiguration;
2243 Controller->QueueReadWriteCommand =
2244 DAC960_V2_QueueReadWriteCommand;
2245 break;
2246 case DAC960_LP_Controller:
2247 DAC960_LP_DisableInterrupts(Controller->BaseAddress);
2248 DAC960_LP_AcknowledgeHardwareMailboxStatus(BaseAddress);
2249 udelay(1000);
2250 while (DAC960_LP_InitializationInProgressP(BaseAddress))
2251 {
2252 if (DAC960_LP_ReadErrorStatus(BaseAddress, &ErrorStatus,
2253 &Parameter0, &Parameter1) &&
2254 DAC960_ReportErrorStatus(Controller, ErrorStatus,
2255 Parameter0, Parameter1))
2256 goto Failure;
2257 udelay(10);
2258 }
2259 if (!DAC960_V2_EnableMemoryMailboxInterface(Controller))
2260 {
2261 DAC960_Error("Unable to Enable Memory Mailbox Interface "
2262 "for Controller at\n", Controller);
2263 goto Failure;
2264 }
2265 DAC960_LP_EnableInterrupts(Controller->BaseAddress);
2266 Controller->QueueCommand = DAC960_LP_QueueCommand;
2267 Controller->ReadControllerConfiguration =
2268 DAC960_V2_ReadControllerConfiguration;
2269 Controller->ReadDeviceConfiguration =
2270 DAC960_V2_ReadDeviceConfiguration;
2271 Controller->ReportDeviceConfiguration =
2272 DAC960_V2_ReportDeviceConfiguration;
2273 Controller->QueueReadWriteCommand =
2274 DAC960_V2_QueueReadWriteCommand;
2275 break;
2276 case DAC960_LA_Controller:
2277 DAC960_LA_DisableInterrupts(Controller->BaseAddress);
2278 DAC960_LA_AcknowledgeHardwareMailboxStatus(BaseAddress);
2279 udelay(1000);
2280 while (DAC960_LA_InitializationInProgressP(BaseAddress))
2281 {
2282 if (DAC960_LA_ReadErrorStatus(BaseAddress, &ErrorStatus,
2283 &Parameter0, &Parameter1) &&
2284 DAC960_ReportErrorStatus(Controller, ErrorStatus,
2285 Parameter0, Parameter1))
2286 goto Failure;
2287 udelay(10);
2288 }
2289 if (!DAC960_V1_EnableMemoryMailboxInterface(Controller))
2290 {
2291 DAC960_Error("Unable to Enable Memory Mailbox Interface "
2292 "for Controller at\n", Controller);
2293 goto Failure;
2294 }
2295 DAC960_LA_EnableInterrupts(Controller->BaseAddress);
2296 if (Controller->V1.DualModeMemoryMailboxInterface)
2297 Controller->QueueCommand = DAC960_LA_QueueCommandDualMode;
2298 else Controller->QueueCommand = DAC960_LA_QueueCommandSingleMode;
2299 Controller->ReadControllerConfiguration =
2300 DAC960_V1_ReadControllerConfiguration;
2301 Controller->ReadDeviceConfiguration =
2302 DAC960_V1_ReadDeviceConfiguration;
2303 Controller->ReportDeviceConfiguration =
2304 DAC960_V1_ReportDeviceConfiguration;
2305 Controller->QueueReadWriteCommand =
2306 DAC960_V1_QueueReadWriteCommand;
2307 break;
2308 case DAC960_PG_Controller:
2309 DAC960_PG_DisableInterrupts(Controller->BaseAddress);
2310 DAC960_PG_AcknowledgeHardwareMailboxStatus(BaseAddress);
2311 udelay(1000);
2312 while (DAC960_PG_InitializationInProgressP(BaseAddress))
2313 {
2314 if (DAC960_PG_ReadErrorStatus(BaseAddress, &ErrorStatus,
2315 &Parameter0, &Parameter1) &&
2316 DAC960_ReportErrorStatus(Controller, ErrorStatus,
2317 Parameter0, Parameter1))
2318 goto Failure;
2319 udelay(10);
2320 }
2321 if (!DAC960_V1_EnableMemoryMailboxInterface(Controller))
2322 {
2323 DAC960_Error("Unable to Enable Memory Mailbox Interface "
2324 "for Controller at\n", Controller);
2325 goto Failure;
2326 }
2327 DAC960_PG_EnableInterrupts(Controller->BaseAddress);
2328 if (Controller->V1.DualModeMemoryMailboxInterface)
2329 Controller->QueueCommand = DAC960_PG_QueueCommandDualMode;
2330 else Controller->QueueCommand = DAC960_PG_QueueCommandSingleMode;
2331 Controller->ReadControllerConfiguration =
2332 DAC960_V1_ReadControllerConfiguration;
2333 Controller->ReadDeviceConfiguration =
2334 DAC960_V1_ReadDeviceConfiguration;
2335 Controller->ReportDeviceConfiguration =
2336 DAC960_V1_ReportDeviceConfiguration;
2337 Controller->QueueReadWriteCommand =
2338 DAC960_V1_QueueReadWriteCommand;
2339 break;
2340 case DAC960_PD_Controller:
2341 request_region(Controller->IO_Address, 0x80,
2342 Controller->FullModelName);
2343 DAC960_PD_DisableInterrupts(BaseAddress);
2344 DAC960_PD_AcknowledgeStatus(BaseAddress);
2345 udelay(1000);
2346 while (DAC960_PD_InitializationInProgressP(BaseAddress))
2347 {
2348 if (DAC960_PD_ReadErrorStatus(BaseAddress, &ErrorStatus,
2349 &Parameter0, &Parameter1) &&
2350 DAC960_ReportErrorStatus(Controller, ErrorStatus,
2351 Parameter0, Parameter1))
2352 goto Failure;
2353 udelay(10);
2354 }
2355 DAC960_PD_EnableInterrupts(Controller->BaseAddress);
2356 Controller->QueueCommand = DAC960_PD_QueueCommand;
2357 Controller->ReadControllerConfiguration =
2358 DAC960_V1_ReadControllerConfiguration;
2359 Controller->ReadDeviceConfiguration =
2360 DAC960_V1_ReadDeviceConfiguration;
2361 Controller->ReportDeviceConfiguration =
2362 DAC960_V1_ReportDeviceConfiguration;
2363 Controller->QueueReadWriteCommand =
2364 DAC960_V1_QueueReadWriteCommand;
2365 break;
2366 }
2367 /*
2368 Acquire shared access to the IRQ Channel.
2369 */
2370 if (IRQ_Channel == 0)
2371 {
2372 DAC960_Error("IRQ Channel %d illegal for Controller at\n",
2373 Controller, IRQ_Channel);
2374 goto Failure;
2375 }
2376 strcpy(Controller->FullModelName, "DAC960");
2377 if (request_irq(IRQ_Channel, InterruptHandler, SA_SHIRQ,
2378 Controller->FullModelName, Controller) < 0)
2379 {
2380 DAC960_Error("Unable to acquire IRQ Channel %d for Controller at\n",
2381 Controller, IRQ_Channel);
2382 goto Failure;
2383 }
2384 Controller->IRQ_Channel = IRQ_Channel;
2385 DAC960_ActiveControllerCount++;
2386 Controller->InitialCommand.CommandIdentifier = 1;
2387 Controller->InitialCommand.Controller = Controller;
2388 Controller->Commands[0] = &Controller->InitialCommand;
2389 Controller->FreeCommands = &Controller->InitialCommand;
2390 Controller->ControllerDetectionSuccessful = true;
2391 continue;
2392 Failure:
2393 if (IO_Address == 0)
2394 DAC960_Error("PCI Bus %d Device %d Function %d I/O Address N/A "
2395 "PCI Address 0x%X\n", Controller,
2396 Bus, Device, Function, PCI_Address);
2397 else DAC960_Error("PCI Bus %d Device %d Function %d I/O Address "
2398 "0x%X PCI Address 0x%X\n", Controller,
2399 Bus, Device, Function, IO_Address, PCI_Address);
2400 if (Controller == NULL) break;
2401 if (Controller->MemoryMappedAddress != NULL)
2402 iounmap(Controller->MemoryMappedAddress);
2403 if (Controller->IRQ_Channel > 0)
2404 free_irq(IRQ_Channel, Controller);
2405 }
2406 }
2407
2408
2409 /*
2410 DAC960_SortControllers sorts the Controllers by PCI Bus and Device Number.
2411 */
2412
2413 static void DAC960_SortControllers(void)
2414 {
2415 int ControllerNumber, LastInterchange, Bound, j;
2416 LastInterchange = DAC960_ControllerCount-1;
2417 while (LastInterchange > 0)
2418 {
2419 Bound = LastInterchange;
2420 LastInterchange = 0;
2421 for (j = 0; j < Bound; j++)
2422 {
2423 DAC960_Controller_T *Controller1 = DAC960_Controllers[j];
2424 DAC960_Controller_T *Controller2 = DAC960_Controllers[j+1];
2425 if (Controller1->Bus > Controller2->Bus ||
2426 (Controller1->Bus == Controller2->Bus &&
2427 (Controller1->Device > Controller2->Device)))
2428 {
2429 Controller2->ControllerNumber = j;
2430 DAC960_Controllers[j] = Controller2;
2431 Controller1->ControllerNumber = j+1;
2432 DAC960_Controllers[j+1] = Controller1;
2433 LastInterchange = j;
2434 }
2435 }
2436 }
2437 for (ControllerNumber = 0;
2438 ControllerNumber < DAC960_ControllerCount;
2439 ControllerNumber++)
2440 {
2441 DAC960_Controller_T *Controller = DAC960_Controllers[ControllerNumber];
2442 if (!Controller->ControllerDetectionSuccessful)
2443 {
2444 DAC960_Controllers[ControllerNumber] = NULL;
2445 kfree(Controller);
2446 }
2447 }
2448 }
2449
2450
2451 /*
2452 DAC960_InitializeController initializes Controller.
2453 */
2454
2455 static void DAC960_InitializeController(DAC960_Controller_T *Controller)
2456 {
2457 if (DAC960_ReadControllerConfiguration(Controller) &&
2458 DAC960_ReportControllerConfiguration(Controller) &&
2459 DAC960_CreateAuxiliaryStructures(Controller) &&
2460 DAC960_ReadDeviceConfiguration(Controller) &&
2461 DAC960_ReportDeviceConfiguration(Controller) &&
2462 DAC960_RegisterBlockDevice(Controller))
2463 {
2464 /*
2465 Initialize the Monitoring Timer.
2466 */
2467 init_timer(&Controller->MonitoringTimer);
2468 Controller->MonitoringTimer.expires =
2469 jiffies + DAC960_MonitoringTimerInterval;
2470 Controller->MonitoringTimer.data = (unsigned long) Controller;
2471 Controller->MonitoringTimer.function = DAC960_MonitoringTimerFunction;
2472 add_timer(&Controller->MonitoringTimer);
2473 Controller->ControllerInitialized = true;
2474 }
2475 else DAC960_FinalizeController(Controller);
2476 }
2477
2478
2479 /*
2480 DAC960_FinalizeController finalizes Controller.
2481 */
2482
2483 static void DAC960_FinalizeController(DAC960_Controller_T *Controller)
2484 {
2485 if (Controller->ControllerInitialized)
2486 {
2487 del_timer(&Controller->MonitoringTimer);
2488 if (Controller->FirmwareType == DAC960_V1_Controller)
2489 {
2490 DAC960_Notice("Flushing Cache...", Controller);
2491 DAC960_V1_ExecuteType3(Controller, DAC960_V1_Flush, NULL);
2492 DAC960_Notice("done\n", Controller);
2493 switch (Controller->HardwareType)
2494 {
2495 case DAC960_LA_Controller:
2496 if (Controller->V1.DualModeMemoryMailboxInterface)
2497 free_pages(Controller->MemoryMailboxPagesAddress,
2498 Controller->MemoryMailboxPagesOrder);
2499 else DAC960_LA_SaveMemoryMailboxInfo(Controller);
2500 break;
2501 case DAC960_PG_Controller:
2502 if (Controller->V1.DualModeMemoryMailboxInterface)
2503 free_pages(Controller->MemoryMailboxPagesAddress,
2504 Controller->MemoryMailboxPagesOrder);
2505 else DAC960_PG_SaveMemoryMailboxInfo(Controller);
2506 break;
2507 case DAC960_PD_Controller:
2508 release_region(Controller->IO_Address, 0x80);
2509 break;
2510 default:
2511 break;
2512 }
2513 }
2514 else
2515 {
2516 DAC960_Notice("Flushing Cache...", Controller);
2517 DAC960_V2_DeviceOperation(Controller, DAC960_V2_PauseDevice,
2518 DAC960_V2_RAID_Controller);
2519 DAC960_Notice("done\n", Controller);
2520 free_pages(Controller->MemoryMailboxPagesAddress,
2521 Controller->MemoryMailboxPagesOrder);
2522 }
2523 }
2524 free_irq(Controller->IRQ_Channel, Controller);
2525 iounmap(Controller->MemoryMappedAddress);
2526 DAC960_UnregisterBlockDevice(Controller);
2527 DAC960_DestroyAuxiliaryStructures(Controller);
2528 DAC960_Controllers[Controller->ControllerNumber] = NULL;
2529 kfree(Controller);
2530 }
2531
2532
2533 /*
2534 DAC960_Initialize initializes the DAC960 Driver.
2535 */
2536
2537 void DAC960_Initialize(void)
2538 {
2539 int ControllerNumber;
2540 DAC960_DetectControllers(DAC960_BA_Controller);
2541 DAC960_DetectControllers(DAC960_LP_Controller);
2542 DAC960_DetectControllers(DAC960_LA_Controller);
2543 DAC960_DetectControllers(DAC960_PG_Controller);
2544 DAC960_DetectControllers(DAC960_PD_Controller);
2545 DAC960_SortControllers();
2546 if (DAC960_ActiveControllerCount == 0) return;
2547 for (ControllerNumber = 0;
2548 ControllerNumber < DAC960_ControllerCount;
2549 ControllerNumber++)
2550 {
2551 DAC960_Controller_T *Controller = DAC960_Controllers[ControllerNumber];
2552 int LogicalDriveNumber;
2553 if (Controller == NULL) continue;
2554 DAC960_InitializeController(Controller);
2555 for (LogicalDriveNumber = 0;
2556 LogicalDriveNumber < DAC960_MaxLogicalDrives;
2557 LogicalDriveNumber++)
2558 DAC960_RegisterDisk(Controller, LogicalDriveNumber);
2559 }
2560 DAC960_CreateProcEntries();
2561 register_reboot_notifier(&DAC960_NotifierBlock);
2562 }
2563
2564
2565 /*
2566 DAC960_Finalize finalizes the DAC960 Driver.
2567 */
2568
2569 static int DAC960_Finalize(NotifierBlock_T *NotifierBlock,
2570 unsigned long Event,
2571 void *Buffer)
2572 {
2573 int ControllerNumber;
2574 if (!(Event == SYS_RESTART || Event == SYS_HALT || Event == SYS_POWER_OFF))
2575 return NOTIFY_DONE;
2576 if (DAC960_ActiveControllerCount == 0) return NOTIFY_OK;
2577 for (ControllerNumber = 0;
2578 ControllerNumber < DAC960_ControllerCount;
2579 ControllerNumber++)
2580 if (DAC960_Controllers[ControllerNumber] != NULL)
2581 DAC960_FinalizeController(DAC960_Controllers[ControllerNumber]);
2582 DAC960_DestroyProcEntries();
2583 unregister_reboot_notifier(&DAC960_NotifierBlock);
2584 return NOTIFY_OK;
2585 }
2586
2587
2588 /*
2589 DAC960_V1_QueueReadWriteCommand prepares and queues a Read/Write Command for
2590 DAC960 V1 Firmware Controllers.
2591 */
2592
2593 static void DAC960_V1_QueueReadWriteCommand(DAC960_Command_T *Command)
2594 {
2595 DAC960_Controller_T *Controller = Command->Controller;
2596 DAC960_V1_CommandMailbox_T *CommandMailbox = &Command->V1.CommandMailbox;
2597 DAC960_V1_ClearCommand(Command);
2598 if (Command->SegmentCount == 1)
2599 {
2600 if (Command->CommandType == DAC960_ReadCommand)
2601 CommandMailbox->Type5.CommandOpcode = DAC960_V1_Read;
2602 else CommandMailbox->Type5.CommandOpcode = DAC960_V1_Write;
2603 CommandMailbox->Type5.LD.TransferLength = Command->BlockCount;
2604 CommandMailbox->Type5.LD.LogicalDriveNumber = Command->LogicalDriveNumber;
2605 CommandMailbox->Type5.LogicalBlockAddress = Command->BlockNumber;
2606 CommandMailbox->Type5.BusAddress =
2607 Virtual_to_Bus32(Command->RequestBuffer);
2608 }
2609 else
2610 {
2611 DAC960_V1_ScatterGatherSegment_T
2612 *ScatterGatherList = Command->V1.ScatterGatherList;
2613 BufferHeader_T *BufferHeader = Command->BufferHeader;
2614 char *LastDataEndPointer = NULL;
2615 int SegmentNumber = 0;
2616 if (Command->CommandType == DAC960_ReadCommand)
2617 CommandMailbox->Type5.CommandOpcode =
2618 DAC960_V1_ReadWithOldScatterGather;
2619 else
2620 CommandMailbox->Type5.CommandOpcode =
2621 DAC960_V1_WriteWithOldScatterGather;
2622 CommandMailbox->Type5.LD.TransferLength = Command->BlockCount;
2623 CommandMailbox->Type5.LD.LogicalDriveNumber = Command->LogicalDriveNumber;
2624 CommandMailbox->Type5.LogicalBlockAddress = Command->BlockNumber;
2625 CommandMailbox->Type5.BusAddress = Virtual_to_Bus32(ScatterGatherList);
2626 CommandMailbox->Type5.ScatterGatherCount = Command->SegmentCount;
2627 while (BufferHeader != NULL)
2628 {
2629 if (BufferHeader->b_data == LastDataEndPointer)
2630 {
2631 ScatterGatherList[SegmentNumber-1].SegmentByteCount +=
2632 BufferHeader->b_size;
2633 LastDataEndPointer += BufferHeader->b_size;
2634 }
2635 else
2636 {
2637 ScatterGatherList[SegmentNumber].SegmentDataPointer =
2638 Virtual_to_Bus32(BufferHeader->b_data);
2639 ScatterGatherList[SegmentNumber].SegmentByteCount =
2640 BufferHeader->b_size;
2641 LastDataEndPointer = BufferHeader->b_data + BufferHeader->b_size;
2642 if (SegmentNumber++ > Controller->DriverScatterGatherLimit)
2643 panic("DAC960: Scatter/Gather Segment Overflow\n");
2644 }
2645 BufferHeader = BufferHeader->b_reqnext;
2646 }
2647 if (SegmentNumber != Command->SegmentCount)
2648 panic("DAC960: SegmentNumber != SegmentCount\n");
2649 }
2650 DAC960_QueueCommand(Command);
2651 }
2652
2653
2654 /*
2655 DAC960_V2_QueueReadWriteCommand prepares and queues a Read/Write Command for
2656 DAC960 V2 Firmware Controllers.
2657 */
2658
2659 static void DAC960_V2_QueueReadWriteCommand(DAC960_Command_T *Command)
2660 {
2661 DAC960_Controller_T *Controller = Command->Controller;
2662 DAC960_V2_CommandMailbox_T *CommandMailbox = &Command->V2.CommandMailbox;
2663 DAC960_V2_ClearCommand(Command);
2664 CommandMailbox->SCSI_10.CommandOpcode = DAC960_V2_SCSI_10;
2665 CommandMailbox->SCSI_10.CommandControlBits.DataTransferControllerToHost =
2666 (Command->CommandType == DAC960_ReadCommand);
2667 CommandMailbox->SCSI_10.DataTransferSize =
2668 Command->BlockCount << DAC960_BlockSizeBits;
2669 CommandMailbox->SCSI_10.RequestSenseBusAddress =
2670 Virtual_to_Bus64(&Command->V2.RequestSense);
2671 CommandMailbox->SCSI_10.PhysicalDevice =
2672 Controller->V2.LogicalDriveToVirtualDevice[Command->LogicalDriveNumber];
2673 CommandMailbox->SCSI_10.RequestSenseSize =
2674 sizeof(DAC960_SCSI_RequestSense_T);
2675 CommandMailbox->SCSI_10.CDBLength = 10;
2676 CommandMailbox->SCSI_10.SCSI_CDB[0] =
2677 (Command->CommandType == DAC960_ReadCommand ? 0x28 : 0x2A);
2678 CommandMailbox->SCSI_10.SCSI_CDB[2] = Command->BlockNumber >> 24;
2679 CommandMailbox->SCSI_10.SCSI_CDB[3] = Command->BlockNumber >> 16;
2680 CommandMailbox->SCSI_10.SCSI_CDB[4] = Command->BlockNumber >> 8;
2681 CommandMailbox->SCSI_10.SCSI_CDB[5] = Command->BlockNumber;
2682 CommandMailbox->SCSI_10.SCSI_CDB[7] = Command->BlockCount >> 8;
2683 CommandMailbox->SCSI_10.SCSI_CDB[8] = Command->BlockCount;
2684 if (Command->SegmentCount == 1)
2685 {
2686 CommandMailbox->SCSI_10.DataTransferMemoryAddress
2687 .ScatterGatherSegments[0]
2688 .SegmentDataPointer =
2689 Virtual_to_Bus64(Command->RequestBuffer);
2690 CommandMailbox->SCSI_10.DataTransferMemoryAddress
2691 .ScatterGatherSegments[0]
2692 .SegmentByteCount =
2693 CommandMailbox->SCSI_10.DataTransferSize;
2694 }
2695 else
2696 {
2697 DAC960_V2_ScatterGatherSegment_T
2698 *ScatterGatherList = Command->V2.ScatterGatherList;
2699 BufferHeader_T *BufferHeader = Command->BufferHeader;
2700 char *LastDataEndPointer = NULL;
2701 int SegmentNumber = 0;
2702 if (Command->SegmentCount > 2)
2703 {
2704 CommandMailbox->SCSI_10.CommandControlBits
2705 .AdditionalScatterGatherListMemory = true;
2706 CommandMailbox->SCSI_10.DataTransferMemoryAddress
2707 .ExtendedScatterGather.ScatterGatherList0Length =
2708 Command->SegmentCount;
2709 CommandMailbox->SCSI_10.DataTransferMemoryAddress
2710 .ExtendedScatterGather.ScatterGatherList0Address =
2711 Virtual_to_Bus64(ScatterGatherList);
2712 }
2713 else
2714 ScatterGatherList =
2715 CommandMailbox->SCSI_10.DataTransferMemoryAddress
2716 .ScatterGatherSegments;
2717 while (BufferHeader != NULL)
2718 {
2719 if (BufferHeader->b_data == LastDataEndPointer)
2720 {
2721 ScatterGatherList[SegmentNumber-1].SegmentByteCount +=
2722 BufferHeader->b_size;
2723 LastDataEndPointer += BufferHeader->b_size;
2724 }
2725 else
2726 {
2727 ScatterGatherList[SegmentNumber].SegmentDataPointer =
2728 Virtual_to_Bus64(BufferHeader->b_data);
2729 ScatterGatherList[SegmentNumber].SegmentByteCount =
2730 BufferHeader->b_size;
2731 LastDataEndPointer = BufferHeader->b_data + BufferHeader->b_size;
2732 if (SegmentNumber++ > Controller->DriverScatterGatherLimit)
2733 panic("DAC960: Scatter/Gather Segment Overflow\n");
2734 }
2735 BufferHeader = BufferHeader->b_reqnext;
2736 }
2737 if (SegmentNumber != Command->SegmentCount)
2738 panic("DAC960: SegmentNumber != SegmentCount\n");
2739 }
2740 DAC960_QueueCommand(Command);
2741 }
2742
2743
2744 /*
2745 DAC960_ProcessRequest attempts to remove one I/O Request from Controller's
2746 I/O Request Queue and queues it to the Controller. WaitForCommand is true if
2747 this function should wait for a Command to become available if necessary.
2748 This function returns true if an I/O Request was queued and false otherwise.
2749 */
2750
2751 static boolean DAC960_ProcessRequest(DAC960_Controller_T *Controller,
2752 boolean WaitForCommand)
2753 {
2754 RequestQueue_T *RequestQueue = Controller->RequestQueue;
2755 ListHead_T *RequestQueueHead;
2756 IO_Request_T *Request;
2757 DAC960_Command_T *Command;
2758 if (RequestQueue == NULL) return false;
2759 RequestQueueHead = &RequestQueue->queue_head;
2760 while (true)
2761 {
2762 if (list_empty(RequestQueueHead)) return false;
2763 Request = blkdev_entry_next_request(RequestQueueHead);
2764 Command = DAC960_AllocateCommand(Controller);
2765 if (Command != NULL) break;
2766 if (!WaitForCommand) return false;
2767 DAC960_WaitForCommand(Controller);
2768 }
2769 if (Request->cmd == READ)
2770 Command->CommandType = DAC960_ReadCommand;
2771 else Command->CommandType = DAC960_WriteCommand;
2772 Command->Completion = Request->waiting;
2773 Command->LogicalDriveNumber = DAC960_LogicalDriveNumber(Request->rq_dev);
2774 Command->BlockNumber =
2775 Request->sector
2776 + Controller->GenericDiskInfo.part[MINOR(Request->rq_dev)].start_sect;
2777 Command->BlockCount = Request->nr_sectors;
2778 Command->SegmentCount = Request->nr_segments;
2779 Command->BufferHeader = Request->bh;
2780 Command->RequestBuffer = Request->buffer;
2781 blkdev_dequeue_request(Request);
2782 blkdev_release_request(Request);
2783 DAC960_QueueReadWriteCommand(Command);
2784 return true;
2785 }
2786
2787
2788 /*
2789 DAC960_ProcessRequests attempts to remove as many I/O Requests as possible
2790 from Controller's I/O Request Queue and queue them to the Controller.
2791 */
2792
2793 static inline void DAC960_ProcessRequests(DAC960_Controller_T *Controller)
2794 {
2795 int Counter = 0;
2796 while (DAC960_ProcessRequest(Controller, Counter++ == 0)) ;
2797 }
2798
2799
2800 /*
2801 DAC960_RequestFunction is the I/O Request Function for DAC960 Controllers.
2802 */
2803
2804 static void DAC960_RequestFunction(RequestQueue_T *RequestQueue)
2805 {
2806 DAC960_Controller_T *Controller =
2807 (DAC960_Controller_T *) RequestQueue->queuedata;
2808 ProcessorFlags_T ProcessorFlags;
2809 /*
2810 Acquire exclusive access to Controller.
2811 */
2812 DAC960_AcquireControllerLockRF(Controller, &ProcessorFlags);
2813 /*
2814 Process I/O Requests for Controller.
2815 */
2816 DAC960_ProcessRequests(Controller);
2817 /*
2818 Release exclusive access to Controller.
2819 */
2820 DAC960_ReleaseControllerLockRF(Controller, &ProcessorFlags);
2821 }
2822
2823
2824 /*
2825 DAC960_ProcessCompletedBuffer performs completion processing for an
2826 individual Buffer.
2827 */
2828
2829 static inline void DAC960_ProcessCompletedBuffer(BufferHeader_T *BufferHeader,
2830 boolean SuccessfulIO)
2831 {
2832 blk_finished_io(BufferHeader->b_size >> 9);
2833 BufferHeader->b_end_io(BufferHeader, SuccessfulIO);
2834 }
2835
2836
2837 /*
2838 DAC960_V1_ReadWriteError prints an appropriate error message for Command
2839 when an error occurs on a Read or Write operation.
2840 */
2841
2842 static void DAC960_V1_ReadWriteError(DAC960_Command_T *Command)
2843 {
2844 DAC960_Controller_T *Controller = Command->Controller;
2845 unsigned char *CommandName = "UNKNOWN";
2846 switch (Command->CommandType)
2847 {
2848 case DAC960_ReadCommand:
2849 case DAC960_ReadRetryCommand:
2850 CommandName = "READ";
2851 break;
2852 case DAC960_WriteCommand:
2853 case DAC960_WriteRetryCommand:
2854 CommandName = "WRITE";
2855 break;
2856 case DAC960_MonitoringCommand:
2857 case DAC960_ImmediateCommand:
2858 case DAC960_QueuedCommand:
2859 break;
2860 }
2861 switch (Command->V1.CommandStatus)
2862 {
2863 case DAC960_V1_IrrecoverableDataError:
2864 DAC960_Error("Irrecoverable Data Error on %s:\n",
2865 Controller, CommandName);
2866 break;
2867 case DAC960_V1_LogicalDriveNonexistentOrOffline:
2868 DAC960_Error("Logical Drive Nonexistent or Offline on %s:\n",
2869 Controller, CommandName);
2870 break;
2871 case DAC960_V1_AccessBeyondEndOfLogicalDrive:
2872 DAC960_Error("Attempt to Access Beyond End of Logical Drive "
2873 "on %s:\n", Controller, CommandName);
2874 break;
2875 case DAC960_V1_BadDataEncountered:
2876 DAC960_Error("Bad Data Encountered on %s:\n", Controller, CommandName);
2877 break;
2878 default:
2879 DAC960_Error("Unexpected Error Status %04X on %s:\n",
2880 Controller, Command->V1.CommandStatus, CommandName);
2881 break;
2882 }
2883 DAC960_Error(" /dev/rd/c%dd%d: absolute blocks %d..%d\n",
2884 Controller, Controller->ControllerNumber,
2885 Command->LogicalDriveNumber, Command->BlockNumber,
2886 Command->BlockNumber + Command->BlockCount - 1);
2887 if (DAC960_PartitionNumber(Command->BufferHeader->b_rdev) > 0)
2888 DAC960_Error(" /dev/rd/c%dd%dp%d: relative blocks %d..%d\n",
2889 Controller, Controller->ControllerNumber,
2890 Command->LogicalDriveNumber,
2891 DAC960_PartitionNumber(Command->BufferHeader->b_rdev),
2892 Command->BufferHeader->b_rsector,
2893 Command->BufferHeader->b_rsector + Command->BlockCount - 1);
2894 }
2895
2896
2897 /*
2898 DAC960_V1_ProcessCompletedCommand performs completion processing for Command
2899 for DAC960 V1 Firmware Controllers.
2900 */
2901
2902 static void DAC960_V1_ProcessCompletedCommand(DAC960_Command_T *Command)
2903 {
2904 DAC960_Controller_T *Controller = Command->Controller;
2905 DAC960_CommandType_T CommandType = Command->CommandType;
2906 DAC960_V1_CommandOpcode_T CommandOpcode =
2907 Command->V1.CommandMailbox.Common.CommandOpcode;
2908 DAC960_V1_CommandStatus_T CommandStatus = Command->V1.CommandStatus;
2909 BufferHeader_T *BufferHeader = Command->BufferHeader;
2910 if (CommandType == DAC960_ReadCommand ||
2911 CommandType == DAC960_WriteCommand)
2912 {
2913 if (CommandStatus == DAC960_V1_NormalCompletion)
2914 {
2915 /*
2916 Perform completion processing for all buffers in this I/O Request.
2917 */
2918 while (BufferHeader != NULL)
2919 {
2920 BufferHeader_T *NextBufferHeader = BufferHeader->b_reqnext;
2921 BufferHeader->b_reqnext = NULL;
2922 DAC960_ProcessCompletedBuffer(BufferHeader, true);
2923 BufferHeader = NextBufferHeader;
2924 }
2925 if (Command->Completion != NULL)
2926 {
2927 complete(Command->Completion);
2928 Command->Completion = NULL;
2929 }
2930 add_blkdev_randomness(DAC960_MAJOR + Controller->ControllerNumber);
2931 }
2932 else if ((CommandStatus == DAC960_V1_IrrecoverableDataError ||
2933 CommandStatus == DAC960_V1_BadDataEncountered) &&
2934 BufferHeader != NULL &&
2935 BufferHeader->b_reqnext != NULL)
2936 {
2937 DAC960_V1_CommandMailbox_T *CommandMailbox =
2938 &Command->V1.CommandMailbox;
2939 if (CommandType == DAC960_ReadCommand)
2940 {
2941 Command->CommandType = DAC960_ReadRetryCommand;
2942 CommandMailbox->Type5.CommandOpcode = DAC960_V1_Read;
2943 }
2944 else
2945 {
2946 Command->CommandType = DAC960_WriteRetryCommand;
2947 CommandMailbox->Type5.CommandOpcode = DAC960_V1_Write;
2948 }
2949 Command->BlockCount = BufferHeader->b_size >> DAC960_BlockSizeBits;
2950 CommandMailbox->Type5.LD.TransferLength = Command->BlockCount;
2951 CommandMailbox->Type5.BusAddress =
2952 Virtual_to_Bus32(BufferHeader->b_data);
2953 DAC960_QueueCommand(Command);
2954 return;
2955 }
2956 else
2957 {
2958 if (CommandStatus != DAC960_V1_LogicalDriveNonexistentOrOffline)
2959 DAC960_V1_ReadWriteError(Command);
2960 /*
2961 Perform completion processing for all buffers in this I/O Request.
2962 */
2963 while (BufferHeader != NULL)
2964 {
2965 BufferHeader_T *NextBufferHeader = BufferHeader->b_reqnext;
2966 BufferHeader->b_reqnext = NULL;
2967 DAC960_ProcessCompletedBuffer(BufferHeader, false);
2968 BufferHeader = NextBufferHeader;
2969 }
2970 if (Command->Completion != NULL)
2971 {
2972 complete(Command->Completion);
2973 Command->Completion = NULL;
2974 }
2975 }
2976 }
2977 else if (CommandType == DAC960_ReadRetryCommand ||
2978 CommandType == DAC960_WriteRetryCommand)
2979 {
2980 BufferHeader_T *NextBufferHeader = BufferHeader->b_reqnext;
2981 BufferHeader->b_reqnext = NULL;
2982 /*
2983 Perform completion processing for this single buffer.
2984 */
2985 if (CommandStatus == DAC960_V1_NormalCompletion)
2986 DAC960_ProcessCompletedBuffer(BufferHeader, true);
2987 else
2988 {
2989 if (CommandStatus != DAC960_V1_LogicalDriveNonexistentOrOffline)
2990 DAC960_V1_ReadWriteError(Command);
2991 DAC960_ProcessCompletedBuffer(BufferHeader, false);
2992 }
2993 if (NextBufferHeader != NULL)
2994 {
2995 DAC960_V1_CommandMailbox_T *CommandMailbox =
2996 &Command->V1.CommandMailbox;
2997 Command->BlockNumber +=
2998 BufferHeader->b_size >> DAC960_BlockSizeBits;
2999 Command->BlockCount =
3000 NextBufferHeader->b_size >> DAC960_BlockSizeBits;
3001 Command->BufferHeader = NextBufferHeader;
3002 CommandMailbox->Type5.LD.TransferLength = Command->BlockCount;
3003 CommandMailbox->Type5.LogicalBlockAddress = Command->BlockNumber;
3004 CommandMailbox->Type5.BusAddress =
3005 Virtual_to_Bus32(NextBufferHeader->b_data);
3006 DAC960_QueueCommand(Command);
3007 return;
3008 }
3009 }
3010 else if (CommandType == DAC960_MonitoringCommand ||
3011 CommandOpcode == DAC960_V1_Enquiry ||
3012 CommandOpcode == DAC960_V1_GetRebuildProgress)
3013 {
3014 if (CommandType != DAC960_MonitoringCommand)
3015 {
3016 if (CommandOpcode == DAC960_V1_Enquiry)
3017 memcpy(&Controller->V1.NewEnquiry,
3018 Bus32_to_Virtual(Command->V1.CommandMailbox
3019 .Type3.BusAddress),
3020 sizeof(DAC960_V1_Enquiry_T));
3021 else if (CommandOpcode == DAC960_V1_GetRebuildProgress)
3022 memcpy(&Controller->V1.RebuildProgress,
3023 Bus32_to_Virtual(Command->V1.CommandMailbox
3024 .Type3.BusAddress),
3025 sizeof(DAC960_V1_RebuildProgress_T));
3026 }
3027 if (CommandOpcode == DAC960_V1_Enquiry &&
3028 Controller->ControllerInitialized)
3029 {
3030 DAC960_V1_Enquiry_T *OldEnquiry = &Controller->V1.Enquiry;
3031 DAC960_V1_Enquiry_T *NewEnquiry = &Controller->V1.NewEnquiry;
3032 unsigned int OldCriticalLogicalDriveCount =
3033 OldEnquiry->CriticalLogicalDriveCount;
3034 unsigned int NewCriticalLogicalDriveCount =
3035 NewEnquiry->CriticalLogicalDriveCount;
3036 if (NewEnquiry->NumberOfLogicalDrives > Controller->LogicalDriveCount)
3037 {
3038 int LogicalDriveNumber = Controller->LogicalDriveCount - 1;
3039 while (++LogicalDriveNumber < NewEnquiry->NumberOfLogicalDrives)
3040 DAC960_Critical("Logical Drive %d (/dev/rd/c%dd%d) "
3041 "Now Exists\n", Controller,
3042 LogicalDriveNumber,
3043 Controller->ControllerNumber,
3044 LogicalDriveNumber);
3045 }
3046 if (NewEnquiry->NumberOfLogicalDrives < Controller->LogicalDriveCount)
3047 {
3048 int LogicalDriveNumber = NewEnquiry->NumberOfLogicalDrives - 1;
3049 while (++LogicalDriveNumber < Controller->LogicalDriveCount)
3050 DAC960_Critical("Logical Drive %d (/dev/rd/c%dd%d) "
3051 "No Longer Exists\n", Controller,
3052 LogicalDriveNumber,
3053 Controller->ControllerNumber,
3054 LogicalDriveNumber);
3055 }
3056 Controller->LogicalDriveCount = NewEnquiry->NumberOfLogicalDrives;
3057 if (NewEnquiry->StatusFlags.DeferredWriteError !=
3058 OldEnquiry->StatusFlags.DeferredWriteError)
3059 DAC960_Critical("Deferred Write Error Flag is now %s\n", Controller,
3060 (NewEnquiry->StatusFlags.DeferredWriteError
3061 ? "TRUE" : "FALSE"));
3062 if ((NewCriticalLogicalDriveCount > 0 ||
3063 NewCriticalLogicalDriveCount != OldCriticalLogicalDriveCount) ||
3064 (NewEnquiry->OfflineLogicalDriveCount > 0 ||
3065 NewEnquiry->OfflineLogicalDriveCount !=
3066 OldEnquiry->OfflineLogicalDriveCount) ||
3067 (NewEnquiry->DeadDriveCount > 0 ||
3068 NewEnquiry->DeadDriveCount !=
3069 OldEnquiry->DeadDriveCount) ||
3070 (NewEnquiry->EventLogSequenceNumber !=
3071 OldEnquiry->EventLogSequenceNumber) ||
3072 Controller->MonitoringTimerCount == 0 ||
3073 (jiffies - Controller->SecondaryMonitoringTime
3074 >= DAC960_SecondaryMonitoringInterval))
3075 {
3076 Controller->V1.NeedLogicalDriveInformation = true;
3077 Controller->V1.NewEventLogSequenceNumber =
3078 NewEnquiry->EventLogSequenceNumber;
3079 Controller->V1.NeedErrorTableInformation = true;
3080 Controller->V1.NeedDeviceStateInformation = true;
3081 Controller->V1.StartDeviceStateScan = true;
3082 Controller->SecondaryMonitoringTime = jiffies;
3083 }
3084 if (NewEnquiry->RebuildFlag == DAC960_V1_StandbyRebuildInProgress ||
3085 NewEnquiry->RebuildFlag
3086 == DAC960_V1_BackgroundRebuildInProgress ||
3087 OldEnquiry->RebuildFlag == DAC960_V1_StandbyRebuildInProgress ||
3088 OldEnquiry->RebuildFlag == DAC960_V1_BackgroundRebuildInProgress)
3089 {
3090 Controller->V1.NeedRebuildProgress = true;
3091 Controller->V1.RebuildProgressFirst =
3092 (NewEnquiry->CriticalLogicalDriveCount <
3093 OldEnquiry->CriticalLogicalDriveCount);
3094 }
3095 if (OldEnquiry->RebuildFlag == DAC960_V1_BackgroundCheckInProgress)
3096 switch (NewEnquiry->RebuildFlag)
3097 {
3098 case DAC960_V1_NoStandbyRebuildOrCheckInProgress:
3099 DAC960_Progress("Consistency Check Completed Successfully\n",
3100 Controller);
3101 break;
3102 case DAC960_V1_StandbyRebuildInProgress:
3103 case DAC960_V1_BackgroundRebuildInProgress:
3104 break;
3105 case DAC960_V1_BackgroundCheckInProgress:
3106 Controller->V1.NeedConsistencyCheckProgress = true;
3107 break;
3108 case DAC960_V1_StandbyRebuildCompletedWithError:
3109 DAC960_Progress("Consistency Check Completed with Error\n",
3110 Controller);
3111 break;
3112 case DAC960_V1_BackgroundRebuildOrCheckFailed_DriveFailed:
3113 DAC960_Progress("Consistency Check Failed - "
3114 "Physical Device Failed\n", Controller);
3115 break;
3116 case DAC960_V1_BackgroundRebuildOrCheckFailed_LogicalDriveFailed:
3117 DAC960_Progress("Consistency Check Failed - "
3118 "Logical Drive Failed\n", Controller);
3119 break;
3120 case DAC960_V1_BackgroundRebuildOrCheckFailed_OtherCauses:
3121 DAC960_Progress("Consistency Check Failed - Other Causes\n",
3122 Controller);
3123 break;
3124 case DAC960_V1_BackgroundRebuildOrCheckSuccessfullyTerminated:
3125 DAC960_Progress("Consistency Check Successfully Terminated\n",
3126 Controller);
3127 break;
3128 }
3129 else if (NewEnquiry->RebuildFlag
3130 == DAC960_V1_BackgroundCheckInProgress)
3131 Controller->V1.NeedConsistencyCheckProgress = true;
3132 Controller->MonitoringAlertMode =
3133 (NewEnquiry->CriticalLogicalDriveCount > 0 ||
3134 NewEnquiry->OfflineLogicalDriveCount > 0 ||
3135 NewEnquiry->DeadDriveCount > 0);
3136 if (CommandType != DAC960_MonitoringCommand &&
3137 Controller->V1.RebuildFlagPending)
3138 {
3139 DAC960_V1_Enquiry_T *Enquiry = (DAC960_V1_Enquiry_T *)
3140 Bus32_to_Virtual(Command->V1.CommandMailbox.Type3.BusAddress);
3141 Enquiry->RebuildFlag = Controller->V1.PendingRebuildFlag;
3142 Controller->V1.RebuildFlagPending = false;
3143 }
3144 else if (CommandType == DAC960_MonitoringCommand &&
3145 NewEnquiry->RebuildFlag >
3146 DAC960_V1_BackgroundCheckInProgress)
3147 {
3148 Controller->V1.PendingRebuildFlag = NewEnquiry->RebuildFlag;
3149 Controller->V1.RebuildFlagPending = true;
3150 }
3151 memcpy(&Controller->V1.Enquiry, &Controller->V1.NewEnquiry,
3152 sizeof(DAC960_V1_Enquiry_T));
3153 }
3154 else if (CommandOpcode == DAC960_V1_PerformEventLogOperation)
3155 {
3156 static char
3157 *DAC960_EventMessages[] =
3158 { "killed because write recovery failed",
3159 "killed because of SCSI bus reset failure",
3160 "killed because of double check condition",
3161 "killed because it was removed",
3162 "killed because of gross error on SCSI chip",
3163 "killed because of bad tag returned from drive",
3164 "killed because of timeout on SCSI command",
3165 "killed because of reset SCSI command issued from system",
3166 "killed because busy or parity error count exceeded limit",
3167 "killed because of 'kill drive' command from system",
3168 "killed because of selection timeout",
3169 "killed due to SCSI phase sequence error",
3170 "killed due to unknown status" };
3171 DAC960_V1_EventLogEntry_T *EventLogEntry =
3172 &Controller->V1.EventLogEntry;
3173 if (EventLogEntry->SequenceNumber ==
3174 Controller->V1.OldEventLogSequenceNumber)
3175 {
3176 unsigned char SenseKey = EventLogEntry->SenseKey;
3177 unsigned char AdditionalSenseCode =
3178 EventLogEntry->AdditionalSenseCode;
3179 unsigned char AdditionalSenseCodeQualifier =
3180 EventLogEntry->AdditionalSenseCodeQualifier;
3181 if (SenseKey == DAC960_SenseKey_VendorSpecific &&
3182 AdditionalSenseCode == 0x80 &&
3183 AdditionalSenseCodeQualifier <
3184 sizeof(DAC960_EventMessages) / sizeof(char *))
3185 DAC960_Critical("Physical Device %d:%d %s\n", Controller,
3186 EventLogEntry->Channel,
3187 EventLogEntry->TargetID,
3188 DAC960_EventMessages[
3189 AdditionalSenseCodeQualifier]);
3190 else if (SenseKey == DAC960_SenseKey_UnitAttention &&
3191 AdditionalSenseCode == 0x29)
3192 {
3193 if (Controller->MonitoringTimerCount > 0)
3194 Controller->V1.DeviceResetCount[EventLogEntry->Channel]
3195 [EventLogEntry->TargetID]++;
3196 }
3197 else if (!(SenseKey == DAC960_SenseKey_NoSense ||
3198 (SenseKey == DAC960_SenseKey_NotReady &&
3199 AdditionalSenseCode == 0x04 &&
3200 (AdditionalSenseCodeQualifier == 0x01 ||
3201 AdditionalSenseCodeQualifier == 0x02))))
3202 {
3203 DAC960_Critical("Physical Device %d:%d Error Log: "
3204 "Sense Key = %d, ASC = %02X, ASCQ = %02X\n",
3205 Controller,
3206 EventLogEntry->Channel,
3207 EventLogEntry->TargetID,
3208 SenseKey,
3209 AdditionalSenseCode,
3210 AdditionalSenseCodeQualifier);
3211 DAC960_Critical("Physical Device %d:%d Error Log: "
3212 "Information = %02X%02X%02X%02X "
3213 "%02X%02X%02X%02X\n",
3214 Controller,
3215 EventLogEntry->Channel,
3216 EventLogEntry->TargetID,
3217 EventLogEntry->Information[0],
3218 EventLogEntry->Information[1],
3219 EventLogEntry->Information[2],
3220 EventLogEntry->Information[3],
3221 EventLogEntry->CommandSpecificInformation[0],
3222 EventLogEntry->CommandSpecificInformation[1],
3223 EventLogEntry->CommandSpecificInformation[2],
3224 EventLogEntry->CommandSpecificInformation[3]);
3225 }
3226 }
3227 Controller->V1.OldEventLogSequenceNumber++;
3228 }
3229 else if (CommandOpcode == DAC960_V1_GetErrorTable)
3230 {
3231 DAC960_V1_ErrorTable_T *OldErrorTable = &Controller->V1.ErrorTable;
3232 DAC960_V1_ErrorTable_T *NewErrorTable = &Controller->V1.NewErrorTable;
3233 int Channel, TargetID;
3234 for (Channel = 0; Channel < Controller->Channels; Channel++)
3235 for (TargetID = 0; TargetID < Controller->Targets; TargetID++)
3236 {
3237 DAC960_V1_ErrorTableEntry_T *NewErrorEntry =
3238 &NewErrorTable->ErrorTableEntries[Channel][TargetID];
3239 DAC960_V1_ErrorTableEntry_T *OldErrorEntry =
3240 &OldErrorTable->ErrorTableEntries[Channel][TargetID];
3241 if ((NewErrorEntry->ParityErrorCount !=
3242 OldErrorEntry->ParityErrorCount) ||
3243 (NewErrorEntry->SoftErrorCount !=
3244 OldErrorEntry->SoftErrorCount) ||
3245 (NewErrorEntry->HardErrorCount !=
3246 OldErrorEntry->HardErrorCount) ||
3247 (NewErrorEntry->MiscErrorCount !=
3248 OldErrorEntry->MiscErrorCount))
3249 DAC960_Critical("Physical Device %d:%d Errors: "
3250 "Parity = %d, Soft = %d, "
3251 "Hard = %d, Misc = %d\n",
3252 Controller, Channel, TargetID,
3253 NewErrorEntry->ParityErrorCount,
3254 NewErrorEntry->SoftErrorCount,
3255 NewErrorEntry->HardErrorCount,
3256 NewErrorEntry->MiscErrorCount);
3257 }
3258 memcpy(&Controller->V1.ErrorTable, &Controller->V1.NewErrorTable,
3259 sizeof(DAC960_V1_ErrorTable_T));
3260 }
3261 else if (CommandOpcode == DAC960_V1_GetDeviceState)
3262 {
3263 DAC960_V1_DeviceState_T *OldDeviceState =
3264 &Controller->V1.DeviceState[Controller->V1.DeviceStateChannel]
3265 [Controller->V1.DeviceStateTargetID];
3266 DAC960_V1_DeviceState_T *NewDeviceState =
3267 &Controller->V1.NewDeviceState;
3268 if (NewDeviceState->DeviceState != OldDeviceState->DeviceState)
3269 DAC960_Critical("Physical Device %d:%d is now %s\n", Controller,
3270 Controller->V1.DeviceStateChannel,
3271 Controller->V1.DeviceStateTargetID,
3272 (NewDeviceState->DeviceState
3273 == DAC960_V1_Device_Dead
3274 ? "DEAD"
3275 : NewDeviceState->DeviceState
3276 == DAC960_V1_Device_WriteOnly
3277 ? "WRITE-ONLY"
3278 : NewDeviceState->DeviceState
3279 == DAC960_V1_Device_Online
3280 ? "ONLINE" : "STANDBY"));
3281 if (OldDeviceState->DeviceState == DAC960_V1_Device_Dead &&
3282 NewDeviceState->DeviceState != DAC960_V1_Device_Dead)
3283 {
3284 Controller->V1.NeedDeviceInquiryInformation = true;
3285 Controller->V1.NeedDeviceSerialNumberInformation = true;
3286 Controller->V1.DeviceResetCount
3287 [Controller->V1.DeviceStateChannel]
3288 [Controller->V1.DeviceStateTargetID] = 0;
3289 }
3290 memcpy(OldDeviceState, NewDeviceState,
3291 sizeof(DAC960_V1_DeviceState_T));
3292 }
3293 else if (CommandOpcode == DAC960_V1_GetLogicalDriveInformation)
3294 {
3295 int LogicalDriveNumber;
3296 for (LogicalDriveNumber = 0;
3297 LogicalDriveNumber < Controller->LogicalDriveCount;
3298 LogicalDriveNumber++)
3299 {
3300 DAC960_V1_LogicalDriveInformation_T *OldLogicalDriveInformation =
3301 &Controller->V1.LogicalDriveInformation[LogicalDriveNumber];
3302 DAC960_V1_LogicalDriveInformation_T *NewLogicalDriveInformation =
3303 &Controller->V1.NewLogicalDriveInformation[LogicalDriveNumber];
3304 if (NewLogicalDriveInformation->LogicalDriveState !=
3305 OldLogicalDriveInformation->LogicalDriveState)
3306 DAC960_Critical("Logical Drive %d (/dev/rd/c%dd%d) "
3307 "is now %s\n", Controller,
3308 LogicalDriveNumber,
3309 Controller->ControllerNumber,
3310 LogicalDriveNumber,
3311 (NewLogicalDriveInformation->LogicalDriveState
3312 == DAC960_V1_LogicalDrive_Online
3313 ? "ONLINE"
3314 : NewLogicalDriveInformation->LogicalDriveState
3315 == DAC960_V1_LogicalDrive_Critical
3316 ? "CRITICAL" : "OFFLINE"));
3317 if (NewLogicalDriveInformation->WriteBack !=
3318 OldLogicalDriveInformation->WriteBack)
3319 DAC960_Critical("Logical Drive %d (/dev/rd/c%dd%d) "
3320 "is now %s\n", Controller,
3321 LogicalDriveNumber,
3322 Controller->ControllerNumber,
3323 LogicalDriveNumber,
3324 (NewLogicalDriveInformation->WriteBack
3325 ? "WRITE BACK" : "WRITE THRU"));
3326 }
3327 memcpy(&Controller->V1.LogicalDriveInformation,
3328 &Controller->V1.NewLogicalDriveInformation,
3329 sizeof(DAC960_V1_LogicalDriveInformationArray_T));
3330 }
3331 else if (CommandOpcode == DAC960_V1_GetRebuildProgress)
3332 {
3333 unsigned int LogicalDriveNumber =
3334 Controller->V1.RebuildProgress.LogicalDriveNumber;
3335 unsigned int LogicalDriveSize =
3336 Controller->V1.RebuildProgress.LogicalDriveSize;
3337 unsigned int BlocksCompleted =
3338 LogicalDriveSize - Controller->V1.RebuildProgress.RemainingBlocks;
3339 if (CommandStatus == DAC960_V1_NoRebuildOrCheckInProgress &&
3340 Controller->V1.LastRebuildStatus == DAC960_V1_NormalCompletion)
3341 CommandStatus = DAC960_V1_RebuildSuccessful;
3342 switch (CommandStatus)
3343 {
3344 case DAC960_V1_NormalCompletion:
3345 Controller->EphemeralProgressMessage = true;
3346 DAC960_Progress("Rebuild in Progress: "
3347 "Logical Drive %d (/dev/rd/c%dd%d) "
3348 "%d%% completed\n",
3349 Controller, LogicalDriveNumber,
3350 Controller->ControllerNumber,
3351 LogicalDriveNumber,
3352 (100 * (BlocksCompleted >> 7))
3353 / (LogicalDriveSize >> 7));
3354 Controller->EphemeralProgressMessage = false;
3355 break;
3356 case DAC960_V1_RebuildFailed_LogicalDriveFailure:
3357 DAC960_Progress("Rebuild Failed due to "
3358 "Logical Drive Failure\n", Controller);
3359 break;
3360 case DAC960_V1_RebuildFailed_BadBlocksOnOther:
3361 DAC960_Progress("Rebuild Failed due to "
3362 "Bad Blocks on Other Drives\n", Controller);
3363 break;
3364 case DAC960_V1_RebuildFailed_NewDriveFailed:
3365 DAC960_Progress("Rebuild Failed due to "
3366 "Failure of Drive Being Rebuilt\n", Controller);
3367 break;
3368 case DAC960_V1_NoRebuildOrCheckInProgress:
3369 break;
3370 case DAC960_V1_RebuildSuccessful:
3371 DAC960_Progress("Rebuild Completed Successfully\n", Controller);
3372 break;
3373 case DAC960_V1_RebuildSuccessfullyTerminated:
3374 DAC960_Progress("Rebuild Successfully Terminated\n", Controller);
3375 break;
3376 }
3377 Controller->V1.LastRebuildStatus = CommandStatus;
3378 if (CommandType != DAC960_MonitoringCommand &&
3379 Controller->V1.RebuildStatusPending)
3380 {
3381 Command->V1.CommandStatus = Controller->V1.PendingRebuildStatus;
3382 Controller->V1.RebuildStatusPending = false;
3383 }
3384 else if (CommandType == DAC960_MonitoringCommand &&
3385 CommandStatus != DAC960_V1_NormalCompletion &&
3386 CommandStatus != DAC960_V1_NoRebuildOrCheckInProgress)
3387 {
3388 Controller->V1.PendingRebuildStatus = CommandStatus;
3389 Controller->V1.RebuildStatusPending = true;
3390 }
3391 }
3392 else if (CommandOpcode == DAC960_V1_RebuildStat)
3393 {
3394 unsigned int LogicalDriveNumber =
3395 Controller->V1.RebuildProgress.LogicalDriveNumber;
3396 unsigned int LogicalDriveSize =
3397 Controller->V1.RebuildProgress.LogicalDriveSize;
3398 unsigned int BlocksCompleted =
3399 LogicalDriveSize - Controller->V1.RebuildProgress.RemainingBlocks;
3400 if (CommandStatus == DAC960_V1_NormalCompletion)
3401 {
3402 Controller->EphemeralProgressMessage = true;
3403 DAC960_Progress("Consistency Check in Progress: "
3404 "Logical Drive %d (/dev/rd/c%dd%d) "
3405 "%d%% completed\n",
3406 Controller, LogicalDriveNumber,
3407 Controller->ControllerNumber,
3408 LogicalDriveNumber,
3409 (100 * (BlocksCompleted >> 7))
3410 / (LogicalDriveSize >> 7));
3411 Controller->EphemeralProgressMessage = false;
3412 }
3413 }
3414 }
3415 if (CommandType == DAC960_MonitoringCommand)
3416 {
3417 if (Controller->V1.NewEventLogSequenceNumber
3418 - Controller->V1.OldEventLogSequenceNumber > 0)
3419 {
3420 Command->V1.CommandMailbox.Type3E.CommandOpcode =
3421 DAC960_V1_PerformEventLogOperation;
3422 Command->V1.CommandMailbox.Type3E.OperationType =
3423 DAC960_V1_GetEventLogEntry;
3424 Command->V1.CommandMailbox.Type3E.OperationQualifier = 1;
3425 Command->V1.CommandMailbox.Type3E.SequenceNumber =
3426 Controller->V1.OldEventLogSequenceNumber;
3427 Command->V1.CommandMailbox.Type3E.BusAddress =
3428 Virtual_to_Bus32(&Controller->V1.EventLogEntry);
3429 DAC960_QueueCommand(Command);
3430 return;
3431 }
3432 if (Controller->V1.NeedErrorTableInformation)
3433 {
3434 Controller->V1.NeedErrorTableInformation = false;
3435 Command->V1.CommandMailbox.Type3.CommandOpcode =
3436 DAC960_V1_GetErrorTable;
3437 Command->V1.CommandMailbox.Type3.BusAddress =
3438 Virtual_to_Bus32(&Controller->V1.NewErrorTable);
3439 DAC960_QueueCommand(Command);
3440 return;
3441 }
3442 if (Controller->V1.NeedRebuildProgress &&
3443 Controller->V1.RebuildProgressFirst)
3444 {
3445 Controller->V1.NeedRebuildProgress = false;
3446 Command->V1.CommandMailbox.Type3.CommandOpcode =
3447 DAC960_V1_GetRebuildProgress;
3448 Command->V1.CommandMailbox.Type3.BusAddress =
3449 Virtual_to_Bus32(&Controller->V1.RebuildProgress);
3450 DAC960_QueueCommand(Command);
3451 return;
3452 }
3453 if (Controller->V1.NeedDeviceStateInformation)
3454 {
3455 if (Controller->V1.NeedDeviceInquiryInformation)
3456 {
3457 DAC960_V1_DCDB_T *DCDB = &Controller->V1.MonitoringDCDB;
3458 DAC960_SCSI_Inquiry_T *InquiryStandardData =
3459 &Controller->V1.InquiryStandardData
3460 [Controller->V1.DeviceStateChannel]
3461 [Controller->V1.DeviceStateTargetID];
3462 InquiryStandardData->PeripheralDeviceType = 0x1F;
3463 Command->V1.CommandMailbox.Type3.CommandOpcode = DAC960_V1_DCDB;
3464 Command->V1.CommandMailbox.Type3.BusAddress =
3465 Virtual_to_Bus32(DCDB);
3466 DCDB->Channel = Controller->V1.DeviceStateChannel;
3467 DCDB->TargetID = Controller->V1.DeviceStateTargetID;
3468 DCDB->Direction = DAC960_V1_DCDB_DataTransferDeviceToSystem;
3469 DCDB->EarlyStatus = false;
3470 DCDB->Timeout = DAC960_V1_DCDB_Timeout_10_seconds;
3471 DCDB->NoAutomaticRequestSense = false;
3472 DCDB->DisconnectPermitted = true;
3473 DCDB->TransferLength = sizeof(DAC960_SCSI_Inquiry_T);
3474 DCDB->BusAddress = Virtual_to_Bus32(InquiryStandardData);
3475 DCDB->CDBLength = 6;
3476 DCDB->TransferLengthHigh4 = 0;
3477 DCDB->SenseLength = sizeof(DCDB->SenseData);
3478 DCDB->CDB[0] = 0x12; /* INQUIRY */
3479 DCDB->CDB[1] = 0; /* EVPD = 0 */
3480 DCDB->CDB[2] = 0; /* Page Code */
3481 DCDB->CDB[3] = 0; /* Reserved */
3482 DCDB->CDB[4] = sizeof(DAC960_SCSI_Inquiry_T);
3483 DCDB->CDB[5] = 0; /* Control */
3484 DAC960_QueueCommand(Command);
3485 Controller->V1.NeedDeviceInquiryInformation = false;
3486 return;
3487 }
3488 if (Controller->V1.NeedDeviceSerialNumberInformation)
3489 {
3490 DAC960_V1_DCDB_T *DCDB = &Controller->V1.MonitoringDCDB;
3491 DAC960_SCSI_Inquiry_UnitSerialNumber_T *InquiryUnitSerialNumber =
3492 &Controller->V1.InquiryUnitSerialNumber
3493 [Controller->V1.DeviceStateChannel]
3494 [Controller->V1.DeviceStateTargetID];
3495 InquiryUnitSerialNumber->PeripheralDeviceType = 0x1F;
3496 Command->V1.CommandMailbox.Type3.CommandOpcode = DAC960_V1_DCDB;
3497 Command->V1.CommandMailbox.Type3.BusAddress =
3498 Virtual_to_Bus32(DCDB);
3499 DCDB->Channel = Controller->V1.DeviceStateChannel;
3500 DCDB->TargetID = Controller->V1.DeviceStateTargetID;
3501 DCDB->Direction = DAC960_V1_DCDB_DataTransferDeviceToSystem;
3502 DCDB->EarlyStatus = false;
3503 DCDB->Timeout = DAC960_V1_DCDB_Timeout_10_seconds;
3504 DCDB->NoAutomaticRequestSense = false;
3505 DCDB->DisconnectPermitted = true;
3506 DCDB->TransferLength =
3507 sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T);
3508 DCDB->BusAddress = Virtual_to_Bus32(InquiryUnitSerialNumber);
3509 DCDB->CDBLength = 6;
3510 DCDB->TransferLengthHigh4 = 0;
3511 DCDB->SenseLength = sizeof(DCDB->SenseData);
3512 DCDB->CDB[0] = 0x12; /* INQUIRY */
3513 DCDB->CDB[1] = 1; /* EVPD = 1 */
3514 DCDB->CDB[2] = 0x80; /* Page Code */
3515 DCDB->CDB[3] = 0; /* Reserved */
3516 DCDB->CDB[4] = sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T);
3517 DCDB->CDB[5] = 0; /* Control */
3518 DAC960_QueueCommand(Command);
3519 Controller->V1.NeedDeviceSerialNumberInformation = false;
3520 return;
3521 }
3522 if (Controller->V1.StartDeviceStateScan)
3523 {
3524 Controller->V1.DeviceStateChannel = 0;
3525 Controller->V1.DeviceStateTargetID = 0;
3526 Controller->V1.StartDeviceStateScan = false;
3527 }
3528 else if (++Controller->V1.DeviceStateTargetID == Controller->Targets)
3529 {
3530 Controller->V1.DeviceStateChannel++;
3531 Controller->V1.DeviceStateTargetID = 0;
3532 }
3533 if (Controller->V1.DeviceStateChannel < Controller->Channels)
3534 {
3535 Controller->V1.NewDeviceState.DeviceState =
3536 DAC960_V1_Device_Dead;
3537 Command->V1.CommandMailbox.Type3D.CommandOpcode =
3538 DAC960_V1_GetDeviceState;
3539 Command->V1.CommandMailbox.Type3D.Channel =
3540 Controller->V1.DeviceStateChannel;
3541 Command->V1.CommandMailbox.Type3D.TargetID =
3542 Controller->V1.DeviceStateTargetID;
3543 Command->V1.CommandMailbox.Type3D.BusAddress =
3544 Virtual_to_Bus32(&Controller->V1.NewDeviceState);
3545 DAC960_QueueCommand(Command);
3546 return;
3547 }
3548 Controller->V1.NeedDeviceStateInformation = false;
3549 }
3550 if (Controller->V1.NeedLogicalDriveInformation)
3551 {
3552 Controller->V1.NeedLogicalDriveInformation = false;
3553 Command->V1.CommandMailbox.Type3.CommandOpcode =
3554 DAC960_V1_GetLogicalDriveInformation;
3555 Command->V1.CommandMailbox.Type3.BusAddress =
3556 Virtual_to_Bus32(&Controller->V1.NewLogicalDriveInformation);
3557 DAC960_QueueCommand(Command);
3558 return;
3559 }
3560 if (Controller->V1.NeedRebuildProgress)
3561 {
3562 Controller->V1.NeedRebuildProgress = false;
3563 Command->V1.CommandMailbox.Type3.CommandOpcode =
3564 DAC960_V1_GetRebuildProgress;
3565 Command->V1.CommandMailbox.Type3.BusAddress =
3566 Virtual_to_Bus32(&Controller->V1.RebuildProgress);
3567 DAC960_QueueCommand(Command);
3568 return;
3569 }
3570 if (Controller->V1.NeedConsistencyCheckProgress)
3571 {
3572 Controller->V1.NeedConsistencyCheckProgress = false;
3573 Command->V1.CommandMailbox.Type3.CommandOpcode =
3574 DAC960_V1_RebuildStat;
3575 Command->V1.CommandMailbox.Type3.BusAddress =
3576 Virtual_to_Bus32(&Controller->V1.RebuildProgress);
3577 DAC960_QueueCommand(Command);
3578 return;
3579 }
3580 Controller->MonitoringTimerCount++;
3581 Controller->MonitoringTimer.expires =
3582 jiffies + DAC960_MonitoringTimerInterval;
3583 add_timer(&Controller->MonitoringTimer);
3584 }
3585 if (CommandType == DAC960_ImmediateCommand)
3586 {
3587 complete(Command->Completion);
3588 Command->Completion = NULL;
3589 return;
3590 }
3591 if (CommandType == DAC960_QueuedCommand)
3592 {
3593 DAC960_V1_KernelCommand_T *KernelCommand = Command->V1.KernelCommand;
3594 KernelCommand->CommandStatus = Command->V1.CommandStatus;
3595 Command->V1.KernelCommand = NULL;
3596 if (CommandOpcode == DAC960_V1_DCDB)
3597 Controller->V1.DirectCommandActive[KernelCommand->DCDB->Channel]
3598 [KernelCommand->DCDB->TargetID] =
3599 false;
3600 DAC960_DeallocateCommand(Command);
3601 KernelCommand->CompletionFunction(KernelCommand);
3602 return;
3603 }
3604 /*
3605 Queue a Status Monitoring Command to the Controller using the just
3606 completed Command if one was deferred previously due to lack of a
3607 free Command when the Monitoring Timer Function was called.
3608 */
3609 if (Controller->MonitoringCommandDeferred)
3610 {
3611 Controller->MonitoringCommandDeferred = false;
3612 DAC960_V1_QueueMonitoringCommand(Command);
3613 return;
3614 }
3615 /*
3616 Deallocate the Command.
3617 */
3618 DAC960_DeallocateCommand(Command);
3619 /*
3620 Wake up any processes waiting on a free Command.
3621 */
3622 wake_up(&Controller->CommandWaitQueue);
3623 }
3624
3625
3626 /*
3627 DA