1 /*
2
3 Linux Driver for Mylex DAC960/AcceleRAID/eXtremeRAID PCI RAID Controllers
4
5 Copyright 1998-2000 by Leonard N. Zubkoff <lnz@dandelion.com>
6
7 This program is free software; you may redistribute and/or modify it under
8 the terms of the GNU General Public License Version 2 as published by the
9 Free Software Foundation.
10
11 This program is distributed in the hope that it will be useful, but
12 WITHOUT ANY WARRANTY, without even the implied warranty of MERCHANTABILITY
13 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
14 for complete details.
15
16 The author respectfully requests that any modifications to this software be
17 sent directly to him for evaluation and testing.
18
19 */
20
21
22 #define DAC960_DriverVersion "2.4.9"
23 #define DAC960_DriverDate "7 September 2000"
24
25
26 #include <linux/version.h>
27 #include <linux/module.h>
28 #include <linux/types.h>
29 #include <linux/blk.h>
30 #include <linux/blkdev.h>
31 #include <linux/delay.h>
32 #include <linux/hdreg.h>
33 #include <linux/interrupt.h>
34 #include <linux/ioport.h>
35 #include <linux/locks.h>
36 #include <linux/mm.h>
37 #include <linux/malloc.h>
38 #include <linux/proc_fs.h>
39 #include <linux/reboot.h>
40 #include <linux/spinlock.h>
41 #include <linux/timer.h>
42 #include <linux/pci.h>
43 #include <asm/io.h>
44 #include <asm/segment.h>
45 #include <asm/uaccess.h>
46 #include "DAC960.h"
47
48
49 /*
50 DAC960_ControllerCount is the number of DAC960 Controllers detected.
51 */
52
53 static int
54 DAC960_ControllerCount;
55
56
57 /*
58 DAC960_ActiveControllerCount is the number of active DAC960 Controllers
59 detected.
60 */
61
62 static int
63 DAC960_ActiveControllerCount;
64
65
66 /*
67 DAC960_Controllers is an array of pointers to the DAC960 Controller
68 structures.
69 */
70
71 static DAC960_Controller_T
72 *DAC960_Controllers[DAC960_MaxControllers];
73
74
75 /*
76 DAC960_BlockDeviceOperations is the Block Device Operations structure for
77 DAC960 Logical Disk Devices.
78 */
79
80 static BlockDeviceOperations_T
81 DAC960_BlockDeviceOperations =
82 { open: DAC960_Open,
83 release: DAC960_Release,
84 ioctl: DAC960_IOCTL };
85
86
87 /*
88 DAC960_ProcDirectoryEntry is the DAC960 /proc/rd directory entry.
89 */
90
91 static PROC_DirectoryEntry_T
92 *DAC960_ProcDirectoryEntry;
93
94
95 /*
96 DAC960_NotifierBlock is the Notifier Block structure for DAC960 Driver.
97 */
98
99 static NotifierBlock_T
100 DAC960_NotifierBlock = { DAC960_Finalize, NULL, 0 };
101
102
103 /*
104 DAC960_AnnounceDriver announces the Driver Version and Date, Author's Name,
105 Copyright Notice, and Electronic Mail Address.
106 */
107
108 static void DAC960_AnnounceDriver(DAC960_Controller_T *Controller)
109 {
110 DAC960_Announce("***** DAC960 RAID Driver Version "
111 DAC960_DriverVersion " of "
112 DAC960_DriverDate " *****\n", Controller);
113 DAC960_Announce("Copyright 1998-2000 by Leonard N. Zubkoff "
114 "<lnz@dandelion.com>\n", Controller);
115 }
116
117
118 /*
119 DAC960_Failure prints a standardized error message, and then returns false.
120 */
121
122 static boolean DAC960_Failure(DAC960_Controller_T *Controller,
123 unsigned char *ErrorMessage)
124 {
125 DAC960_Error("While configuring DAC960 PCI RAID Controller at\n",
126 Controller);
127 if (Controller->IO_Address == 0)
128 DAC960_Error("PCI Bus %d Device %d Function %d I/O Address N/A "
129 "PCI Address 0x%X\n", Controller,
130 Controller->Bus, Controller->Device,
131 Controller->Function, Controller->PCI_Address);
132 else DAC960_Error("PCI Bus %d Device %d Function %d I/O Address "
133 "0x%X PCI Address 0x%X\n", Controller,
134 Controller->Bus, Controller->Device,
135 Controller->Function, Controller->IO_Address,
136 Controller->PCI_Address);
137 DAC960_Error("%s FAILED - DETACHING\n", Controller, ErrorMessage);
138 return false;
139 }
140
141
142 /*
143 DAC960_CreateAuxiliaryStructures allocates and initializes the auxiliary
144 data structures for Controller. It returns true on success and false on
145 failure.
146 */
147
148 static boolean DAC960_CreateAuxiliaryStructures(DAC960_Controller_T *Controller)
149 {
150 int CommandAllocationLength, CommandAllocationGroupSize;
151 int CommandsRemaining = 0, CommandIdentifier, CommandGroupByteCount;
152 void *AllocationPointer = NULL;
153 if (Controller->FirmwareType == DAC960_V1_Controller)
154 {
155 CommandAllocationLength = offsetof(DAC960_Command_T, V1.EndMarker);
156 CommandAllocationGroupSize = DAC960_V1_CommandAllocationGroupSize;
157 }
158 else
159 {
160 CommandAllocationLength = offsetof(DAC960_Command_T, V2.EndMarker);
161 CommandAllocationGroupSize = DAC960_V2_CommandAllocationGroupSize;
162 }
163 Controller->CommandAllocationGroupSize = CommandAllocationGroupSize;
164 Controller->FreeCommands = NULL;
165 for (CommandIdentifier = 1;
166 CommandIdentifier <= Controller->DriverQueueDepth;
167 CommandIdentifier++)
168 {
169 DAC960_Command_T *Command;
170 if (--CommandsRemaining <= 0)
171 {
172 CommandsRemaining =
173 Controller->DriverQueueDepth - CommandIdentifier + 1;
174 if (CommandsRemaining > CommandAllocationGroupSize)
175 CommandsRemaining = CommandAllocationGroupSize;
176 CommandGroupByteCount =
177 CommandsRemaining * CommandAllocationLength;
178 AllocationPointer = kmalloc(CommandGroupByteCount, GFP_ATOMIC);
179 if (AllocationPointer == NULL)
180 return DAC960_Failure(Controller, "AUXILIARY STRUCTURE CREATION");
181 memset(AllocationPointer, 0, CommandGroupByteCount);
182 }
183 Command = (DAC960_Command_T *) AllocationPointer;
184 AllocationPointer += CommandAllocationLength;
185 Command->CommandIdentifier = CommandIdentifier;
186 Command->Controller = Controller;
187 Command->Next = Controller->FreeCommands;
188 Controller->FreeCommands = Command;
189 Controller->Commands[CommandIdentifier-1] = Command;
190 }
191 return true;
192 }
193
194
195 /*
196 DAC960_DestroyAuxiliaryStructures deallocates the auxiliary data
197 structures for Controller.
198 */
199
200 static void DAC960_DestroyAuxiliaryStructures(DAC960_Controller_T *Controller)
201 {
202 int i;
203 Controller->FreeCommands = NULL;
204 for (i = 0; i < Controller->DriverQueueDepth; i++)
205 {
206 DAC960_Command_T *Command = Controller->Commands[i];
207 if (Command != NULL &&
208 (Command->CommandIdentifier
209 % Controller->CommandAllocationGroupSize) == 1)
210 kfree(Command);
211 Controller->Commands[i] = NULL;
212 }
213 if (Controller->CombinedStatusBuffer != NULL)
214 {
215 kfree(Controller->CombinedStatusBuffer);
216 Controller->CombinedStatusBuffer = NULL;
217 Controller->CurrentStatusBuffer = NULL;
218 }
219 if (Controller->FirmwareType == DAC960_V1_Controller) return;
220 for (i = 0; i < DAC960_MaxLogicalDrives; i++)
221 if (Controller->V2.LogicalDeviceInformation[i] != NULL)
222 {
223 kfree(Controller->V2.LogicalDeviceInformation[i]);
224 Controller->V2.LogicalDeviceInformation[i] = NULL;
225 }
226 for (i = 0; i < DAC960_V2_MaxPhysicalDevices; i++)
227 {
228 if (Controller->V2.PhysicalDeviceInformation[i] != NULL)
229 {
230 kfree(Controller->V2.PhysicalDeviceInformation[i]);
231 Controller->V2.PhysicalDeviceInformation[i] = NULL;
232 }
233 if (Controller->V2.InquiryUnitSerialNumber[i] != NULL)
234 {
235 kfree(Controller->V2.InquiryUnitSerialNumber[i]);
236 Controller->V2.InquiryUnitSerialNumber[i] = NULL;
237 }
238 }
239 }
240
241
242 /*
243 DAC960_V1_ClearCommand clears critical fields of Command for DAC960 V1
244 Firmware Controllers.
245 */
246
247 static inline void DAC960_V1_ClearCommand(DAC960_Command_T *Command)
248 {
249 DAC960_V1_CommandMailbox_T *CommandMailbox = &Command->V1.CommandMailbox;
250 memset(CommandMailbox, 0, sizeof(DAC960_V1_CommandMailbox_T));
251 Command->V1.CommandStatus = 0;
252 }
253
254
255 /*
256 DAC960_V2_ClearCommand clears critical fields of Command for DAC960 V2
257 Firmware Controllers.
258 */
259
260 static inline void DAC960_V2_ClearCommand(DAC960_Command_T *Command)
261 {
262 DAC960_V2_CommandMailbox_T *CommandMailbox = &Command->V2.CommandMailbox;
263 memset(CommandMailbox, 0, sizeof(DAC960_V2_CommandMailbox_T));
264 Command->V2.CommandStatus = 0;
265 }
266
267
268 /*
269 DAC960_AllocateCommand allocates a Command structure from Controller's
270 free list.
271 */
272
273 static inline DAC960_Command_T *DAC960_AllocateCommand(DAC960_Controller_T
274 *Controller)
275 {
276 DAC960_Command_T *Command = Controller->FreeCommands;
277 if (Command == NULL) return NULL;
278 Controller->FreeCommands = Command->Next;
279 Command->Next = NULL;
280 return Command;
281 }
282
283
284 /*
285 DAC960_DeallocateCommand deallocates Command, returning it to Controller's
286 free list.
287 */
288
289 static inline void DAC960_DeallocateCommand(DAC960_Command_T *Command)
290 {
291 DAC960_Controller_T *Controller = Command->Controller;
292 Command->Next = Controller->FreeCommands;
293 Controller->FreeCommands = Command;
294 }
295
296
297 /*
298 DAC960_WaitForCommand waits for a wake_up on Controller's Command Wait Queue.
299 */
300
301 static void DAC960_WaitForCommand(DAC960_Controller_T *Controller)
302 {
303 spin_unlock_irq(&io_request_lock);
304 __wait_event(Controller->CommandWaitQueue, Controller->FreeCommands);
305 spin_lock_irq(&io_request_lock);
306 }
307
308
309 /*
310 DAC960_BA_QueueCommand queues Command for DAC960 BA Series Controllers.
311 */
312
313 static void DAC960_BA_QueueCommand(DAC960_Command_T *Command)
314 {
315 DAC960_Controller_T *Controller = Command->Controller;
316 void *ControllerBaseAddress = Controller->BaseAddress;
317 DAC960_V2_CommandMailbox_T *CommandMailbox = &Command->V2.CommandMailbox;
318 DAC960_V2_CommandMailbox_T *NextCommandMailbox =
319 Controller->V2.NextCommandMailbox;
320 CommandMailbox->Common.CommandIdentifier = Command->CommandIdentifier;
321 DAC960_BA_WriteCommandMailbox(NextCommandMailbox, CommandMailbox);
322 if (Controller->V2.PreviousCommandMailbox1->Words[0] == 0 ||
323 Controller->V2.PreviousCommandMailbox2->Words[0] == 0)
324 DAC960_BA_MemoryMailboxNewCommand(ControllerBaseAddress);
325 Controller->V2.PreviousCommandMailbox2 =
326 Controller->V2.PreviousCommandMailbox1;
327 Controller->V2.PreviousCommandMailbox1 = NextCommandMailbox;
328 if (++NextCommandMailbox > Controller->V2.LastCommandMailbox)
329 NextCommandMailbox = Controller->V2.FirstCommandMailbox;
330 Controller->V2.NextCommandMailbox = NextCommandMailbox;
331 }
332
333
334 /*
335 DAC960_LP_QueueCommand queues Command for DAC960 LP Series Controllers.
336 */
337
338 static void DAC960_LP_QueueCommand(DAC960_Command_T *Command)
339 {
340 DAC960_Controller_T *Controller = Command->Controller;
341 void *ControllerBaseAddress = Controller->BaseAddress;
342 DAC960_V2_CommandMailbox_T *CommandMailbox = &Command->V2.CommandMailbox;
343 DAC960_V2_CommandMailbox_T *NextCommandMailbox =
344 Controller->V2.NextCommandMailbox;
345 CommandMailbox->Common.CommandIdentifier = Command->CommandIdentifier;
346 DAC960_LP_WriteCommandMailbox(NextCommandMailbox, CommandMailbox);
347 if (Controller->V2.PreviousCommandMailbox1->Words[0] == 0 ||
348 Controller->V2.PreviousCommandMailbox2->Words[0] == 0)
349 DAC960_LP_MemoryMailboxNewCommand(ControllerBaseAddress);
350 Controller->V2.PreviousCommandMailbox2 =
351 Controller->V2.PreviousCommandMailbox1;
352 Controller->V2.PreviousCommandMailbox1 = NextCommandMailbox;
353 if (++NextCommandMailbox > Controller->V2.LastCommandMailbox)
354 NextCommandMailbox = Controller->V2.FirstCommandMailbox;
355 Controller->V2.NextCommandMailbox = NextCommandMailbox;
356 }
357
358
359 /*
360 DAC960_LA_QueueCommandDualMode queues Command for DAC960 LA Series
361 Controllers with Dual Mode Firmware.
362 */
363
364 static void DAC960_LA_QueueCommandDualMode(DAC960_Command_T *Command)
365 {
366 DAC960_Controller_T *Controller = Command->Controller;
367 void *ControllerBaseAddress = Controller->BaseAddress;
368 DAC960_V1_CommandMailbox_T *CommandMailbox = &Command->V1.CommandMailbox;
369 DAC960_V1_CommandMailbox_T *NextCommandMailbox =
370 Controller->V1.NextCommandMailbox;
371 CommandMailbox->Common.CommandIdentifier = Command->CommandIdentifier;
372 DAC960_LA_WriteCommandMailbox(NextCommandMailbox, CommandMailbox);
373 if (Controller->V1.PreviousCommandMailbox1->Words[0] == 0 ||
374 Controller->V1.PreviousCommandMailbox2->Words[0] == 0)
375 DAC960_LA_MemoryMailboxNewCommand(ControllerBaseAddress);
376 Controller->V1.PreviousCommandMailbox2 =
377 Controller->V1.PreviousCommandMailbox1;
378 Controller->V1.PreviousCommandMailbox1 = NextCommandMailbox;
379 if (++NextCommandMailbox > Controller->V1.LastCommandMailbox)
380 NextCommandMailbox = Controller->V1.FirstCommandMailbox;
381 Controller->V1.NextCommandMailbox = NextCommandMailbox;
382 }
383
384
385 /*
386 DAC960_LA_QueueCommandSingleMode queues Command for DAC960 LA Series
387 Controllers with Single Mode Firmware.
388 */
389
390 static void DAC960_LA_QueueCommandSingleMode(DAC960_Command_T *Command)
391 {
392 DAC960_Controller_T *Controller = Command->Controller;
393 void *ControllerBaseAddress = Controller->BaseAddress;
394 DAC960_V1_CommandMailbox_T *CommandMailbox = &Command->V1.CommandMailbox;
395 DAC960_V1_CommandMailbox_T *NextCommandMailbox =
396 Controller->V1.NextCommandMailbox;
397 CommandMailbox->Common.CommandIdentifier = Command->CommandIdentifier;
398 DAC960_LA_WriteCommandMailbox(NextCommandMailbox, CommandMailbox);
399 if (Controller->V1.PreviousCommandMailbox1->Words[0] == 0 ||
400 Controller->V1.PreviousCommandMailbox2->Words[0] == 0)
401 DAC960_LA_HardwareMailboxNewCommand(ControllerBaseAddress);
402 Controller->V1.PreviousCommandMailbox2 =
403 Controller->V1.PreviousCommandMailbox1;
404 Controller->V1.PreviousCommandMailbox1 = NextCommandMailbox;
405 if (++NextCommandMailbox > Controller->V1.LastCommandMailbox)
406 NextCommandMailbox = Controller->V1.FirstCommandMailbox;
407 Controller->V1.NextCommandMailbox = NextCommandMailbox;
408 }
409
410
411 /*
412 DAC960_PG_QueueCommandDualMode queues Command for DAC960 PG Series
413 Controllers with Dual Mode Firmware.
414 */
415
416 static void DAC960_PG_QueueCommandDualMode(DAC960_Command_T *Command)
417 {
418 DAC960_Controller_T *Controller = Command->Controller;
419 void *ControllerBaseAddress = Controller->BaseAddress;
420 DAC960_V1_CommandMailbox_T *CommandMailbox = &Command->V1.CommandMailbox;
421 DAC960_V1_CommandMailbox_T *NextCommandMailbox =
422 Controller->V1.NextCommandMailbox;
423 CommandMailbox->Common.CommandIdentifier = Command->CommandIdentifier;
424 DAC960_PG_WriteCommandMailbox(NextCommandMailbox, CommandMailbox);
425 if (Controller->V1.PreviousCommandMailbox1->Words[0] == 0 ||
426 Controller->V1.PreviousCommandMailbox2->Words[0] == 0)
427 DAC960_PG_MemoryMailboxNewCommand(ControllerBaseAddress);
428 Controller->V1.PreviousCommandMailbox2 =
429 Controller->V1.PreviousCommandMailbox1;
430 Controller->V1.PreviousCommandMailbox1 = NextCommandMailbox;
431 if (++NextCommandMailbox > Controller->V1.LastCommandMailbox)
432 NextCommandMailbox = Controller->V1.FirstCommandMailbox;
433 Controller->V1.NextCommandMailbox = NextCommandMailbox;
434 }
435
436
437 /*
438 DAC960_PG_QueueCommandSingleMode queues Command for DAC960 PG Series
439 Controllers with Single Mode Firmware.
440 */
441
442 static void DAC960_PG_QueueCommandSingleMode(DAC960_Command_T *Command)
443 {
444 DAC960_Controller_T *Controller = Command->Controller;
445 void *ControllerBaseAddress = Controller->BaseAddress;
446 DAC960_V1_CommandMailbox_T *CommandMailbox = &Command->V1.CommandMailbox;
447 DAC960_V1_CommandMailbox_T *NextCommandMailbox =
448 Controller->V1.NextCommandMailbox;
449 CommandMailbox->Common.CommandIdentifier = Command->CommandIdentifier;
450 DAC960_PG_WriteCommandMailbox(NextCommandMailbox, CommandMailbox);
451 if (Controller->V1.PreviousCommandMailbox1->Words[0] == 0 ||
452 Controller->V1.PreviousCommandMailbox2->Words[0] == 0)
453 DAC960_PG_HardwareMailboxNewCommand(ControllerBaseAddress);
454 Controller->V1.PreviousCommandMailbox2 =
455 Controller->V1.PreviousCommandMailbox1;
456 Controller->V1.PreviousCommandMailbox1 = NextCommandMailbox;
457 if (++NextCommandMailbox > Controller->V1.LastCommandMailbox)
458 NextCommandMailbox = Controller->V1.FirstCommandMailbox;
459 Controller->V1.NextCommandMailbox = NextCommandMailbox;
460 }
461
462
463 /*
464 DAC960_PD_QueueCommand queues Command for DAC960 PD Series Controllers.
465 */
466
467 static void DAC960_PD_QueueCommand(DAC960_Command_T *Command)
468 {
469 DAC960_Controller_T *Controller = Command->Controller;
470 void *ControllerBaseAddress = Controller->BaseAddress;
471 DAC960_V1_CommandMailbox_T *CommandMailbox = &Command->V1.CommandMailbox;
472 CommandMailbox->Common.CommandIdentifier = Command->CommandIdentifier;
473 while (DAC960_PD_MailboxFullP(ControllerBaseAddress))
474 udelay(1);
475 DAC960_PD_WriteCommandMailbox(ControllerBaseAddress, CommandMailbox);
476 DAC960_PD_NewCommand(ControllerBaseAddress);
477 }
478
479
480 /*
481 DAC960_ExecuteCommand executes Command and waits for completion.
482 */
483
484 static void DAC960_ExecuteCommand(DAC960_Command_T *Command)
485 {
486 DAC960_Controller_T *Controller = Command->Controller;
487 DECLARE_MUTEX_LOCKED(Semaphore);
488 unsigned long ProcessorFlags;
489 Command->Semaphore = &Semaphore;
490 DAC960_AcquireControllerLock(Controller, &ProcessorFlags);
491 DAC960_QueueCommand(Command);
492 DAC960_ReleaseControllerLock(Controller, &ProcessorFlags);
493 if (in_interrupt()) return;
494 down(&Semaphore);
495 }
496
497
498 /*
499 DAC960_V1_ExecuteType3 executes a DAC960 V1 Firmware Controller Type 3
500 Command and waits for completion. It returns true on success and false
501 on failure.
502 */
503
504 static boolean DAC960_V1_ExecuteType3(DAC960_Controller_T *Controller,
505 DAC960_V1_CommandOpcode_T CommandOpcode,
506 void *DataPointer)
507 {
508 DAC960_Command_T *Command = DAC960_AllocateCommand(Controller);
509 DAC960_V1_CommandMailbox_T *CommandMailbox = &Command->V1.CommandMailbox;
510 DAC960_V1_CommandStatus_T CommandStatus;
511 DAC960_V1_ClearCommand(Command);
512 Command->CommandType = DAC960_ImmediateCommand;
513 CommandMailbox->Type3.CommandOpcode = CommandOpcode;
514 CommandMailbox->Type3.BusAddress = Virtual_to_Bus(DataPointer);
515 DAC960_ExecuteCommand(Command);
516 CommandStatus = Command->V1.CommandStatus;
517 DAC960_DeallocateCommand(Command);
518 return (CommandStatus == DAC960_V1_NormalCompletion);
519 }
520
521
522 /*
523 DAC960_V1_ExecuteType3D executes a DAC960 V1 Firmware Controller Type 3D
524 Command and waits for completion. It returns true on success and false
525 on failure.
526 */
527
528 static boolean DAC960_V1_ExecuteType3D(DAC960_Controller_T *Controller,
529 DAC960_V1_CommandOpcode_T CommandOpcode,
530 unsigned char Channel,
531 unsigned char TargetID,
532 void *DataPointer)
533 {
534 DAC960_Command_T *Command = DAC960_AllocateCommand(Controller);
535 DAC960_V1_CommandMailbox_T *CommandMailbox = &Command->V1.CommandMailbox;
536 DAC960_V1_CommandStatus_T CommandStatus;
537 DAC960_V1_ClearCommand(Command);
538 Command->CommandType = DAC960_ImmediateCommand;
539 CommandMailbox->Type3D.CommandOpcode = CommandOpcode;
540 CommandMailbox->Type3D.Channel = Channel;
541 CommandMailbox->Type3D.TargetID = TargetID;
542 CommandMailbox->Type3D.BusAddress = Virtual_to_Bus(DataPointer);
543 DAC960_ExecuteCommand(Command);
544 CommandStatus = Command->V1.CommandStatus;
545 DAC960_DeallocateCommand(Command);
546 return (CommandStatus == DAC960_V1_NormalCompletion);
547 }
548
549
550 /*
551 DAC960_V2_GeneralInfo executes a DAC960 V2 Firmware General Information
552 Reading IOCTL Command and waits for completion. It returns true on success
553 and false on failure.
554 */
555
556 static boolean DAC960_V2_GeneralInfo(DAC960_Controller_T *Controller,
557 DAC960_V2_IOCTL_Opcode_T IOCTL_Opcode,
558 void *DataPointer,
559 unsigned int DataByteCount)
560 {
561 DAC960_Command_T *Command = DAC960_AllocateCommand(Controller);
562 DAC960_V2_CommandMailbox_T *CommandMailbox = &Command->V2.CommandMailbox;
563 DAC960_V2_CommandStatus_T CommandStatus;
564 DAC960_V2_ClearCommand(Command);
565 Command->CommandType = DAC960_ImmediateCommand;
566 CommandMailbox->Common.CommandOpcode = DAC960_V2_IOCTL;
567 CommandMailbox->Common.CommandControlBits
568 .DataTransferControllerToHost = true;
569 CommandMailbox->Common.CommandControlBits
570 .NoAutoRequestSense = true;
571 CommandMailbox->Common.DataTransferSize = DataByteCount;
572 CommandMailbox->Common.IOCTL_Opcode = IOCTL_Opcode;
573 CommandMailbox->Common.DataTransferMemoryAddress
574 .ScatterGatherSegments[0]
575 .SegmentDataPointer =
576 Virtual_to_Bus(DataPointer);
577 CommandMailbox->Common.DataTransferMemoryAddress
578 .ScatterGatherSegments[0]
579 .SegmentByteCount =
580 CommandMailbox->Common.DataTransferSize;
581 DAC960_ExecuteCommand(Command);
582 CommandStatus = Command->V2.CommandStatus;
583 DAC960_DeallocateCommand(Command);
584 return (CommandStatus == DAC960_V2_NormalCompletion);
585 }
586
587
588 /*
589 DAC960_V2_ControllerInfo executes a DAC960 V2 Firmware Controller
590 Information Reading IOCTL Command and waits for completion. It returns
591 true on success and false on failure.
592 */
593
594 static boolean DAC960_V2_ControllerInfo(DAC960_Controller_T *Controller,
595 DAC960_V2_IOCTL_Opcode_T IOCTL_Opcode,
596 void *DataPointer,
597 unsigned int DataByteCount)
598 {
599 DAC960_Command_T *Command = DAC960_AllocateCommand(Controller);
600 DAC960_V2_CommandMailbox_T *CommandMailbox = &Command->V2.CommandMailbox;
601 DAC960_V2_CommandStatus_T CommandStatus;
602 DAC960_V2_ClearCommand(Command);
603 Command->CommandType = DAC960_ImmediateCommand;
604 CommandMailbox->ControllerInfo.CommandOpcode = DAC960_V2_IOCTL;
605 CommandMailbox->ControllerInfo.CommandControlBits
606 .DataTransferControllerToHost = true;
607 CommandMailbox->ControllerInfo.CommandControlBits
608 .NoAutoRequestSense = true;
609 CommandMailbox->ControllerInfo.DataTransferSize = DataByteCount;
610 CommandMailbox->ControllerInfo.ControllerNumber = 0;
611 CommandMailbox->ControllerInfo.IOCTL_Opcode = IOCTL_Opcode;
612 CommandMailbox->ControllerInfo.DataTransferMemoryAddress
613 .ScatterGatherSegments[0]
614 .SegmentDataPointer =
615 Virtual_to_Bus(DataPointer);
616 CommandMailbox->ControllerInfo.DataTransferMemoryAddress
617 .ScatterGatherSegments[0]
618 .SegmentByteCount =
619 CommandMailbox->ControllerInfo.DataTransferSize;
620 DAC960_ExecuteCommand(Command);
621 CommandStatus = Command->V2.CommandStatus;
622 DAC960_DeallocateCommand(Command);
623 return (CommandStatus == DAC960_V2_NormalCompletion);
624 }
625
626
627 /*
628 DAC960_V2_LogicalDeviceInfo executes a DAC960 V2 Firmware Controller Logical
629 Device Information Reading IOCTL Command and waits for completion. It
630 returns true on success and false on failure.
631 */
632
633 static boolean DAC960_V2_LogicalDeviceInfo(DAC960_Controller_T *Controller,
634 DAC960_V2_IOCTL_Opcode_T
635 IOCTL_Opcode,
636 unsigned short
637 LogicalDeviceNumber,
638 void *DataPointer,
639 unsigned int DataByteCount)
640 {
641 DAC960_Command_T *Command = DAC960_AllocateCommand(Controller);
642 DAC960_V2_CommandMailbox_T *CommandMailbox = &Command->V2.CommandMailbox;
643 DAC960_V2_CommandStatus_T CommandStatus;
644 DAC960_V2_ClearCommand(Command);
645 Command->CommandType = DAC960_ImmediateCommand;
646 CommandMailbox->LogicalDeviceInfo.CommandOpcode = DAC960_V2_IOCTL;
647 CommandMailbox->LogicalDeviceInfo.CommandControlBits
648 .DataTransferControllerToHost = true;
649 CommandMailbox->LogicalDeviceInfo.CommandControlBits
650 .NoAutoRequestSense = true;
651 CommandMailbox->LogicalDeviceInfo.DataTransferSize = DataByteCount;
652 CommandMailbox->LogicalDeviceInfo.LogicalDevice.LogicalDeviceNumber =
653 LogicalDeviceNumber;
654 CommandMailbox->LogicalDeviceInfo.IOCTL_Opcode = IOCTL_Opcode;
655 CommandMailbox->LogicalDeviceInfo.DataTransferMemoryAddress
656 .ScatterGatherSegments[0]
657 .SegmentDataPointer =
658 Virtual_to_Bus(DataPointer);
659 CommandMailbox->LogicalDeviceInfo.DataTransferMemoryAddress
660 .ScatterGatherSegments[0]
661 .SegmentByteCount =
662 CommandMailbox->LogicalDeviceInfo.DataTransferSize;
663 DAC960_ExecuteCommand(Command);
664 CommandStatus = Command->V2.CommandStatus;
665 DAC960_DeallocateCommand(Command);
666 return (CommandStatus == DAC960_V2_NormalCompletion);
667 }
668
669
670 /*
671 DAC960_V2_PhysicalDeviceInfo executes a DAC960 V2 Firmware Controller Physical
672 Device Information Reading IOCTL Command and waits for completion. It
673 returns true on success and false on failure.
674 */
675
676 static boolean DAC960_V2_PhysicalDeviceInfo(DAC960_Controller_T *Controller,
677 DAC960_V2_IOCTL_Opcode_T
678 IOCTL_Opcode,
679 unsigned char Channel,
680 unsigned char TargetID,
681 unsigned char LogicalUnit,
682 void *DataPointer,
683 unsigned int DataByteCount)
684 {
685 DAC960_Command_T *Command = DAC960_AllocateCommand(Controller);
686 DAC960_V2_CommandMailbox_T *CommandMailbox = &Command->V2.CommandMailbox;
687 DAC960_V2_CommandStatus_T CommandStatus;
688 DAC960_V2_ClearCommand(Command);
689 Command->CommandType = DAC960_ImmediateCommand;
690 CommandMailbox->PhysicalDeviceInfo.CommandOpcode = DAC960_V2_IOCTL;
691 CommandMailbox->PhysicalDeviceInfo.CommandControlBits
692 .DataTransferControllerToHost = true;
693 CommandMailbox->PhysicalDeviceInfo.CommandControlBits
694 .NoAutoRequestSense = true;
695 CommandMailbox->PhysicalDeviceInfo.DataTransferSize = DataByteCount;
696 CommandMailbox->PhysicalDeviceInfo.PhysicalDevice.LogicalUnit = LogicalUnit;
697 CommandMailbox->PhysicalDeviceInfo.PhysicalDevice.TargetID = TargetID;
698 CommandMailbox->PhysicalDeviceInfo.PhysicalDevice.Channel = Channel;
699 CommandMailbox->PhysicalDeviceInfo.IOCTL_Opcode = IOCTL_Opcode;
700 CommandMailbox->PhysicalDeviceInfo.DataTransferMemoryAddress
701 .ScatterGatherSegments[0]
702 .SegmentDataPointer =
703 Virtual_to_Bus(DataPointer);
704 CommandMailbox->PhysicalDeviceInfo.DataTransferMemoryAddress
705 .ScatterGatherSegments[0]
706 .SegmentByteCount =
707 CommandMailbox->PhysicalDeviceInfo.DataTransferSize;
708 DAC960_ExecuteCommand(Command);
709 CommandStatus = Command->V2.CommandStatus;
710 DAC960_DeallocateCommand(Command);
711 return (CommandStatus == DAC960_V2_NormalCompletion);
712 }
713
714
715 /*
716 DAC960_V2_DeviceOperation executes a DAC960 V2 Firmware Controller Device
717 Operation IOCTL Command and waits for completion. It returns true on
718 success and false on failure.
719 */
720
721 static boolean DAC960_V2_DeviceOperation(DAC960_Controller_T *Controller,
722 DAC960_V2_IOCTL_Opcode_T IOCTL_Opcode,
723 DAC960_V2_OperationDevice_T
724 OperationDevice)
725 {
726 DAC960_Command_T *Command = DAC960_AllocateCommand(Controller);
727 DAC960_V2_CommandMailbox_T *CommandMailbox = &Command->V2.CommandMailbox;
728 DAC960_V2_CommandStatus_T CommandStatus;
729 DAC960_V2_ClearCommand(Command);
730 Command->CommandType = DAC960_ImmediateCommand;
731 CommandMailbox->DeviceOperation.CommandOpcode = DAC960_V2_IOCTL;
732 CommandMailbox->DeviceOperation.CommandControlBits
733 .DataTransferControllerToHost = true;
734 CommandMailbox->DeviceOperation.CommandControlBits
735 .NoAutoRequestSense = true;
736 CommandMailbox->DeviceOperation.IOCTL_Opcode = IOCTL_Opcode;
737 CommandMailbox->DeviceOperation.OperationDevice = OperationDevice;
738 DAC960_ExecuteCommand(Command);
739 CommandStatus = Command->V2.CommandStatus;
740 DAC960_DeallocateCommand(Command);
741 return (CommandStatus == DAC960_V2_NormalCompletion);
742 }
743
744
745 /*
746 DAC960_V1_EnableMemoryMailboxInterface enables the Memory Mailbox Interface
747 for DAC960 V1 Firmware Controllers.
748 */
749
750 static boolean DAC960_V1_EnableMemoryMailboxInterface(DAC960_Controller_T
751 *Controller)
752 {
753 void *ControllerBaseAddress = Controller->BaseAddress;
754 DAC960_V1_CommandMailbox_T *CommandMailboxesMemory;
755 DAC960_V1_StatusMailbox_T *StatusMailboxesMemory;
756 DAC960_V1_CommandMailbox_T CommandMailbox;
757 DAC960_V1_CommandStatus_T CommandStatus;
758 unsigned long MemoryMailboxPagesAddress;
759 unsigned long MemoryMailboxPagesOrder;
760 unsigned long MemoryMailboxPagesSize;
761 void *SavedMemoryMailboxesAddress = NULL;
762 short NextCommandMailboxIndex = 0;
763 short NextStatusMailboxIndex = 0;
764 int TimeoutCounter = 1000000, i;
765 MemoryMailboxPagesOrder = 0;
766 MemoryMailboxPagesSize =
767 DAC960_V1_CommandMailboxCount * sizeof(DAC960_V1_CommandMailbox_T) +
768 DAC960_V1_StatusMailboxCount * sizeof(DAC960_V1_StatusMailbox_T);
769 while (MemoryMailboxPagesSize > PAGE_SIZE << MemoryMailboxPagesOrder)
770 MemoryMailboxPagesOrder++;
771 if (Controller->HardwareType == DAC960_LA_Controller)
772 DAC960_LA_RestoreMemoryMailboxInfo(Controller,
773 &SavedMemoryMailboxesAddress,
774 &NextCommandMailboxIndex,
775 &NextStatusMailboxIndex);
776 else DAC960_PG_RestoreMemoryMailboxInfo(Controller,
777 &SavedMemoryMailboxesAddress,
778 &NextCommandMailboxIndex,
779 &NextStatusMailboxIndex);
780 if (SavedMemoryMailboxesAddress == NULL)
781 {
782 MemoryMailboxPagesAddress =
783 __get_free_pages(GFP_KERNEL, MemoryMailboxPagesOrder);
784 Controller->MemoryMailboxPagesAddress = MemoryMailboxPagesAddress;
785 CommandMailboxesMemory =
786 (DAC960_V1_CommandMailbox_T *) MemoryMailboxPagesAddress;
787 }
788 else CommandMailboxesMemory = SavedMemoryMailboxesAddress;
789 if (CommandMailboxesMemory == NULL) return false;
790 Controller->MemoryMailboxPagesOrder = MemoryMailboxPagesOrder;
791 memset(CommandMailboxesMemory, 0, MemoryMailboxPagesSize);
792 Controller->V1.FirstCommandMailbox = CommandMailboxesMemory;
793 CommandMailboxesMemory += DAC960_V1_CommandMailboxCount - 1;
794 Controller->V1.LastCommandMailbox = CommandMailboxesMemory;
795 Controller->V1.NextCommandMailbox =
796 &Controller->V1.FirstCommandMailbox[NextCommandMailboxIndex];
797 if (--NextCommandMailboxIndex < 0)
798 NextCommandMailboxIndex = DAC960_V1_CommandMailboxCount - 1;
799 Controller->V1.PreviousCommandMailbox1 =
800 &Controller->V1.FirstCommandMailbox[NextCommandMailboxIndex];
801 if (--NextCommandMailboxIndex < 0)
802 NextCommandMailboxIndex = DAC960_V1_CommandMailboxCount - 1;
803 Controller->V1.PreviousCommandMailbox2 =
804 &Controller->V1.FirstCommandMailbox[NextCommandMailboxIndex];
805 StatusMailboxesMemory =
806 (DAC960_V1_StatusMailbox_T *) (CommandMailboxesMemory + 1);
807 Controller->V1.FirstStatusMailbox = StatusMailboxesMemory;
808 StatusMailboxesMemory += DAC960_V1_StatusMailboxCount - 1;
809 Controller->V1.LastStatusMailbox = StatusMailboxesMemory;
810 Controller->V1.NextStatusMailbox =
811 &Controller->V1.FirstStatusMailbox[NextStatusMailboxIndex];
812 if (SavedMemoryMailboxesAddress != NULL) return true;
813 /* Enable the Memory Mailbox Interface. */
814 Controller->V1.DualModeMemoryMailboxInterface = true;
815 CommandMailbox.TypeX.CommandOpcode = 0x2B;
816 CommandMailbox.TypeX.CommandIdentifier = 0;
817 CommandMailbox.TypeX.CommandOpcode2 = 0x14;
818 CommandMailbox.TypeX.CommandMailboxesBusAddress =
819 Virtual_to_Bus(Controller->V1.FirstCommandMailbox);
820 CommandMailbox.TypeX.StatusMailboxesBusAddress =
821 Virtual_to_Bus(Controller->V1.FirstStatusMailbox);
822 for (i = 0; i < 2; i++)
823 switch (Controller->HardwareType)
824 {
825 case DAC960_LA_Controller:
826 while (--TimeoutCounter >= 0)
827 {
828 if (!DAC960_LA_HardwareMailboxFullP(ControllerBaseAddress))
829 break;
830 udelay(10);
831 }
832 if (TimeoutCounter < 0) return false;
833 DAC960_LA_WriteHardwareMailbox(ControllerBaseAddress, &CommandMailbox);
834 DAC960_LA_HardwareMailboxNewCommand(ControllerBaseAddress);
835 while (--TimeoutCounter >= 0)
836 {
837 if (DAC960_LA_HardwareMailboxStatusAvailableP(
838 ControllerBaseAddress))
839 break;
840 udelay(10);
841 }
842 if (TimeoutCounter < 0) return false;
843 CommandStatus = DAC960_LA_ReadStatusRegister(ControllerBaseAddress);
844 DAC960_LA_AcknowledgeHardwareMailboxInterrupt(ControllerBaseAddress);
845 DAC960_LA_AcknowledgeHardwareMailboxStatus(ControllerBaseAddress);
846 if (CommandStatus == DAC960_V1_NormalCompletion) return true;
847 Controller->V1.DualModeMemoryMailboxInterface = false;
848 CommandMailbox.TypeX.CommandOpcode2 = 0x10;
849 break;
850 case DAC960_PG_Controller:
851 while (--TimeoutCounter >= 0)
852 {
853 if (!DAC960_PG_HardwareMailboxFullP(ControllerBaseAddress))
854 break;
855 udelay(10);
856 }
857 if (TimeoutCounter < 0) return false;
858 DAC960_PG_WriteHardwareMailbox(ControllerBaseAddress, &CommandMailbox);
859 DAC960_PG_HardwareMailboxNewCommand(ControllerBaseAddress);
860 while (--TimeoutCounter >= 0)
861 {
862 if (DAC960_PG_HardwareMailboxStatusAvailableP(
863 ControllerBaseAddress))
864 break;
865 udelay(10);
866 }
867 if (TimeoutCounter < 0) return false;
868 CommandStatus = DAC960_PG_ReadStatusRegister(ControllerBaseAddress);
869 DAC960_PG_AcknowledgeHardwareMailboxInterrupt(ControllerBaseAddress);
870 DAC960_PG_AcknowledgeHardwareMailboxStatus(ControllerBaseAddress);
871 if (CommandStatus == DAC960_V1_NormalCompletion) return true;
872 Controller->V1.DualModeMemoryMailboxInterface = false;
873 CommandMailbox.TypeX.CommandOpcode2 = 0x10;
874 break;
875 default:
876 break;
877 }
878 return false;
879 }
880
881
882 /*
883 DAC960_V2_EnableMemoryMailboxInterface enables the Memory Mailbox Interface
884 for DAC960 V2 Firmware Controllers.
885 */
886
887 static boolean DAC960_V2_EnableMemoryMailboxInterface(DAC960_Controller_T
888 *Controller)
889 {
890 void *ControllerBaseAddress = Controller->BaseAddress;
891 DAC960_V2_CommandMailbox_T *CommandMailboxesMemory;
892 DAC960_V2_StatusMailbox_T *StatusMailboxesMemory;
893 DAC960_V2_CommandMailbox_T CommandMailbox;
894 DAC960_V2_CommandStatus_T CommandStatus = 0;
895 unsigned long MemoryMailboxPagesAddress;
896 unsigned long MemoryMailboxPagesOrder;
897 unsigned long MemoryMailboxPagesSize;
898 MemoryMailboxPagesOrder = 0;
899 MemoryMailboxPagesSize =
900 DAC960_V2_CommandMailboxCount * sizeof(DAC960_V2_CommandMailbox_T) +
901 DAC960_V2_StatusMailboxCount * sizeof(DAC960_V2_StatusMailbox_T) +
902 sizeof(DAC960_V2_HealthStatusBuffer_T);
903 while (MemoryMailboxPagesSize > PAGE_SIZE << MemoryMailboxPagesOrder)
904 MemoryMailboxPagesOrder++;
905 MemoryMailboxPagesAddress =
906 __get_free_pages(GFP_KERNEL, MemoryMailboxPagesOrder);
907 Controller->MemoryMailboxPagesAddress = MemoryMailboxPagesAddress;
908 CommandMailboxesMemory =
909 (DAC960_V2_CommandMailbox_T *) MemoryMailboxPagesAddress;
910 if (CommandMailboxesMemory == NULL) return false;
911 Controller->MemoryMailboxPagesOrder = MemoryMailboxPagesOrder;
912 memset(CommandMailboxesMemory, 0, MemoryMailboxPagesSize);
913 Controller->V2.FirstCommandMailbox = CommandMailboxesMemory;
914 CommandMailboxesMemory += DAC960_V2_CommandMailboxCount - 1;
915 Controller->V2.LastCommandMailbox = CommandMailboxesMemory;
916 Controller->V2.NextCommandMailbox = Controller->V2.FirstCommandMailbox;
917 Controller->V2.PreviousCommandMailbox1 = Controller->V2.LastCommandMailbox;
918 Controller->V2.PreviousCommandMailbox2 =
919 Controller->V2.LastCommandMailbox - 1;
920 StatusMailboxesMemory =
921 (DAC960_V2_StatusMailbox_T *) (CommandMailboxesMemory + 1);
922 Controller->V2.FirstStatusMailbox = StatusMailboxesMemory;
923 StatusMailboxesMemory += DAC960_V2_StatusMailboxCount - 1;
924 Controller->V2.LastStatusMailbox = StatusMailboxesMemory;
925 Controller->V2.NextStatusMailbox = Controller->V2.FirstStatusMailbox;
926 Controller->V2.HealthStatusBuffer =
927 (DAC960_V2_HealthStatusBuffer_T *) (StatusMailboxesMemory + 1);
928 /* Enable the Memory Mailbox Interface. */
929 memset(&CommandMailbox, 0, sizeof(DAC960_V2_CommandMailbox_T));
930 CommandMailbox.SetMemoryMailbox.CommandIdentifier = 1;
931 CommandMailbox.SetMemoryMailbox.CommandOpcode = DAC960_V2_IOCTL;
932 CommandMailbox.SetMemoryMailbox.CommandControlBits.NoAutoRequestSense = true;
933 CommandMailbox.SetMemoryMailbox.FirstCommandMailboxSizeKB =
934 (DAC960_V2_CommandMailboxCount * sizeof(DAC960_V2_CommandMailbox_T)) >> 10;
935 CommandMailbox.SetMemoryMailbox.FirstStatusMailboxSizeKB =
936 (DAC960_V2_StatusMailboxCount * sizeof(DAC960_V2_StatusMailbox_T)) >> 10;
937 CommandMailbox.SetMemoryMailbox.SecondCommandMailboxSizeKB = 0;
938 CommandMailbox.SetMemoryMailbox.SecondStatusMailboxSizeKB = 0;
939 CommandMailbox.SetMemoryMailbox.RequestSenseSize = 0;
940 CommandMailbox.SetMemoryMailbox.IOCTL_Opcode = DAC960_V2_SetMemoryMailbox;
941 CommandMailbox.SetMemoryMailbox.HealthStatusBufferSizeKB = 1;
942 CommandMailbox.SetMemoryMailbox.HealthStatusBufferBusAddress =
943 Virtual_to_Bus(Controller->V2.HealthStatusBuffer);
944 CommandMailbox.SetMemoryMailbox.FirstCommandMailboxBusAddress =
945 Virtual_to_Bus(Controller->V2.FirstCommandMailbox);
946 CommandMailbox.SetMemoryMailbox.FirstStatusMailboxBusAddress =
947 Virtual_to_Bus(Controller->V2.FirstStatusMailbox);
948 switch (Controller->HardwareType)
949 {
950 case DAC960_BA_Controller:
951 while (DAC960_BA_HardwareMailboxFullP(ControllerBaseAddress))
952 udelay(1);
953 DAC960_BA_WriteHardwareMailbox(ControllerBaseAddress, &CommandMailbox);
954 DAC960_BA_HardwareMailboxNewCommand(ControllerBaseAddress);
955 while (!DAC960_BA_HardwareMailboxStatusAvailableP(ControllerBaseAddress))
956 udelay(1);
957 CommandStatus = DAC960_BA_ReadCommandStatus(ControllerBaseAddress);
958 DAC960_BA_AcknowledgeHardwareMailboxInterrupt(ControllerBaseAddress);
959 DAC960_BA_AcknowledgeHardwareMailboxStatus(ControllerBaseAddress);
960 break;
961 case DAC960_LP_Controller:
962 while (DAC960_LP_HardwareMailboxFullP(ControllerBaseAddress))
963 udelay(1);
964 DAC960_LP_WriteHardwareMailbox(ControllerBaseAddress, &CommandMailbox);
965 DAC960_LP_HardwareMailboxNewCommand(ControllerBaseAddress);
966 while (!DAC960_LP_HardwareMailboxStatusAvailableP(ControllerBaseAddress))
967 udelay(1);
968 CommandStatus = DAC960_LP_ReadCommandStatus(ControllerBaseAddress);
969 DAC960_LP_AcknowledgeHardwareMailboxInterrupt(ControllerBaseAddress);
970 DAC960_LP_AcknowledgeHardwareMailboxStatus(ControllerBaseAddress);
971 break;
972 default:
973 break;
974 }
975 return (CommandStatus == DAC960_V2_NormalCompletion);
976 }
977
978
979 /*
980 DAC960_V1_ReadControllerConfiguration reads the Configuration Information
981 from DAC960 V1 Firmware Controllers and initializes the Controller structure.
982 */
983
984 static boolean DAC960_V1_ReadControllerConfiguration(DAC960_Controller_T
985 *Controller)
986 {
987 DAC960_V1_Enquiry2_T Enquiry2;
988 DAC960_V1_Config2_T Config2;
989 int LogicalDriveNumber, Channel, TargetID;
990 if (!DAC960_V1_ExecuteType3(Controller, DAC960_V1_Enquiry,
991 &Controller->V1.Enquiry))
992 return DAC960_Failure(Controller, "ENQUIRY");
993 if (!DAC960_V1_ExecuteType3(Controller, DAC960_V1_Enquiry2, &Enquiry2))
994 return DAC960_Failure(Controller, "ENQUIRY2");
995 if (!DAC960_V1_ExecuteType3(Controller, DAC960_V1_ReadConfig2, &Config2))
996 return DAC960_Failure(Controller, "READ CONFIG2");
997 if (!DAC960_V1_ExecuteType3(Controller, DAC960_V1_GetLogicalDriveInformation,
998 &Controller->V1.LogicalDriveInformation))
999 return DAC960_Failure(Controller, "GET LOGICAL DRIVE INFORMATION");
1000 for (Channel = 0; Channel < Enquiry2.ActualChannels; Channel++)
1001 for (TargetID = 0; TargetID < Enquiry2.MaxTargets; TargetID++)
1002 if (!DAC960_V1_ExecuteType3D(Controller, DAC960_V1_GetDeviceState,
1003 Channel, TargetID,
1004 &Controller->V1.DeviceState
1005 [Channel][TargetID]))
1006 return DAC960_Failure(Controller, "GET DEVICE STATE");
1007 /*
1008 Initialize the Controller Model Name and Full Model Name fields.
1009 */
1010 switch (Enquiry2.HardwareID.SubModel)
1011 {
1012 case DAC960_V1_P_PD_PU:
1013 if (Enquiry2.SCSICapability.BusSpeed == DAC960_V1_Ultra)
1014 strcpy(Controller->ModelName, "DAC960PU");
1015 else strcpy(Controller->ModelName, "DAC960PD");
1016 break;
1017 case DAC960_V1_PL:
1018 strcpy(Controller->ModelName, "DAC960PL");
1019 break;
1020 case DAC960_V1_PG:
1021 strcpy(Controller->ModelName, "DAC960PG");
1022 break;
1023 case DAC960_V1_PJ:
1024 strcpy(Controller->ModelName, "DAC960PJ");
1025 break;
1026 case DAC960_V1_PR:
1027 strcpy(Controller->ModelName, "DAC960PR");
1028 break;
1029 case DAC960_V1_PT:
1030 strcpy(Controller->ModelName, "DAC960PT");
1031 break;
1032 case DAC960_V1_PTL0:
1033 strcpy(Controller->ModelName, "DAC960PTL0");
1034 break;
1035 case DAC960_V1_PRL:
1036 strcpy(Controller->ModelName, "DAC960PRL");
1037 break;
1038 case DAC960_V1_PTL1:
1039 strcpy(Controller->ModelName, "DAC960PTL1");
1040 break;
1041 case DAC960_V1_1164P:
1042 strcpy(Controller->ModelName, "DAC1164P");
1043 break;
1044 default:
1045 return DAC960_Failure(Controller, "MODEL VERIFICATION");
1046 }
1047 strcpy(Controller->FullModelName, "Mylex ");
1048 strcat(Controller->FullModelName, Controller->ModelName);
1049 /*
1050 Initialize the Controller Firmware Version field and verify that it
1051 is a supported firmware version. The supported firmware versions are:
1052
1053 DAC1164P 5.06 and above
1054 DAC960PTL/PRL/PJ/PG 4.06 and above
1055 DAC960PU/PD/PL 3.51 and above
1056 */
1057 sprintf(Controller->FirmwareVersion, "%d.%02d-%c-%02d",
1058 Enquiry2.FirmwareID.MajorVersion, Enquiry2.FirmwareID.MinorVersion,
1059 Enquiry2.FirmwareID.FirmwareType, Enquiry2.FirmwareID.TurnID);
1060 if (!((Controller->FirmwareVersion[0] == '5' &&
1061 strcmp(Controller->FirmwareVersion, "5.06") >= 0) ||
1062 (Controller->FirmwareVersion[0] == '4' &&
1063 strcmp(Controller->FirmwareVersion, "4.06") >= 0) ||
1064 (Controller->FirmwareVersion[0] == '3' &&
1065 strcmp(Controller->FirmwareVersion, "3.51") >= 0)))
1066 {
1067 DAC960_Failure(Controller, "FIRMWARE VERSION VERIFICATION");
1068 DAC960_Error("Firmware Version = '%s'\n", Controller,
1069 Controller->FirmwareVersion);
1070 return false;
1071 }
1072 /*
1073 Initialize the Controller Channels, Targets, Memory Size, and SAF-TE
1074 Enclosure Management Enabled fields.
1075 */
1076 Controller->Channels = Enquiry2.ActualChannels;
1077 Controller->Targets = Enquiry2.MaxTargets;
1078 Controller->MemorySize = Enquiry2.MemorySize >> 20;
1079 Controller->V1.SAFTE_EnclosureManagementEnabled =
1080 (Enquiry2.FaultManagementType == DAC960_V1_SAFTE);
1081 /*
1082 Initialize the Controller Queue Depth, Driver Queue Depth, Logical Drive
1083 Count, Maximum Blocks per Command, Controller Scatter/Gather Limit, and
1084 Driver Scatter/Gather Limit. The Driver Queue Depth must be at most one
1085 less than the Controller Queue Depth to allow for an automatic drive
1086 rebuild operation.
1087 */
1088 Controller->ControllerQueueDepth = Controller->V1.Enquiry.MaxCommands;
1089 Controller->DriverQueueDepth = Controller->ControllerQueueDepth - 1;
1090 if (Controller->DriverQueueDepth > DAC960_MaxDriverQueueDepth)
1091 Controller->DriverQueueDepth = DAC960_MaxDriverQueueDepth;
1092 Controller->LogicalDriveCount =
1093 Controller->V1.Enquiry.NumberOfLogicalDrives;
1094 Controller->MaxBlocksPerCommand = Enquiry2.MaxBlocksPerCommand;
1095 Controller->ControllerScatterGatherLimit = Enquiry2.MaxScatterGatherEntries;
1096 Controller->DriverScatterGatherLimit =
1097 Controller->ControllerScatterGatherLimit;
1098 if (Controller->DriverScatterGatherLimit > DAC960_V1_ScatterGatherLimit)
1099 Controller->DriverScatterGatherLimit = DAC960_V1_ScatterGatherLimit;
1100 /*
1101 Initialize the Stripe Size, Segment Size, and Geometry Translation.
1102 */
1103 Controller->V1.StripeSize = Config2.BlocksPerStripe * Config2.BlockFactor
1104 >> (10 - DAC960_BlockSizeBits);
1105 Controller->V1.SegmentSize = Config2.BlocksPerCacheLine * Config2.BlockFactor
1106 >> (10 - DAC960_BlockSizeBits);
1107 switch (Config2.DriveGeometry)
1108 {
1109 case DAC960_V1_Geometry_128_32:
1110 Controller->V1.GeometryTranslationHeads = 128;
1111 Controller->V1.GeometryTranslationSectors = 32;
1112 break;
1113 case DAC960_V1_Geometry_255_63:
1114 Controller->V1.GeometryTranslationHeads = 255;
1115 Controller->V1.GeometryTranslationSectors = 63;
1116 break;
1117 default:
1118 return DAC960_Failure(Controller, "CONFIG2 DRIVE GEOMETRY");
1119 }
1120 /*
1121 Initialize the Logical Drive Initially Accessible flag.
1122 */
1123 for (LogicalDriveNumber = 0;
1124 LogicalDriveNumber < Controller->LogicalDriveCount;
1125 LogicalDriveNumber++)
1126 if (Controller->V1.LogicalDriveInformation
1127 [LogicalDriveNumber].LogicalDriveState !=
1128 DAC960_V1_LogicalDrive_Offline)
1129 Controller->LogicalDriveInitiallyAccessible[LogicalDriveNumber] = true;
1130 Controller->V1.LastRebuildStatus = DAC960_V1_NoRebuildOrCheckInProgress;
1131 return true;
1132 }
1133
1134
1135 /*
1136 DAC960_V2_ReadControllerConfiguration reads the Configuration Information
1137 from DAC960 V2 Firmware Controllers and initializes the Controller structure.
1138 */
1139
1140 static boolean DAC960_V2_ReadControllerConfiguration(DAC960_Controller_T
1141 *Controller)
1142 {
1143 DAC960_V2_ControllerInfo_T *ControllerInfo =
1144 &Controller->V2.ControllerInformation;
1145 unsigned short LogicalDeviceNumber = 0;
1146 int ModelNameLength;
1147 if (!DAC960_V2_ControllerInfo(Controller, DAC960_V2_GetControllerInfo,
1148 ControllerInfo,
1149 sizeof(DAC960_V2_ControllerInfo_T)))
1150 return DAC960_Failure(Controller, "GET CONTROLLER INFO");
1151 if (!DAC960_V2_GeneralInfo(Controller, DAC960_V2_GetHealthStatus,
1152 Controller->V2.HealthStatusBuffer,
1153 sizeof(DAC960_V2_HealthStatusBuffer_T)))
1154 return DAC960_Failure(Controller, "GET HEALTH STATUS");
1155 /*
1156 Initialize the Controller Model Name and Full Model Name fields.
1157 */
1158 ModelNameLength = sizeof(ControllerInfo->ControllerName);
1159 if (ModelNameLength > sizeof(Controller->ModelName)-1)
1160 ModelNameLength = sizeof(Controller->ModelName)-1;
1161 memcpy(Controller->ModelName, ControllerInfo->ControllerName,
1162 ModelNameLength);
1163 ModelNameLength--;
1164 while (Controller->ModelName[ModelNameLength] == ' ' ||
1165 Controller->ModelName[ModelNameLength] == '\0')
1166 ModelNameLength--;
1167 Controller->ModelName[++ModelNameLength] = '\0';
1168 strcpy(Controller->FullModelName, "Mylex ");
1169 strcat(Controller->FullModelName, Controller->ModelName);
1170 /*
1171 Initialize the Controller Firmware Version field.
1172 */
1173 sprintf(Controller->FirmwareVersion, "%d.%02d-%02d",
1174 ControllerInfo->FirmwareMajorVersion,
1175 ControllerInfo->FirmwareMinorVersion,
1176 ControllerInfo->FirmwareTurnNumber);
1177 if (ControllerInfo->FirmwareMajorVersion == 6 &&
1178 ControllerInfo->FirmwareMinorVersion == 0 &&
1179 ControllerInfo->FirmwareTurnNumber < 1)
1180 {
1181 DAC960_Info("FIRMWARE VERSION %s DOES NOT PROVIDE THE CONTROLLER\n",
1182 Controller, Controller->FirmwareVersion);
1183 DAC960_Info("STATUS MONITORING FUNCTIONALITY NEEDED BY THIS DRIVER.\n",
1184 Controller);
1185 DAC960_Info("PLEASE UPGRADE TO VERSION 6.00-01 OR ABOVE.\n",
1186 Controller);
1187 }
1188 /*
1189 Initialize the Controller Channels, Targets, and Memory Size.
1190 */
1191 Controller->Channels = ControllerInfo->NumberOfPhysicalChannelsPresent;
1192 Controller->Targets =
1193 ControllerInfo->MaximumTargetsPerChannel
1194 [ControllerInfo->NumberOfPhysicalChannelsPresent-1];
1195 Controller->MemorySize = ControllerInfo->MemorySizeMB;
1196 /*
1197 Initialize the Controller Queue Depth, Driver Queue Depth, Logical Drive
1198 Count, Maximum Blocks per Command, Controller Scatter/Gather Limit, and
1199 Driver Scatter/Gather Limit. The Driver Queue Depth must be at most one
1200 less than the Controller Queue Depth to allow for an automatic drive
1201 rebuild operation.
1202 */
1203 Controller->ControllerQueueDepth = ControllerInfo->MaximumParallelCommands;
1204 Controller->DriverQueueDepth = Controller->ControllerQueueDepth - 1;
1205 if (Controller->DriverQueueDepth > DAC960_MaxDriverQueueDepth)
1206 Controller->DriverQueueDepth = DAC960_MaxDriverQueueDepth;
1207 Controller->LogicalDriveCount = ControllerInfo->LogicalDevicesPresent;
1208 Controller->MaxBlocksPerCommand =
1209 ControllerInfo->MaximumDataTransferSizeInBlocks;
1210 Controller->ControllerScatterGatherLimit =
1211 ControllerInfo->MaximumScatterGatherEntries;
1212 Controller->DriverScatterGatherLimit =
1213 Controller->ControllerScatterGatherLimit;
1214 if (Controller->DriverScatterGatherLimit > DAC960_V2_ScatterGatherLimit)
1215 Controller->DriverScatterGatherLimit = DAC960_V2_ScatterGatherLimit;
1216 /*
1217 Initialize the Logical Device Information.
1218 */
1219 while (true)
1220 {
1221 DAC960_V2_LogicalDeviceInfo_T *NewLogicalDeviceInfo =
1222 &Controller->V2.NewLogicalDeviceInformation;
1223 DAC960_V2_LogicalDeviceInfo_T *LogicalDeviceInfo;
1224 DAC960_V2_PhysicalDevice_T PhysicalDevice;
1225 if (!DAC960_V2_LogicalDeviceInfo(Controller,
1226 DAC960_V2_GetLogicalDeviceInfoValid,
1227 LogicalDeviceNumber,
1228 NewLogicalDeviceInfo,
1229 sizeof(DAC960_V2_LogicalDeviceInfo_T)))
1230 break;
1231 LogicalDeviceNumber = NewLogicalDeviceInfo->LogicalDeviceNumber;
1232 if (LogicalDeviceNumber > DAC960_MaxLogicalDrives)
1233 panic("DAC960: Logical Drive Number %d not supported\n",
1234 LogicalDeviceNumber);
1235 if (NewLogicalDeviceInfo->DeviceBlockSizeInBytes != DAC960_BlockSize)
1236 panic("DAC960: Logical Drive Block Size %d not supported\n",
1237 NewLogicalDeviceInfo->DeviceBlockSizeInBytes);
1238 PhysicalDevice.Controller = 0;
1239 PhysicalDevice.Channel = NewLogicalDeviceInfo->Channel;
1240 PhysicalDevice.TargetID = NewLogicalDeviceInfo->TargetID;
1241 PhysicalDevice.LogicalUnit = NewLogicalDeviceInfo->LogicalUnit;
1242 Controller->V2.LogicalDriveToVirtualDevice[LogicalDeviceNumber] =
1243 PhysicalDevice;
1244 if (NewLogicalDeviceInfo->LogicalDeviceState !=
1245 DAC960_V2_LogicalDevice_Offline)
1246 Controller->LogicalDriveInitiallyAccessible[LogicalDeviceNumber] = true;
1247 LogicalDeviceInfo = (DAC960_V2_LogicalDeviceInfo_T *)
1248 kmalloc(sizeof(DAC960_V2_LogicalDeviceInfo_T), GFP_ATOMIC);
1249 if (LogicalDeviceInfo == NULL)
1250 return DAC960_Failure(Controller, "LOGICAL DEVICE ALLOCATION");
1251 Controller->V2.LogicalDeviceInformation[LogicalDeviceNumber] =
1252 LogicalDeviceInfo;
1253 memcpy(LogicalDeviceInfo, NewLogicalDeviceInfo,
1254 sizeof(DAC960_V2_LogicalDeviceInfo_T));
1255 LogicalDeviceNumber++;
1256 }
1257 return true;
1258 }
1259
1260
1261 /*
1262 DAC960_ReportControllerConfiguration reports the Configuration Information
1263 for Controller.
1264 */
1265
1266 static boolean DAC960_ReportControllerConfiguration(DAC960_Controller_T
1267 *Controller)
1268 {
1269 DAC960_Info("Configuring Mylex %s PCI RAID Controller\n",
1270 Controller, Controller->ModelName);
1271 DAC960_Info(" Firmware Version: %s, Channels: %d, Memory Size: %dMB\n",
1272 Controller, Controller->FirmwareVersion,
1273 Controller->Channels, Controller->MemorySize);
1274 DAC960_Info(" PCI Bus: %d, Device: %d, Function: %d, I/O Address: ",
1275 Controller, Controller->Bus,
1276 Controller->Device, Controller->Function);
1277 if (Controller->IO_Address == 0)
1278 DAC960_Info("Unassigned\n", Controller);
1279 else DAC960_Info("0x%X\n", Controller, Controller->IO_Address);
1280 DAC960_Info(" PCI Address: 0x%X mapped at 0x%lX, IRQ Channel: %d\n",
1281 Controller, Controller->PCI_Address,
1282 (unsigned long) Controller->BaseAddress,
1283 Controller->IRQ_Channel);
1284 DAC960_Info(" Controller Queue Depth: %d, "
1285 "Maximum Blocks per Command: %d\n",
1286 Controller, Controller->ControllerQueueDepth,
1287 Controller->MaxBlocksPerCommand);
1288 DAC960_Info(" Driver Queue Depth: %d, "
1289 "Scatter/Gather Limit: %d of %d Segments\n",
1290 Controller, Controller->DriverQueueDepth,
1291 Controller->DriverScatterGatherLimit,
1292 Controller->ControllerScatterGatherLimit);
1293 if (Controller->FirmwareType == DAC960_V1_Controller)
1294 {
1295 DAC960_Info(" Stripe Size: %dKB, Segment Size: %dKB, "
1296 "BIOS Geometry: %d/%d\n", Controller,
1297 Controller->V1.StripeSize,
1298 Controller->V1.SegmentSize,
1299 Controller->V1.GeometryTranslationHeads,
1300 Controller->V1.GeometryTranslationSectors);
1301 if (Controller->V1.SAFTE_EnclosureManagementEnabled)
1302 DAC960_Info(" SAF-TE Enclosure Management Enabled\n", Controller);
1303 }
1304 return true;
1305 }
1306
1307
1308 /*
1309 DAC960_V1_ReadDeviceConfiguration reads the Device Configuration Information
1310 for DAC960 V1 Firmware Controllers by requesting the SCSI Inquiry and SCSI
1311 Inquiry Unit Serial Number information for each device connected to
1312 Controller.
1313 */
1314
1315 static boolean DAC960_V1_ReadDeviceConfiguration(DAC960_Controller_T
1316 *Controller)
1317 {
1318 DAC960_V1_DCDB_T DCDBs[DAC960_V1_MaxChannels], *DCDB;
1319 Semaphore_T Semaphores[DAC960_V1_MaxChannels], *Semaphore;
1320 unsigned long ProcessorFlags;
1321 int Channel, TargetID;
1322 for (TargetID = 0; TargetID < Controller->Targets; TargetID++)
1323 {
1324 for (Channel = 0; Channel < Controller->Channels; Channel++)
1325 {
1326 DAC960_Command_T *Command = Controller->Commands[Channel];
1327 DAC960_SCSI_Inquiry_T *InquiryStandardData =
1328 &Controller->V1.InquiryStandardData[Channel][TargetID];
1329 InquiryStandardData->PeripheralDeviceType = 0x1F;
1330 Semaphore = &Semaphores[Channel];
1331 init_MUTEX_LOCKED(Semaphore);
1332 DCDB = &DCDBs[Channel];
1333 DAC960_V1_ClearCommand(Command);
1334 Command->CommandType = DAC960_ImmediateCommand;
1335 Command->Semaphore = Semaphore;
1336 Command->V1.CommandMailbox.Type3.CommandOpcode = DAC960_V1_DCDB;
1337 Command->V1.CommandMailbox.Type3.BusAddress = Virtual_to_Bus(DCDB);
1338 DCDB->Channel = Channel;
1339 DCDB->TargetID = TargetID;
1340 DCDB->Direction = DAC960_V1_DCDB_DataTransferDeviceToSystem;
1341 DCDB->EarlyStatus = false;
1342 DCDB->Timeout = DAC960_V1_DCDB_Timeout_10_seconds;
1343 DCDB->NoAutomaticRequestSense = false;
1344 DCDB->DisconnectPermitted = true;
1345 DCDB->TransferLength = sizeof(DAC960_SCSI_Inquiry_T);
1346 DCDB->BusAddress = Virtual_to_Bus(InquiryStandardData);
1347 DCDB->CDBLength = 6;
1348 DCDB->TransferLengthHigh4 = 0;
1349 DCDB->SenseLength = sizeof(DCDB->SenseData);
1350 DCDB->CDB[0] = 0x12; /* INQUIRY */
1351 DCDB->CDB[1] = 0; /* EVPD = 0 */
1352 DCDB->CDB[2] = 0; /* Page Code */
1353 DCDB->CDB[3] = 0; /* Reserved */
1354 DCDB->CDB[4] = sizeof(DAC960_SCSI_Inquiry_T);
1355 DCDB->CDB[5] = 0; /* Control */
1356 DAC960_AcquireControllerLock(Controller, &ProcessorFlags);
1357 DAC960_QueueCommand(Command);
1358 DAC960_ReleaseControllerLock(Controller, &ProcessorFlags);
1359 }
1360 for (Channel = 0; Channel < Controller->Channels; Channel++)
1361 {
1362 DAC960_Command_T *Command = Controller->Commands[Channel];
1363 DAC960_SCSI_Inquiry_UnitSerialNumber_T *InquiryUnitSerialNumber =
1364 &Controller->V1.InquiryUnitSerialNumber[Channel][TargetID];
1365 InquiryUnitSerialNumber->PeripheralDeviceType = 0x1F;
1366 Semaphore = &Semaphores[Channel];
1367 down(Semaphore);
1368 if (Command->V1.CommandStatus != DAC960_V1_NormalCompletion)
1369 continue;
1370 Command->Semaphore = Semaphore;
1371 DCDB = &DCDBs[Channel];
1372 DCDB->TransferLength = sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T);
1373 DCDB->BusAddress = Virtual_to_Bus(InquiryUnitSerialNumber);
1374 DCDB->SenseLength = sizeof(DCDB->SenseData);
1375 DCDB->CDB[0] = 0x12; /* INQUIRY */
1376 DCDB->CDB[1] = 1; /* EVPD = 1 */
1377 DCDB->CDB[2] = 0x80; /* Page Code */
1378 DCDB->CDB[3] = 0; /* Reserved */
1379 DCDB->CDB[4] = sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T);
1380 DCDB->CDB[5] = 0; /* Control */
1381 DAC960_AcquireControllerLock(Controller, &ProcessorFlags);
1382 DAC960_QueueCommand(Command);
1383 DAC960_ReleaseControllerLock(Controller, &ProcessorFlags);
1384 down(Semaphore);
1385 }
1386 }
1387 return true;
1388 }
1389
1390
1391 /*
1392 DAC960_V2_ReadDeviceConfiguration reads the Device Configuration Information
1393 for DAC960 V2 Firmware Controllers by requesting the Physical Device
1394 Information and SCSI Inquiry Unit Serial Number information for each
1395 device connected to Controller.
1396 */
1397
1398 static boolean DAC960_V2_ReadDeviceConfiguration(DAC960_Controller_T
1399 *Controller)
1400 {
1401 unsigned char Channel = 0, TargetID = 0, LogicalUnit = 0;
1402 unsigned short PhysicalDeviceIndex = 0;
1403 while (true)
1404 {
1405 DAC960_V2_PhysicalDeviceInfo_T *NewPhysicalDeviceInfo =
1406 &Controller->V2.NewPhysicalDeviceInformation;
1407 DAC960_V2_PhysicalDeviceInfo_T *PhysicalDeviceInfo;
1408 DAC960_SCSI_Inquiry_UnitSerialNumber_T *InquiryUnitSerialNumber;
1409 DAC960_Command_T *Command;
1410 DAC960_V2_CommandMailbox_T *CommandMailbox;
1411 if (!DAC960_V2_PhysicalDeviceInfo(Controller,
1412 DAC960_V2_GetPhysicalDeviceInfoValid,
1413 Channel,
1414 TargetID,
1415 LogicalUnit,
1416 NewPhysicalDeviceInfo,
1417 sizeof(DAC960_V2_PhysicalDeviceInfo_T)))
1418 break;
1419 Channel = NewPhysicalDeviceInfo->Channel;
1420 TargetID = NewPhysicalDeviceInfo->TargetID;
1421 LogicalUnit = NewPhysicalDeviceInfo->LogicalUnit;
1422 PhysicalDeviceInfo = (DAC960_V2_PhysicalDeviceInfo_T *)
1423 kmalloc(sizeof(DAC960_V2_PhysicalDeviceInfo_T), GFP_ATOMIC);
1424 if (PhysicalDeviceInfo == NULL)
1425 return DAC960_Failure(Controller, "PHYSICAL DEVICE ALLOCATION");
1426 Controller->V2.PhysicalDeviceInformation[PhysicalDeviceIndex] =
1427 PhysicalDeviceInfo;
1428 memcpy(PhysicalDeviceInfo, NewPhysicalDeviceInfo,
1429 sizeof(DAC960_V2_PhysicalDeviceInfo_T));
1430 InquiryUnitSerialNumber = (DAC960_SCSI_Inquiry_UnitSerialNumber_T *)
1431 kmalloc(sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T), GFP_ATOMIC);
1432 if (InquiryUnitSerialNumber == NULL)
1433 return DAC960_Failure(Controller, "SERIAL NUMBER ALLOCATION");
1434 Controller->V2.InquiryUnitSerialNumber[PhysicalDeviceIndex] =
1435 InquiryUnitSerialNumber;
1436 memset(InquiryUnitSerialNumber, 0,
1437 sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T));
1438 InquiryUnitSerialNumber->PeripheralDeviceType = 0x1F;
1439 Command = DAC960_AllocateCommand(Controller);
1440 CommandMailbox = &Command->V2.CommandMailbox;
1441 DAC960_V2_ClearCommand(Command);
1442 Command->CommandType = DAC960_ImmediateCommand;
1443 CommandMailbox->SCSI_10.CommandOpcode = DAC960_V2_SCSI_10_Passthru;
1444 CommandMailbox->SCSI_10.CommandControlBits
1445 .DataTransferControllerToHost = true;
1446 CommandMailbox->SCSI_10.CommandControlBits
1447 .NoAutoRequestSense = true;
1448 CommandMailbox->SCSI_10.DataTransferSize =
1449 sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T);
1450 CommandMailbox->SCSI_10.PhysicalDevice.LogicalUnit = LogicalUnit;
1451 CommandMailbox->SCSI_10.PhysicalDevice.TargetID = TargetID;
1452 CommandMailbox->SCSI_10.PhysicalDevice.Channel = Channel;
1453 CommandMailbox->SCSI_10.CDBLength = 6;
1454 CommandMailbox->SCSI_10.SCSI_CDB[0] = 0x12; /* INQUIRY */
1455 CommandMailbox->SCSI_10.SCSI_CDB[1] = 1; /* EVPD = 1 */
1456 CommandMailbox->SCSI_10.SCSI_CDB[2] = 0x80; /* Page Code */
1457 CommandMailbox->SCSI_10.SCSI_CDB[3] = 0; /* Reserved */
1458 CommandMailbox->SCSI_10.SCSI_CDB[4] =
1459 sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T);
1460 CommandMailbox->SCSI_10.SCSI_CDB[5] = 0; /* Control */
1461 CommandMailbox->SCSI_10.DataTransferMemoryAddress
1462 .ScatterGatherSegments[0]
1463 .SegmentDataPointer =
1464 Virtual_to_Bus(InquiryUnitSerialNumber);
1465 CommandMailbox->SCSI_10.DataTransferMemoryAddress
1466 .ScatterGatherSegments[0]
1467 .SegmentByteCount =
1468 CommandMailbox->SCSI_10.DataTransferSize;
1469 DAC960_ExecuteCommand(Command);
1470 DAC960_DeallocateCommand(Command);
1471 PhysicalDeviceIndex++;
1472 LogicalUnit++;
1473 }
1474 return true;
1475 }
1476
1477
1478 /*
1479 DAC960_SanitizeInquiryData sanitizes the Vendor, Model, Revision, and
1480 Product Serial Number fields of the Inquiry Standard Data and Inquiry
1481 Unit Serial Number structures.
1482 */
1483
1484 static void DAC960_SanitizeInquiryData(DAC960_SCSI_Inquiry_T
1485 *InquiryStandardData,
1486 DAC960_SCSI_Inquiry_UnitSerialNumber_T
1487 *InquiryUnitSerialNumber,
1488 unsigned char *Vendor,
1489 unsigned char *Model,
1490 unsigned char *Revision,
1491 unsigned char *SerialNumber)
1492 {
1493 int SerialNumberLength, i;
1494 if (InquiryStandardData->PeripheralDeviceType == 0x1F) return;
1495 for (i = 0; i < sizeof(InquiryStandardData->VendorIdentification); i++)
1496 {
1497 unsigned char VendorCharacter =
1498 InquiryStandardData->VendorIdentification[i];
1499 Vendor[i] = (VendorCharacter >= ' ' && VendorCharacter <= '~'
1500 ? VendorCharacter : ' ');
1501 }
1502 Vendor[sizeof(InquiryStandardData->VendorIdentification)] = '\0';
1503 for (i = 0; i < sizeof(InquiryStandardData->ProductIdentification); i++)
1504 {
1505 unsigned char ModelCharacter =
1506 InquiryStandardData->ProductIdentification[i];
1507 Model[i] = (ModelCharacter >= ' ' && ModelCharacter <= '~'
1508 ? ModelCharacter : ' ');
1509 }
1510 Model[sizeof(InquiryStandardData->ProductIdentification)] = '\0';
1511 for (i = 0; i < sizeof(InquiryStandardData->ProductRevisionLevel); i++)
1512 {
1513 unsigned char RevisionCharacter =
1514 InquiryStandardData->ProductRevisionLevel[i];
1515 Revision[i] = (RevisionCharacter >= ' ' && RevisionCharacter <= '~'
1516 ? RevisionCharacter : ' ');
1517 }
1518 Revision[sizeof(InquiryStandardData->ProductRevisionLevel)] = '\0';
1519 if (InquiryUnitSerialNumber->PeripheralDeviceType == 0x1F) return;
1520 SerialNumberLength = InquiryUnitSerialNumber->PageLength;
1521 if (SerialNumberLength >
1522 sizeof(InquiryUnitSerialNumber->ProductSerialNumber))
1523 SerialNumberLength = sizeof(InquiryUnitSerialNumber->ProductSerialNumber);
1524 for (i = 0; i < SerialNumberLength; i++)
1525 {
1526 unsigned char SerialNumberCharacter =
1527 InquiryUnitSerialNumber->ProductSerialNumber[i];
1528 SerialNumber[i] =
1529 (SerialNumberCharacter >= ' ' && SerialNumberCharacter <= '~'
1530 ? SerialNumberCharacter : ' ');
1531 }
1532 SerialNumber[SerialNumberLength] = '\0';
1533 }
1534
1535
1536 /*
1537 DAC960_V1_ReportDeviceConfiguration reports the Device Configuration
1538 Information for DAC960 V1 Firmware Controllers.
1539 */
1540
1541 static boolean DAC960_V1_ReportDeviceConfiguration(DAC960_Controller_T
1542 *Controller)
1543 {
1544 int LogicalDriveNumber, Channel, TargetID;
1545 DAC960_Info(" Physical Devices:\n", Controller);
1546 for (Channel = 0; Channel < Controller->Channels; Channel++)
1547 for (TargetID = 0; TargetID < Controller->Targets; TargetID++)
1548 {
1549 DAC960_SCSI_Inquiry_T *InquiryStandardData =
1550 &Controller->V1.InquiryStandardData[Channel][TargetID];
1551 DAC960_SCSI_Inquiry_UnitSerialNumber_T *InquiryUnitSerialNumber =
1552 &Controller->V1.InquiryUnitSerialNumber[Channel][TargetID];
1553 DAC960_V1_DeviceState_T *DeviceState =
1554 &Controller->V1.DeviceState[Channel][TargetID];
1555 DAC960_V1_ErrorTableEntry_T *ErrorEntry =
1556 &Controller->V1.ErrorTable.ErrorTableEntries[Channel][TargetID];
1557 char Vendor[1+sizeof(InquiryStandardData->VendorIdentification)];
1558 char Model[1+sizeof(InquiryStandardData->ProductIdentification)];
1559 char Revision[1+sizeof(InquiryStandardData->ProductRevisionLevel)];
1560 char SerialNumber[1+sizeof(InquiryUnitSerialNumber
1561 ->ProductSerialNumber)];
1562 if (InquiryStandardData->PeripheralDeviceType == 0x1F) continue;
1563 DAC960_SanitizeInquiryData(InquiryStandardData, InquiryUnitSerialNumber,
1564 Vendor, Model, Revision, SerialNumber);
1565 DAC960_Info(" %d:%d%s Vendor: %s Model: %s Revision: %s\n",
1566 Controller, Channel, TargetID, (TargetID < 10 ? " " : ""),
1567 Vendor, Model, Revision);
1568 if (InquiryUnitSerialNumber->PeripheralDeviceType != 0x1F)
1569 DAC960_Info(" Serial Number: %s\n", Controller, SerialNumber);
1570 if (DeviceState->Present &&
1571 DeviceState->DeviceType == DAC960_V1_DiskType)
1572 {
1573 if (Controller->V1.DeviceResetCount[Channel][TargetID] > 0)
1574 DAC960_Info(" Disk Status: %s, %d blocks, %d resets\n",
1575 Controller,
1576 (DeviceState->DeviceState == DAC960_V1_Device_Dead
1577 ? "Dead"
1578 : DeviceState->DeviceState
1579 == DAC960_V1_Device_WriteOnly
1580 ? "Write-Only"
1581 : DeviceState->DeviceState
1582 == DAC960_V1_Device_Online
1583 ? "Online" : "Standby"),
1584 DeviceState->DiskSize,
1585 Controller->V1.DeviceResetCount[Channel][TargetID]);
1586 else
1587 DAC960_Info(" Disk Status: %s, %d blocks\n", Controller,
1588 (DeviceState->DeviceState == DAC960_V1_Device_Dead
1589 ? "Dead"
1590 : DeviceState->DeviceState
1591 == DAC960_V1_Device_WriteOnly
1592 ? "Write-Only"
1593 : DeviceState->DeviceState
1594 == DAC960_V1_Device_Online
1595 ? "Online" : "Standby"),
1596 DeviceState->DiskSize);
1597 }
1598 if (ErrorEntry->ParityErrorCount > 0 ||
1599 ErrorEntry->SoftErrorCount > 0 ||
1600 ErrorEntry->HardErrorCount > 0 ||
1601 ErrorEntry->MiscErrorCount > 0)
1602 DAC960_Info(" Errors - Parity: %d, Soft: %d, "
1603 "Hard: %d, Misc: %d\n", Controller,
1604 ErrorEntry->ParityErrorCount,
1605 ErrorEntry->SoftErrorCount,
1606 ErrorEntry->HardErrorCount,
1607 ErrorEntry->MiscErrorCount);
1608 }
1609 DAC960_Info(" Logical Drives:\n", Controller);
1610 for (LogicalDriveNumber = 0;
1611 LogicalDriveNumber < Controller->LogicalDriveCount;
1612 LogicalDriveNumber++)
1613 {
1614 DAC960_V1_LogicalDriveInformation_T *LogicalDriveInformation =
1615 &Controller->V1.LogicalDriveInformation[LogicalDriveNumber];
1616 DAC960_Info(" /dev/rd/c%dd%d: RAID-%d, %s, %d blocks, %s\n",
1617 Controller, Controller->ControllerNumber, LogicalDriveNumber,
1618 LogicalDriveInformation->RAIDLevel,
1619 (LogicalDriveInformation->LogicalDriveState
1620 == DAC960_V1_LogicalDrive_Online
1621 ? "Online"
1622 : LogicalDriveInformation->LogicalDriveState
1623 == DAC960_V1_LogicalDrive_Critical
1624 ? "Critical" : "Offline"),
1625 LogicalDriveInformation->LogicalDriveSize,
1626 (LogicalDriveInformation->WriteBack
1627 ? "Write Back" : "Write Thru"));
1628 }
1629 return true;
1630 }
1631
1632
1633 /*
1634 DAC960_V2_ReportDeviceConfiguration reports the Device Configuration
1635 Information for DAC960 V2 Firmware Controllers.
1636 */
1637
1638 static boolean DAC960_V2_ReportDeviceConfiguration(DAC960_Controller_T
1639 *Controller)
1640 {
1641 int PhysicalDeviceIndex, LogicalDriveNumber;
1642 DAC960_Info(" Physical Devices:\n", Controller);
1643 for (PhysicalDeviceIndex = 0;
1644 PhysicalDeviceIndex < DAC960_V2_MaxPhysicalDevices;
1645 PhysicalDeviceIndex++)
1646 {
1647 DAC960_V2_PhysicalDeviceInfo_T *PhysicalDeviceInfo =
1648 Controller->V2.PhysicalDeviceInformation[PhysicalDeviceIndex];
1649 DAC960_SCSI_Inquiry_T *InquiryStandardData =
1650 (DAC960_SCSI_Inquiry_T *) &PhysicalDeviceInfo->SCSI_InquiryData;
1651 DAC960_SCSI_Inquiry_UnitSerialNumber_T *InquiryUnitSerialNumber =
1652 Controller->V2.InquiryUnitSerialNumber[PhysicalDeviceIndex];
1653 char Vendor[1+sizeof(InquiryStandardData->VendorIdentification)];
1654 char Model[1+sizeof(InquiryStandardData->ProductIdentification)];
1655 char Revision[1+sizeof(InquiryStandardData->ProductRevisionLevel)];
1656 char SerialNumber[1+sizeof(InquiryUnitSerialNumber->ProductSerialNumber)];
1657 if (PhysicalDeviceInfo == NULL) break;
1658 DAC960_SanitizeInquiryData(InquiryStandardData, InquiryUnitSerialNumber,
1659 Vendor, Model, Revision, SerialNumber);
1660 DAC960_Info(" %d:%d%s Vendor: %s Model: %s Revision: %s\n",
1661 Controller,
1662 PhysicalDeviceInfo->Channel,
1663 PhysicalDeviceInfo->TargetID,
1664 (PhysicalDeviceInfo->TargetID < 10 ? " " : ""),
1665 Vendor, Model, Revision);
1666 if (PhysicalDeviceInfo->NegotiatedSynchronousMegaTransfers == 0)
1667 DAC960_Info(" %sAsynchronous\n", Controller,
1668 (PhysicalDeviceInfo->NegotiatedDataWidthBits == 16
1669 ? "Wide " :""));
1670 else
1671 DAC960_Info(" %sSynchronous at %d MB/sec\n", Controller,
1672 (PhysicalDeviceInfo->NegotiatedDataWidthBits == 16
1673 ? "Wide " :""),
1674 (PhysicalDeviceInfo->NegotiatedSynchronousMegaTransfers
1675 * (PhysicalDeviceInfo->NegotiatedDataWidthBits == 16
1676 ? 2 : 1)));
1677 if (InquiryUnitSerialNumber->PeripheralDeviceType != 0x1F)
1678 DAC960_Info(" Serial Number: %s\n", Controller, SerialNumber);
1679 if (PhysicalDeviceInfo->PhysicalDeviceState ==
1680 DAC960_V2_Device_Unconfigured)
1681 continue;
1682 DAC960_Info(" Disk Status: %s, %d blocks\n", Controller,
1683 (PhysicalDeviceInfo->PhysicalDeviceState
1684 == DAC960_V2_Device_Online
1685 ? "Online"
1686 : PhysicalDeviceInfo->PhysicalDeviceState
1687 == DAC960_V2_Device_WriteOnly
1688 ? "Write-Only"
1689 : PhysicalDeviceInfo->PhysicalDeviceState
1690 == DAC960_V2_Device_Dead
1691 ? "Dead" : "Standby"),
1692 PhysicalDeviceInfo
1693 ->ConfigurableDeviceSizeIn512ByteBlocksOrMB);
1694 if (PhysicalDeviceInfo->ParityErrors == 0 &&
1695 PhysicalDeviceInfo->SoftErrors == 0 &&
1696 PhysicalDeviceInfo->HardErrors == 0 &&
1697 PhysicalDeviceInfo->MiscellaneousErrors == 0 &&
1698 PhysicalDeviceInfo->CommandTimeouts == 0 &&
1699 PhysicalDeviceInfo->Retries == 0 &&
1700 PhysicalDeviceInfo->Aborts == 0 &&
1701 PhysicalDeviceInfo->PredictedFailuresDetected == 0)
1702 continue;
1703 DAC960_Info(" Errors - Parity: %d, Soft: %d, "
1704 "Hard: %d, Misc: %d\n", Controller,
1705 PhysicalDeviceInfo->ParityErrors,
1706 PhysicalDeviceInfo->SoftErrors,
1707 PhysicalDeviceInfo->HardErrors,
1708 PhysicalDeviceInfo->MiscellaneousErrors);
1709 DAC960_Info(" Timeouts: %d, Retries: %d, "
1710 "Aborts: %d, Predicted: %d\n", Controller,
1711 PhysicalDeviceInfo->CommandTimeouts,
1712 PhysicalDeviceInfo->Retries,
1713 PhysicalDeviceInfo->Aborts,
1714 PhysicalDeviceInfo->PredictedFailuresDetected);
1715 }
1716 DAC960_Info(" Logical Drives:\n", Controller);
1717 for (LogicalDriveNumber = 0;
1718 LogicalDriveNumber < DAC960_MaxLogicalDrives;
1719 LogicalDriveNumber++)
1720 {
1721 DAC960_V2_LogicalDeviceInfo_T *LogicalDeviceInfo =
1722 Controller->V2.LogicalDeviceInformation[LogicalDriveNumber];
1723 unsigned char *ReadCacheStatus[] = { "Read Cache Disabled",
1724 "Read Cache Enabled",
1725 "Read Ahead Enabled",
1726 "Intelligent Read Ahead Enabled",
1727 "-", "-", "-", "-" };
1728 unsigned char *WriteCacheStatus[] = { "Write Cache Disabled",
1729 "Logical Device Read Only",
1730 "Write Cache Enabled",
1731 "Intelligent Write Cache Enabled",
1732 "-", "-", "-", "-" };
1733 unsigned char *GeometryTranslation;
1734 if (LogicalDeviceInfo == NULL) continue;
1735 switch(LogicalDeviceInfo->DriveGeometry)
1736 {
1737 case DAC960_V2_Geometry_128_32:
1738 GeometryTranslation = "128/32";
1739 break;
1740 case DAC960_V2_Geometry_255_63:
1741 GeometryTranslation = "255/63";
1742 break;
1743 default:
1744 GeometryTranslation = "Invalid";
1745 DAC960_Error("Illegal Logical Device Geometry %d\n",
1746 Controller, LogicalDeviceInfo->DriveGeometry);
1747 break;
1748 }
1749 DAC960_Info(" /dev/rd/c%dd%d: RAID-%d, %s, %d blocks\n",
1750 Controller, Controller->ControllerNumber, LogicalDriveNumber,
1751 LogicalDeviceInfo->RAIDLevel,
1752 (LogicalDeviceInfo->LogicalDeviceState
1753 == DAC960_V2_LogicalDevice_Online
1754 ? "Online"
1755 : LogicalDeviceInfo->LogicalDeviceState
1756 == DAC960_V2_LogicalDevice_Critical
1757 ? "Critical" : "Offline"),
1758 LogicalDeviceInfo->ConfigurableDeviceSizeIn512ByteBlocksOrMB);
1759 DAC960_Info(" Logical Device %s, BIOS Geometry: %s\n",
1760 Controller,
1761 (LogicalDeviceInfo->LogicalDeviceControl
1762 .LogicalDeviceInitialized
1763 ? "Initialized" : "Uninitialized"),
1764 GeometryTranslation);
1765 if (LogicalDeviceInfo->StripeSize == 0)
1766 {
1767 if (LogicalDeviceInfo->CacheLineSize == 0)
1768 DAC960_Info(" Stripe Size: N/A, "
1769 "Segment Size: N/A\n", Controller);
1770 else
1771 DAC960_Info(" Stripe Size: N/A, "
1772 "Segment Size: %dKB\n", Controller,
1773 1 << (LogicalDeviceInfo->CacheLineSize - 2));
1774 }
1775 else
1776 {
1777 if (LogicalDeviceInfo->CacheLineSize == 0)
1778 DAC960_Info(" Stripe Size: %dKB, "
1779 "Segment Size: N/A\n", Controller,
1780 1 << (LogicalDeviceInfo->StripeSize - 2));
1781 else
1782 DAC960_Info(" Stripe Size: %dKB, "
1783 "Segment Size: %dKB\n", Controller,
1784 1 << (LogicalDeviceInfo->StripeSize - 2),
1785 1 << (LogicalDeviceInfo->CacheLineSize - 2));
1786 }
1787 DAC960_Info(" %s, %s\n", Controller,
1788 ReadCacheStatus[
1789 LogicalDeviceInfo->LogicalDeviceControl.ReadCache],
1790 WriteCacheStatus[
1791 LogicalDeviceInfo->LogicalDeviceControl.WriteCache]);
1792 if (LogicalDeviceInfo->SoftErrors > 0 ||
1793 LogicalDeviceInfo->CommandsFailed > 0 ||
1794 LogicalDeviceInfo->DeferredWriteErrors)
1795 DAC960_Info(" Errors - Soft: %d, Failed: %d, "
1796 "Deferred Write: %d\n", Controller,
1797 LogicalDeviceInfo->SoftErrors,
1798 LogicalDeviceInfo->CommandsFailed,
1799 LogicalDeviceInfo->DeferredWriteErrors);
1800
1801 }
1802 return true;
1803 }
1804
1805
1806 /*
1807 DAC960_BackMergeFunction is the Back Merge Function for the DAC960 driver.
1808 */
1809
1810 static int DAC960_BackMergeFunction(RequestQueue_T *RequestQueue,
1811 IO_Request_T *Request,
1812 BufferHeader_T *BufferHeader,
1813 int MaxSegments)
1814 {
1815 DAC960_Controller_T *Controller =
1816 (DAC960_Controller_T *) RequestQueue->queuedata;
1817 if (Request->bhtail->b_data + Request->bhtail->b_size == BufferHeader->b_data)
1818 return true;
1819 if (Request->nr_segments < MaxSegments &&
1820 Request->nr_segments < Controller->DriverScatterGatherLimit)
1821 {
1822 Request->nr_segments++;
1823 return true;
1824 }
1825 return false;
1826 }
1827
1828
1829 /*
1830 DAC960_FrontMergeFunction is the Front Merge Function for the DAC960 driver.
1831 */
1832
1833 static int DAC960_FrontMergeFunction(RequestQueue_T *RequestQueue,
1834 IO_Request_T *Request,
1835 BufferHeader_T *BufferHeader,
1836 int MaxSegments)
1837 {
1838 DAC960_Controller_T *Controller =
1839 (DAC960_Controller_T *) RequestQueue->queuedata;
1840 if (BufferHeader->b_data + BufferHeader->b_size == Request->bh->b_data)
1841 return true;
1842 if (Request->nr_segments < MaxSegments &&
1843 Request->nr_segments < Controller->DriverScatterGatherLimit)
1844 {
1845 Request->nr_segments++;
1846 return true;
1847 }
1848 return false;
1849 }
1850
1851
1852 /*
1853 DAC960_MergeRequestsFunction is the Merge Requests Function for the
1854 DAC960 driver.
1855 */
1856
1857 static int DAC960_MergeRequestsFunction(RequestQueue_T *RequestQueue,
1858 IO_Request_T *Request,
1859 IO_Request_T *NextRequest,
1860 int MaxSegments)
1861 {
1862 DAC960_Controller_T *Controller =
1863 (DAC960_Controller_T *) RequestQueue->queuedata;
1864 int TotalSegments = Request->nr_segments + NextRequest->nr_segments;
1865 if (Request->bhtail->b_data + Request->bhtail->b_size
1866 == NextRequest->bh->b_data)
1867 TotalSegments--;
1868 if (TotalSegments > MaxSegments ||
1869 TotalSegments > Controller->DriverScatterGatherLimit)
1870 return false;
1871 Request->nr_segments = TotalSegments;
1872 return true;
1873 }
1874
1875
1876 /*
1877 DAC960_RegisterBlockDevice registers the Block Device structures
1878 associated with Controller.
1879 */
1880
1881 static boolean DAC960_RegisterBlockDevice(DAC960_Controller_T *Controller)
1882 {
1883 int MajorNumber = DAC960_MAJOR + Controller->ControllerNumber;
1884 GenericDiskInfo_T *GenericDiskInfo;
1885 RequestQueue_T *RequestQueue;
1886 int MinorNumber;
1887 /*
1888 Register the Block Device Major Number for this DAC960 Controller.
1889 */
1890 if (devfs_register_blkdev(MajorNumber, "dac960",
1891 &DAC960_BlockDeviceOperations) < 0)
1892 {
1893 DAC960_Error("UNABLE TO ACQUIRE MAJOR NUMBER %d - DETACHING\n",
1894 Controller, MajorNumber);
1895 return false;
1896 }
1897 /*
1898 Initialize the I/O Request Queue.
1899 */
1900 RequestQueue = BLK_DEFAULT_QUEUE(MajorNumber);
1901 blk_init_queue(RequestQueue, DAC960_RequestFunction);
1902 blk_queue_headactive(RequestQueue, 0);
1903 RequestQueue->back_merge_fn = DAC960_BackMergeFunction;
1904 RequestQueue->front_merge_fn = DAC960_FrontMergeFunction;
1905 RequestQueue->merge_requests_fn = DAC960_MergeRequestsFunction;
1906 RequestQueue->queuedata = Controller;
1907 Controller->RequestQueue = RequestQueue;
1908 /*
1909 Initialize the Disk Partitions array, Partition Sizes array, Block Sizes
1910 array, and Max Sectors per Request array.
1911 */
1912 for (MinorNumber = 0; MinorNumber < DAC960_MinorCount; MinorNumber++)
1913 {
1914 Controller->BlockSizes[MinorNumber] = BLOCK_SIZE;
1915 Controller->MaxSectorsPerRequest[MinorNumber] =
1916 Controller->MaxBlocksPerCommand;
1917 }
1918 Controller->GenericDiskInfo.part = Controller->DiskPartitions;
1919 Controller->GenericDiskInfo.sizes = Controller->PartitionSizes;
1920 blksize_size[MajorNumber] = Controller->BlockSizes;
1921 max_sectors[MajorNumber] = Controller->MaxSectorsPerRequest;
1922 /*
1923 Initialize Read Ahead to 128 sectors.
1924 */
1925 read_ahead[MajorNumber] = 128;
1926 /*
1927 Complete initialization of the Generic Disk Information structure.
1928 */
1929 Controller->GenericDiskInfo.major = MajorNumber;
1930 Controller->GenericDiskInfo.major_name = "rd";
1931 Controller->GenericDiskInfo.minor_shift = DAC960_MaxPartitionsBits;
1932 Controller->GenericDiskInfo.max_p = DAC960_MaxPartitions;
1933 Controller->GenericDiskInfo.nr_real = Controller->LogicalDriveCount;
1934 Controller->GenericDiskInfo.next = NULL;
1935 Controller->GenericDiskInfo.fops = &DAC960_BlockDeviceOperations;
1936 /*
1937 Install the Generic Disk Information structure at the end of the list.
1938 */
1939 if ((GenericDiskInfo = gendisk_head) != NULL)
1940 {
1941 while (GenericDiskInfo->next != NULL)
1942 GenericDiskInfo = GenericDiskInfo->next;
1943 GenericDiskInfo->next = &Controller->GenericDiskInfo;
1944 }
1945 else gendisk_head = &Controller->GenericDiskInfo;
1946 /*
1947 Indicate the Block Device Registration completed successfully,
1948 */
1949 return true;
1950 }
1951
1952
1953 /*
1954 DAC960_UnregisterBlockDevice unregisters the Block Device structures
1955 associated with Controller.
1956 */
1957
1958 static void DAC960_UnregisterBlockDevice(DAC960_Controller_T *Controller)
1959 {
1960 int MajorNumber = DAC960_MAJOR + Controller->ControllerNumber;
1961 /*
1962 Unregister the Block Device Major Number for this DAC960 Controller.
1963 */
1964 devfs_unregister_blkdev(MajorNumber, "dac960");
1965 /*
1966 Remove the I/O Request Queue.
1967 */
1968 blk_cleanup_queue(BLK_DEFAULT_QUEUE(MajorNumber));
1969 /*
1970 Remove the Disk Partitions array, Partition Sizes array, Block Sizes
1971 array, Max Sectors per Request array, and Max Segments per Request array.
1972 */
1973 Controller->GenericDiskInfo.part = NULL;
1974 Controller->GenericDiskInfo.sizes = NULL;
1975 blk_size[MajorNumber] = NULL;
1976 blksize_size[MajorNumber] = NULL;
1977 max_sectors[MajorNumber] = NULL;
1978 /*
1979 Remove the Generic Disk Information structure from the list.
1980 */
1981 if (gendisk_head != &Controller->GenericDiskInfo)
1982 {
1983 GenericDiskInfo_T *GenericDiskInfo = gendisk_head;
1984 while (GenericDiskInfo != NULL &&
1985 GenericDiskInfo->next != &Controller->GenericDiskInfo)
1986 GenericDiskInfo = GenericDiskInfo->next;
1987 if (GenericDiskInfo != NULL)
1988 GenericDiskInfo->next = GenericDiskInfo->next->next;
1989 }
1990 else gendisk_head = Controller->GenericDiskInfo.next;
1991 }
1992
1993
1994 /*
1995 DAC960_RegisterDisk registers the DAC960 Logical Disk Device for Logical
1996 Drive Number if it exists.
1997 */
1998
1999 static void DAC960_RegisterDisk(DAC960_Controller_T *Controller,
2000 int LogicalDriveNumber)
2001 {
2002 if (Controller->FirmwareType == DAC960_V1_Controller)
2003 {
2004 if (LogicalDriveNumber > Controller->LogicalDriveCount - 1) return;
2005 register_disk(&Controller->GenericDiskInfo,
2006 DAC960_KernelDevice(Controller->ControllerNumber,
2007 LogicalDriveNumber, 0),
2008 DAC960_MaxPartitions, &DAC960_BlockDeviceOperations,
2009 Controller->V1.LogicalDriveInformation
2010 [LogicalDriveNumber].LogicalDriveSize);
2011 }
2012 else
2013 {
2014 DAC960_V2_LogicalDeviceInfo_T *LogicalDeviceInfo =
2015 Controller->V2.LogicalDeviceInformation[LogicalDriveNumber];
2016 if (LogicalDeviceInfo == NULL) return;
2017 register_disk(&Controller->GenericDiskInfo,
2018 DAC960_KernelDevice(Controller->ControllerNumber,
2019 LogicalDriveNumber, 0),
2020 DAC960_MaxPartitions, &DAC960_BlockDeviceOperations,
2021 LogicalDeviceInfo
2022 ->ConfigurableDeviceSizeIn512ByteBlocksOrMB);
2023 }
2024 }
2025
2026
2027 /*
2028 DAC960_ReportErrorStatus reports Controller BIOS Messages passed through
2029 the Error Status Register when the driver performs the BIOS handshaking.
2030 It returns true for fatal errors and false otherwise.
2031 */
2032
2033 static boolean DAC960_ReportErrorStatus(DAC960_Controller_T *Controller,
2034 unsigned char ErrorStatus,
2035 unsigned char Parameter0,
2036 unsigned char Parameter1)
2037 {
2038 switch (ErrorStatus)
2039 {
2040 case 0x00:
2041 DAC960_Notice("Physical Device %d:%d Not Responding\n",
2042 Controller, Parameter1, Parameter0);
2043 break;
2044 case 0x08:
2045 if (Controller->DriveSpinUpMessageDisplayed) break;
2046 DAC960_Notice("Spinning Up Drives\n", Controller);
2047 Controller->DriveSpinUpMessageDisplayed = true;
2048 break;
2049 case 0x30:
2050 DAC960_Notice("Configuration Checksum Error\n", Controller);
2051 break;
2052 case 0x60:
2053 DAC960_Notice("Mirror Race Recovery Failed\n", Controller);
2054 break;
2055 case 0x70:
2056 DAC960_Notice("Mirror Race Recovery In Progress\n", Controller);
2057 break;
2058 case 0x90:
2059 DAC960_Notice("Physical Device %d:%d COD Mismatch\n",
2060 Controller, Parameter1, Parameter0);
2061 break;
2062 case 0xA0:
2063 DAC960_Notice("Logical Drive Installation Aborted\n", Controller);
2064 break;
2065 case 0xB0:
2066 DAC960_Notice("Mirror Race On A Critical Logical Drive\n", Controller);
2067 break;
2068 case 0xD0:
2069 DAC960_Notice("New Controller Configuration Found\n", Controller);
2070 break;
2071 case 0xF0:
2072 DAC960_Error("Fatal Memory Parity Error for Controller at\n", Controller);
2073 return true;
2074 default:
2075 DAC960_Error("Unknown Initialization Error %02X for Controller at\n",
2076 Controller, ErrorStatus);
2077 return true;
2078 }
2079 return false;
2080 }
2081
2082
2083 /*
2084 DAC960_DetectControllers detects Mylex DAC960/AcceleRAID/eXtremeRAID
2085 PCI RAID Controllers by interrogating the PCI Configuration Space for
2086 Controller Type.
2087 */
2088
2089 static void DAC960_DetectControllers(DAC960_HardwareType_T HardwareType)
2090 {
2091 void (*InterruptHandler)(int, void *, Registers_T *) = NULL;
2092 DAC960_FirmwareType_T FirmwareType = 0;
2093 unsigned short VendorID = 0, DeviceID = 0;
2094 unsigned int MemoryWindowSize = 0;
2095 PCI_Device_T *PCI_Device = NULL;
2096 switch (HardwareType)
2097 {
2098 case DAC960_BA_Controller:
2099 VendorID = PCI_VENDOR_ID_MYLEX;
2100 DeviceID = PCI_DEVICE_ID_MYLEX_DAC960_BA;
2101 FirmwareType = DAC960_V2_Controller;
2102 InterruptHandler = DAC960_BA_InterruptHandler;
2103 MemoryWindowSize = DAC960_BA_RegisterWindowSize;
2104 break;
2105 case DAC960_LP_Controller:
2106 VendorID = PCI_VENDOR_ID_MYLEX;
2107 DeviceID = PCI_DEVICE_ID_MYLEX_DAC960_LP;
2108 FirmwareType = DAC960_LP_Controller;
2109 InterruptHandler = DAC960_LP_InterruptHandler;
2110 MemoryWindowSize = DAC960_LP_RegisterWindowSize;
2111 break;
2112 case DAC960_LA_Controller:
2113 VendorID = PCI_VENDOR_ID_DEC;
2114 DeviceID = PCI_DEVICE_ID_DEC_21285;
2115 FirmwareType = DAC960_V1_Controller;
2116 InterruptHandler = DAC960_LA_InterruptHandler;
2117 MemoryWindowSize = DAC960_LA_RegisterWindowSize;
2118 break;
2119 case DAC960_PG_Controller:
2120 VendorID = PCI_VENDOR_ID_MYLEX;
2121 DeviceID = PCI_DEVICE_ID_MYLEX_DAC960_PG;
2122 FirmwareType = DAC960_V1_Controller;
2123 InterruptHandler = DAC960_PG_InterruptHandler;
2124 MemoryWindowSize = DAC960_PG_RegisterWindowSize;
2125 break;
2126 case DAC960_PD_Controller:
2127 VendorID = PCI_VENDOR_ID_MYLEX;
2128 DeviceID = PCI_DEVICE_ID_MYLEX_DAC960_PD;
2129 FirmwareType = DAC960_V1_Controller;
2130 InterruptHandler = DAC960_PD_InterruptHandler;
2131 MemoryWindowSize = DAC960_PD_RegisterWindowSize;
2132 break;
2133 }
2134 while ((PCI_Device = pci_find_device(VendorID, DeviceID, PCI_Device)) != NULL)
2135 {
2136 DAC960_Controller_T *Controller = NULL;
2137 DAC960_IO_Address_T IO_Address = 0;
2138 DAC960_PCI_Address_T PCI_Address = 0;
2139 unsigned char Bus = PCI_Device->bus->number;
2140 unsigned char DeviceFunction = PCI_Device->devfn;
2141 unsigned char Device = DeviceFunction >> 3;
2142 unsigned char Function = DeviceFunction & 0x7;
2143 unsigned char ErrorStatus, Parameter0, Parameter1;
2144 unsigned int IRQ_Channel = PCI_Device->irq;
2145 void *BaseAddress;
2146 if (pci_enable_device(PCI_Device) != 0) continue;
2147 switch (HardwareType)
2148 {
2149 case DAC960_BA_Controller:
2150 PCI_Address = pci_resource_start(PCI_Device, 0);
2151 break;
2152 case DAC960_LP_Controller:
2153 PCI_Address = pci_resource_start(PCI_Device, 0);
2154 break;
2155 case DAC960_LA_Controller:
2156 if (!(PCI_Device->subsystem_vendor == PCI_VENDOR_ID_MYLEX &&
2157 PCI_Device->subsystem_device == PCI_DEVICE_ID_MYLEX_DAC960_LA))
2158 continue;
2159 PCI_Address = pci_resource_start(PCI_Device, 0);
2160 break;
2161 case DAC960_PG_Controller:
2162 PCI_Address = pci_resource_start(PCI_Device, 0);
2163 break;
2164 case DAC960_PD_Controller:
2165 IO_Address = pci_resource_start(PCI_Device, 0);
2166 PCI_Address = pci_resource_start(PCI_Device, 1);
2167 break;
2168 }
2169 if (DAC960_ControllerCount == DAC960_MaxControllers)
2170 {
2171 DAC960_Error("More than %d DAC960 Controllers detected - "
2172 "ignoring from Controller at\n",
2173 NULL, DAC960_MaxControllers);
2174 goto Failure;
2175 }
2176 Controller = (DAC960_Controller_T *)
2177 kmalloc(sizeof(DAC960_Controller_T), GFP_ATOMIC);
2178 if (Controller == NULL)
2179 {
2180 DAC960_Error("Unable to allocate Controller structure for "
2181 "Controller at\n", NULL);
2182 goto Failure;
2183 }
2184 memset(Controller, 0, sizeof(DAC960_Controller_T));
2185 Controller->ControllerNumber = DAC960_ControllerCount;
2186 init_waitqueue_head(&Controller->CommandWaitQueue);
2187 init_waitqueue_head(&Controller->HealthStatusWaitQueue);
2188 DAC960_Controllers[DAC960_ControllerCount++] = Controller;
2189 DAC960_AnnounceDriver(Controller);
2190 Controller->FirmwareType = FirmwareType;
2191 Controller->HardwareType = HardwareType;
2192 Controller->IO_Address = IO_Address;
2193 Controller->PCI_Address = PCI_Address;
2194 Controller->Bus = Bus;
2195 Controller->Device = Device;
2196 Controller->Function = Function;
2197 /*
2198 Map the Controller Register Window.
2199 */
2200 if (MemoryWindowSize < PAGE_SIZE)
2201 MemoryWindowSize = PAGE_SIZE;
2202 Controller->MemoryMappedAddress =
2203 ioremap_nocache(PCI_Address & PAGE_MASK, MemoryWindowSize);
2204 Controller->BaseAddress =
2205 Controller->MemoryMappedAddress + (PCI_Address & ~PAGE_MASK);
2206 if (Controller->MemoryMappedAddress == NULL)
2207 {
2208 DAC960_Error("Unable to map Controller Register Window for "
2209 "Controller at\n", Controller);
2210 goto Failure;
2211 }
2212 BaseAddress = Controller->BaseAddress;
2213 switch (HardwareType)
2214 {
2215 case DAC960_BA_Controller:
2216 DAC960_BA_DisableInterrupts(Controller->BaseAddress);
2217 DAC960_BA_AcknowledgeHardwareMailboxStatus(BaseAddress);
2218 udelay(1000);
2219 while (DAC960_BA_InitializationInProgressP(BaseAddress))
2220 {
2221 if (DAC960_BA_ReadErrorStatus(BaseAddress, &ErrorStatus,
2222 &Parameter0, &Parameter1) &&
2223 DAC960_ReportErrorStatus(Controller, ErrorStatus,
2224 Parameter0, Parameter1))
2225 goto Failure;
2226 udelay(10);
2227 }
2228 if (!DAC960_V2_EnableMemoryMailboxInterface(Controller))
2229 {
2230 DAC960_Error("Unable to Enable Memory Mailbox Interface "
2231 "for Controller at\n", Controller);
2232 goto Failure;
2233 }
2234 DAC960_BA_EnableInterrupts(Controller->BaseAddress);
2235 Controller->QueueCommand = DAC960_BA_QueueCommand;
2236 Controller->ReadControllerConfiguration =
2237 DAC960_V2_ReadControllerConfiguration;
2238 Controller->ReadDeviceConfiguration =
2239 DAC960_V2_ReadDeviceConfiguration;
2240 Controller->ReportDeviceConfiguration =
2241 DAC960_V2_ReportDeviceConfiguration;
2242 Controller->QueueReadWriteCommand =
2243 DAC960_V2_QueueReadWriteCommand;
2244 break;
2245 case DAC960_LP_Controller:
2246 DAC960_LP_DisableInterrupts(Controller->BaseAddress);
2247 DAC960_LP_AcknowledgeHardwareMailboxStatus(BaseAddress);
2248 udelay(1000);
2249 while (DAC960_LP_InitializationInProgressP(BaseAddress))
2250 {
2251 if (DAC960_LP_ReadErrorStatus(BaseAddress, &ErrorStatus,
2252 &Parameter0, &Parameter1) &&
2253 DAC960_ReportErrorStatus(Controller, ErrorStatus,
2254 Parameter0, Parameter1))
2255 goto Failure;
2256 udelay(10);
2257 }
2258 if (!DAC960_V2_EnableMemoryMailboxInterface(Controller))
2259 {
2260 DAC960_Error("Unable to Enable Memory Mailbox Interface "
2261 "for Controller at\n", Controller);
2262 goto Failure;
2263 }
2264 DAC960_LP_EnableInterrupts(Controller->BaseAddress);
2265 Controller->QueueCommand = DAC960_LP_QueueCommand;
2266 Controller->ReadControllerConfiguration =
2267 DAC960_V2_ReadControllerConfiguration;
2268 Controller->ReadDeviceConfiguration =
2269 DAC960_V2_ReadDeviceConfiguration;
2270 Controller->ReportDeviceConfiguration =
2271 DAC960_V2_ReportDeviceConfiguration;
2272 Controller->QueueReadWriteCommand =
2273 DAC960_V2_QueueReadWriteCommand;
2274 break;
2275 case DAC960_LA_Controller:
2276 DAC960_LA_DisableInterrupts(Controller->BaseAddress);
2277 DAC960_LA_AcknowledgeHardwareMailboxStatus(BaseAddress);
2278 udelay(1000);
2279 while (DAC960_LA_InitializationInProgressP(BaseAddress))
2280 {
2281 if (DAC960_LA_ReadErrorStatus(BaseAddress, &ErrorStatus,
2282 &Parameter0, &Parameter1) &&
2283 DAC960_ReportErrorStatus(Controller, ErrorStatus,
2284 Parameter0, Parameter1))
2285 goto Failure;
2286 udelay(10);
2287 }
2288 if (!DAC960_V1_EnableMemoryMailboxInterface(Controller))
2289 {
2290 DAC960_Error("Unable to Enable Memory Mailbox Interface "
2291 "for Controller at\n", Controller);
2292 goto Failure;
2293 }
2294 DAC960_LA_EnableInterrupts(Controller->BaseAddress);
2295 if (Controller->V1.DualModeMemoryMailboxInterface)
2296 Controller->QueueCommand = DAC960_LA_QueueCommandDualMode;
2297 else Controller->QueueCommand = DAC960_LA_QueueCommandSingleMode;
2298 Controller->ReadControllerConfiguration =
2299 DAC960_V1_ReadControllerConfiguration;
2300 Controller->ReadDeviceConfiguration =
2301 DAC960_V1_ReadDeviceConfiguration;
2302 Controller->ReportDeviceConfiguration =
2303 DAC960_V1_ReportDeviceConfiguration;
2304 Controller->QueueReadWriteCommand =
2305 DAC960_V1_QueueReadWriteCommand;
2306 break;
2307 case DAC960_PG_Controller:
2308 DAC960_PG_DisableInterrupts(Controller->BaseAddress);
2309 DAC960_PG_AcknowledgeHardwareMailboxStatus(BaseAddress);
2310 udelay(1000);
2311 while (DAC960_PG_InitializationInProgressP(BaseAddress))
2312 {
2313 if (DAC960_PG_ReadErrorStatus(BaseAddress, &ErrorStatus,
2314 &Parameter0, &Parameter1) &&
2315 DAC960_ReportErrorStatus(Controller, ErrorStatus,
2316 Parameter0, Parameter1))
2317 goto Failure;
2318 udelay(10);
2319 }
2320 if (!DAC960_V1_EnableMemoryMailboxInterface(Controller))
2321 {
2322 DAC960_Error("Unable to Enable Memory Mailbox Interface "
2323 "for Controller at\n", Controller);
2324 goto Failure;
2325 }
2326 DAC960_PG_EnableInterrupts(Controller->BaseAddress);
2327 if (Controller->V1.DualModeMemoryMailboxInterface)
2328 Controller->QueueCommand = DAC960_PG_QueueCommandDualMode;
2329 else Controller->QueueCommand = DAC960_PG_QueueCommandSingleMode;
2330 Controller->ReadControllerConfiguration =
2331 DAC960_V1_ReadControllerConfiguration;
2332 Controller->ReadDeviceConfiguration =
2333 DAC960_V1_ReadDeviceConfiguration;
2334 Controller->ReportDeviceConfiguration =
2335 DAC960_V1_ReportDeviceConfiguration;
2336 Controller->QueueReadWriteCommand =
2337 DAC960_V1_QueueReadWriteCommand;
2338 break;
2339 case DAC960_PD_Controller:
2340 request_region(Controller->IO_Address, 0x80,
2341 Controller->FullModelName);
2342 DAC960_PD_DisableInterrupts(BaseAddress);
2343 DAC960_PD_AcknowledgeStatus(BaseAddress);
2344 udelay(1000);
2345 while (DAC960_PD_InitializationInProgressP(BaseAddress))
2346 {
2347 if (DAC960_PD_ReadErrorStatus(BaseAddress, &ErrorStatus,
2348 &Parameter0, &Parameter1) &&
2349 DAC960_ReportErrorStatus(Controller, ErrorStatus,
2350 Parameter0, Parameter1))
2351 goto Failure;
2352 udelay(10);
2353 }
2354 DAC960_PD_EnableInterrupts(Controller->BaseAddress);
2355 Controller->QueueCommand = DAC960_PD_QueueCommand;
2356 Controller->ReadControllerConfiguration =
2357 DAC960_V1_ReadControllerConfiguration;
2358 Controller->ReadDeviceConfiguration =
2359 DAC960_V1_ReadDeviceConfiguration;
2360 Controller->ReportDeviceConfiguration =
2361 DAC960_V1_ReportDeviceConfiguration;
2362 Controller->QueueReadWriteCommand =
2363 DAC960_V1_QueueReadWriteCommand;
2364 break;
2365 }
2366 /*
2367 Acquire shared access to the IRQ Channel.
2368 */
2369 if (IRQ_Channel == 0)
2370 {
2371 DAC960_Error("IRQ Channel %d illegal for Controller at\n",
2372 Controller, IRQ_Channel);
2373 goto Failure;
2374 }
2375 strcpy(Controller->FullModelName, "DAC960");
2376 if (request_irq(IRQ_Channel, InterruptHandler, SA_SHIRQ,
2377 Controller->FullModelName, Controller) < 0)
2378 {
2379 DAC960_Error("Unable to acquire IRQ Channel %d for Controller at\n",
2380 Controller, IRQ_Channel);
2381 goto Failure;
2382 }
2383 Controller->IRQ_Channel = IRQ_Channel;
2384 DAC960_ActiveControllerCount++;
2385 Controller->InitialCommand.CommandIdentifier = 1;
2386 Controller->InitialCommand.Controller = Controller;
2387 Controller->Commands[0] = &Controller->InitialCommand;
2388 Controller->FreeCommands = &Controller->InitialCommand;
2389 Controller->ControllerDetectionSuccessful = true;
2390 continue;
2391 Failure:
2392 if (IO_Address == 0)
2393 DAC960_Error("PCI Bus %d Device %d Function %d I/O Address N/A "
2394 "PCI Address 0x%X\n", Controller,
2395 Bus, Device, Function, PCI_Address);
2396 else DAC960_Error("PCI Bus %d Device %d Function %d I/O Address "
2397 "0x%X PCI Address 0x%X\n", Controller,
2398 Bus, Device, Function, IO_Address, PCI_Address);
2399 if (Controller == NULL) break;
2400 if (Controller->MemoryMappedAddress != NULL)
2401 iounmap(Controller->MemoryMappedAddress);
2402 if (Controller->IRQ_Channel > 0)
2403 free_irq(IRQ_Channel, Controller);
2404 }
2405 }
2406
2407
2408 /*
2409 DAC960_SortControllers sorts the Controllers by PCI Bus and Device Number.
2410 */
2411
2412 static void DAC960_SortControllers(void)
2413 {
2414 int ControllerNumber, LastInterchange, Bound, j;
2415 LastInterchange = DAC960_ControllerCount-1;
2416 while (LastInterchange > 0)
2417 {
2418 Bound = LastInterchange;
2419 LastInterchange = 0;
2420 for (j = 0; j < Bound; j++)
2421 {
2422 DAC960_Controller_T *Controller1 = DAC960_Controllers[j];
2423 DAC960_Controller_T *Controller2 = DAC960_Controllers[j+1];
2424 if (Controller1->Bus > Controller2->Bus ||
2425 (Controller1->Bus == Controller2->Bus &&
2426 (Controller1->Device > Controller2->Device)))
2427 {
2428 Controller2->ControllerNumber = j;
2429 DAC960_Controllers[j] = Controller2;
2430 Controller1->ControllerNumber = j+1;
2431 DAC960_Controllers[j+1] = Controller1;
2432 LastInterchange = j;
2433 }
2434 }
2435 }
2436 for (ControllerNumber = 0;
2437 ControllerNumber < DAC960_ControllerCount;
2438 ControllerNumber++)
2439 {
2440 DAC960_Controller_T *Controller = DAC960_Controllers[ControllerNumber];
2441 if (!Controller->ControllerDetectionSuccessful)
2442 {
2443 DAC960_Controllers[ControllerNumber] = NULL;
2444 kfree(Controller);
2445 }
2446 }
2447 }
2448
2449
2450 /*
2451 DAC960_InitializeController initializes Controller.
2452 */
2453
2454 static void DAC960_InitializeController(DAC960_Controller_T *Controller)
2455 {
2456 if (DAC960_ReadControllerConfiguration(Controller) &&
2457 DAC960_ReportControllerConfiguration(Controller) &&
2458 DAC960_CreateAuxiliaryStructures(Controller) &&
2459 DAC960_ReadDeviceConfiguration(Controller) &&
2460 DAC960_ReportDeviceConfiguration(Controller) &&
2461 DAC960_RegisterBlockDevice(Controller))
2462 {
2463 /*
2464 Initialize the Monitoring Timer.
2465 */
2466 init_timer(&Controller->MonitoringTimer);
2467 Controller->MonitoringTimer.expires =
2468 jiffies + DAC960_MonitoringTimerInterval;
2469 Controller->MonitoringTimer.data = (unsigned long) Controller;
2470 Controller->MonitoringTimer.function = DAC960_MonitoringTimerFunction;
2471 add_timer(&Controller->MonitoringTimer);
2472 Controller->ControllerInitialized = true;
2473 }
2474 else DAC960_FinalizeController(Controller);
2475 }
2476
2477
2478 /*
2479 DAC960_FinalizeController finalizes Controller.
2480 */
2481
2482 static void DAC960_FinalizeController(DAC960_Controller_T *Controller)
2483 {
2484 if (Controller->ControllerInitialized)
2485 {
2486 del_timer(&Controller->MonitoringTimer);
2487 if (Controller->FirmwareType == DAC960_V1_Controller)
2488 {
2489 DAC960_Notice("Flushing Cache...", Controller);
2490 DAC960_V1_ExecuteType3(Controller, DAC960_V1_Flush, NULL);
2491 DAC960_Notice("done\n", Controller);
2492 switch (Controller->HardwareType)
2493 {
2494 case DAC960_LA_Controller:
2495 if (Controller->V1.DualModeMemoryMailboxInterface)
2496 free_pages(Controller->MemoryMailboxPagesAddress,
2497 Controller->MemoryMailboxPagesOrder);
2498 else DAC960_LA_SaveMemoryMailboxInfo(Controller);
2499 break;
2500 case DAC960_PG_Controller:
2501 if (Controller->V1.DualModeMemoryMailboxInterface)
2502 free_pages(Controller->MemoryMailboxPagesAddress,
2503 Controller->MemoryMailboxPagesOrder);
2504 else DAC960_PG_SaveMemoryMailboxInfo(Controller);
2505 break;
2506 case DAC960_PD_Controller:
2507 release_region(Controller->IO_Address, 0x80);
2508 break;
2509 default:
2510 break;
2511 }
2512 }
2513 else
2514 {
2515 DAC960_Notice("Flushing Cache...", Controller);
2516 DAC960_V2_DeviceOperation(Controller, DAC960_V2_PauseDevice,
2517 DAC960_V2_RAID_Controller);
2518 DAC960_Notice("done\n", Controller);
2519 free_pages(Controller->MemoryMailboxPagesAddress,
2520 Controller->MemoryMailboxPagesOrder);
2521 }
2522 }
2523 free_irq(Controller->IRQ_Channel, Controller);
2524 iounmap(Controller->MemoryMappedAddress);
2525 DAC960_UnregisterBlockDevice(Controller);
2526 DAC960_DestroyAuxiliaryStructures(Controller);
2527 DAC960_Controllers[Controller->ControllerNumber] = NULL;
2528 kfree(Controller);
2529 }
2530
2531
2532 /*
2533 DAC960_Initialize initializes the DAC960 Driver.
2534 */
2535
2536 void DAC960_Initialize(void)
2537 {
2538 int ControllerNumber;
2539 DAC960_DetectControllers(DAC960_BA_Controller);
2540 DAC960_DetectControllers(DAC960_LP_Controller);
2541 DAC960_DetectControllers(DAC960_LA_Controller);
2542 DAC960_DetectControllers(DAC960_PG_Controller);
2543 DAC960_DetectControllers(DAC960_PD_Controller);
2544 DAC960_SortControllers();
2545 if (DAC960_ActiveControllerCount == 0) return;
2546 for (ControllerNumber = 0;
2547 ControllerNumber < DAC960_ControllerCount;
2548 ControllerNumber++)
2549 {
2550 DAC960_Controller_T *Controller = DAC960_Controllers[ControllerNumber];
2551 int LogicalDriveNumber;
2552 if (Controller == NULL) continue;
2553 DAC960_InitializeController(Controller);
2554 for (LogicalDriveNumber = 0;
2555 LogicalDriveNumber < DAC960_MaxLogicalDrives;
2556 LogicalDriveNumber++)
2557 DAC960_RegisterDisk(Controller, LogicalDriveNumber);
2558 }
2559 DAC960_CreateProcEntries();
2560 register_reboot_notifier(&DAC960_NotifierBlock);
2561 }
2562
2563
2564 /*
2565 DAC960_Finalize finalizes the DAC960 Driver.
2566 */
2567
2568 static int DAC960_Finalize(NotifierBlock_T *NotifierBlock,
2569 unsigned long Event,
2570 void *Buffer)
2571 {
2572 int ControllerNumber;
2573 if (!(Event == SYS_RESTART || Event == SYS_HALT || Event == SYS_POWER_OFF))
2574 return NOTIFY_DONE;
2575 if (DAC960_ActiveControllerCount == 0) return NOTIFY_OK;
2576 for (ControllerNumber = 0;
2577 ControllerNumber < DAC960_ControllerCount;
2578 ControllerNumber++)
2579 if (DAC960_Controllers[ControllerNumber] != NULL)
2580 DAC960_FinalizeController(DAC960_Controllers[ControllerNumber]);
2581 DAC960_DestroyProcEntries();
2582 unregister_reboot_notifier(&DAC960_NotifierBlock);
2583 return NOTIFY_OK;
2584 }
2585
2586
2587 /*
2588 DAC960_V1_QueueReadWriteCommand prepares and queues a Read/Write Command for
2589 DAC960 V1 Firmware Controllers.
2590 */
2591
2592 static void DAC960_V1_QueueReadWriteCommand(DAC960_Command_T *Command)
2593 {
2594 DAC960_Controller_T *Controller = Command->Controller;
2595 DAC960_V1_CommandMailbox_T *CommandMailbox = &Command->V1.CommandMailbox;
2596 DAC960_V1_ClearCommand(Command);
2597 if (Command->SegmentCount == 1)
2598 {
2599 if (Command->CommandType == DAC960_ReadCommand)
2600 CommandMailbox->Type5.CommandOpcode = DAC960_V1_Read;
2601 else CommandMailbox->Type5.CommandOpcode = DAC960_V1_Write;
2602 CommandMailbox->Type5.LD.TransferLength = Command->BlockCount;
2603 CommandMailbox->Type5.LD.LogicalDriveNumber = Command->LogicalDriveNumber;
2604 CommandMailbox->Type5.LogicalBlockAddress = Command->BlockNumber;
2605 CommandMailbox->Type5.BusAddress = Virtual_to_Bus(Command->RequestBuffer);
2606 }
2607 else
2608 {
2609 DAC960_V1_ScatterGatherSegment_T
2610 *ScatterGatherList = Command->V1.ScatterGatherList;
2611 BufferHeader_T *BufferHeader = Command->BufferHeader;
2612 char *LastDataEndPointer = NULL;
2613 int SegmentNumber = 0;
2614 if (Command->CommandType == DAC960_ReadCommand)
2615 CommandMailbox->Type5.CommandOpcode =
2616 DAC960_V1_ReadWithOldScatterGather;
2617 else
2618 CommandMailbox->Type5.CommandOpcode =
2619 DAC960_V1_WriteWithOldScatterGather;
2620 CommandMailbox->Type5.LD.TransferLength = Command->BlockCount;
2621 CommandMailbox->Type5.LD.LogicalDriveNumber = Command->LogicalDriveNumber;
2622 CommandMailbox->Type5.LogicalBlockAddress = Command->BlockNumber;
2623 CommandMailbox->Type5.BusAddress = Virtual_to_Bus(ScatterGatherList);
2624 CommandMailbox->Type5.ScatterGatherCount = Command->SegmentCount;
2625 while (BufferHeader != NULL)
2626 {
2627 if (BufferHeader->b_data == LastDataEndPointer)
2628 {
2629 ScatterGatherList[SegmentNumber-1].SegmentByteCount +=
2630 BufferHeader->b_size;
2631 LastDataEndPointer += BufferHeader->b_size;
2632 }
2633 else
2634 {
2635 ScatterGatherList[SegmentNumber].SegmentDataPointer =
2636 Virtual_to_Bus(BufferHeader->b_data);
2637 ScatterGatherList[SegmentNumber].SegmentByteCount =
2638 BufferHeader->b_size;
2639 LastDataEndPointer = BufferHeader->b_data + BufferHeader->b_size;
2640 if (SegmentNumber++ > Controller->DriverScatterGatherLimit)
2641 panic("DAC960: Scatter/Gather Segment Overflow\n");
2642 }
2643 BufferHeader = BufferHeader->b_reqnext;
2644 }
2645 if (SegmentNumber != Command->SegmentCount)
2646 panic("DAC960: SegmentNumber != SegmentCount\n");
2647 }
2648 DAC960_QueueCommand(Command);
2649 }
2650
2651
2652 /*
2653 DAC960_V2_QueueReadWriteCommand prepares and queues a Read/Write Command for
2654 DAC960 V2 Firmware Controllers.
2655 */
2656
2657 static void DAC960_V2_QueueReadWriteCommand(DAC960_Command_T *Command)
2658 {
2659 DAC960_Controller_T *Controller = Command->Controller;
2660 DAC960_V2_CommandMailbox_T *CommandMailbox = &Command->V2.CommandMailbox;
2661 DAC960_V2_ClearCommand(Command);
2662 CommandMailbox->SCSI_10.CommandOpcode = DAC960_V2_SCSI_10;
2663 CommandMailbox->SCSI_10.CommandControlBits.DataTransferControllerToHost =
2664 (Command->CommandType == DAC960_ReadCommand);
2665 CommandMailbox->SCSI_10.DataTransferSize =
2666 Command->BlockCount << DAC960_BlockSizeBits;
2667 CommandMailbox->SCSI_10.RequestSenseBusAddress =
2668 Virtual_to_Bus(&Command->V2.RequestSense);
2669 CommandMailbox->SCSI_10.PhysicalDevice =
2670 Controller->V2.LogicalDriveToVirtualDevice[Command->LogicalDriveNumber];
2671 CommandMailbox->SCSI_10.RequestSenseSize =
2672 sizeof(DAC960_SCSI_RequestSense_T);
2673 CommandMailbox->SCSI_10.CDBLength = 10;
2674 CommandMailbox->SCSI_10.SCSI_CDB[0] =
2675 (Command->CommandType == DAC960_ReadCommand ? 0x28 : 0x2A);
2676 CommandMailbox->SCSI_10.SCSI_CDB[2] = Command->BlockNumber >> 24;
2677 CommandMailbox->SCSI_10.SCSI_CDB[3] = Command->BlockNumber >> 16;
2678 CommandMailbox->SCSI_10.SCSI_CDB[4] = Command->BlockNumber >> 8;
2679 CommandMailbox->SCSI_10.SCSI_CDB[5] = Command->BlockNumber;
2680 CommandMailbox->SCSI_10.SCSI_CDB[7] = Command->BlockCount >> 8;
2681 CommandMailbox->SCSI_10.SCSI_CDB[8] = Command->BlockCount;
2682 if (Command->SegmentCount == 1)
2683 {
2684 CommandMailbox->SCSI_10.DataTransferMemoryAddress
2685 .ScatterGatherSegments[0]
2686 .SegmentDataPointer =
2687 Virtual_to_Bus(Command->RequestBuffer);
2688 CommandMailbox->SCSI_10.DataTransferMemoryAddress
2689 .ScatterGatherSegments[0]
2690 .SegmentByteCount =
2691 CommandMailbox->SCSI_10.DataTransferSize;
2692 }
2693 else
2694 {
2695 DAC960_V2_ScatterGatherSegment_T
2696 *ScatterGatherList = Command->V2.ScatterGatherList;
2697 BufferHeader_T *BufferHeader = Command->BufferHeader;
2698 char *LastDataEndPointer = NULL;
2699 int SegmentNumber = 0;
2700 if (Command->SegmentCount > 2)
2701 {
2702 CommandMailbox->SCSI_10.CommandControlBits
2703 .AdditionalScatterGatherListMemory = true;
2704 CommandMailbox->SCSI_10.DataTransferMemoryAddress
2705 .ExtendedScatterGather.ScatterGatherList0Length =
2706 Command->SegmentCount;
2707 CommandMailbox->SCSI_10.DataTransferMemoryAddress
2708 .ExtendedScatterGather.ScatterGatherList0Address =
2709 Virtual_to_Bus(ScatterGatherList);
2710 }
2711 else
2712 ScatterGatherList =
2713 CommandMailbox->SCSI_10.DataTransferMemoryAddress
2714 .ScatterGatherSegments;
2715 while (BufferHeader != NULL)
2716 {
2717 if (BufferHeader->b_data == LastDataEndPointer)
2718 {
2719 ScatterGatherList[SegmentNumber-1].SegmentByteCount +=
2720 BufferHeader->b_size;
2721 LastDataEndPointer += BufferHeader->b_size;
2722 }
2723 else
2724 {
2725 ScatterGatherList[SegmentNumber].SegmentDataPointer =
2726 Virtual_to_Bus(BufferHeader->b_data);
2727 ScatterGatherList[SegmentNumber].SegmentByteCount =
2728 BufferHeader->b_size;
2729 LastDataEndPointer = BufferHeader->b_data + BufferHeader->b_size;
2730 if (SegmentNumber++ > Controller->DriverScatterGatherLimit)
2731 panic("DAC960: Scatter/Gather Segment Overflow\n");
2732 }
2733 BufferHeader = BufferHeader->b_reqnext;
2734 }
2735 if (SegmentNumber != Command->SegmentCount)
2736 panic("DAC960: SegmentNumber != SegmentCount\n");
2737 }
2738 DAC960_QueueCommand(Command);
2739 }
2740
2741
2742 /*
2743 DAC960_ProcessRequest attempts to remove one I/O Request from Controller's
2744 I/O Request Queue and queues it to the Controller. WaitForCommand is true if
2745 this function should wait for a Command to become available if necessary.
2746 This function returns true if an I/O Request was queued and false otherwise.
2747 */
2748
2749 static boolean DAC960_ProcessRequest(DAC960_Controller_T *Controller,
2750 boolean WaitForCommand)
2751 {
2752 RequestQueue_T *RequestQueue = Controller->RequestQueue;
2753 ListHead_T *RequestQueueHead;
2754 IO_Request_T *Request;
2755 DAC960_Command_T *Command;
2756 if (RequestQueue == NULL) return false;
2757 RequestQueueHead = &RequestQueue->queue_head;
2758 while (true)
2759 {
2760 if (list_empty(RequestQueueHead)) return false;
2761 Request = blkdev_entry_next_request(RequestQueueHead);
2762 Command = DAC960_AllocateCommand(Controller);
2763 if (Command != NULL) break;
2764 if (!WaitForCommand) return false;
2765 DAC960_WaitForCommand(Controller);
2766 }
2767 if (Request->cmd == READ)
2768 Command->CommandType = DAC960_ReadCommand;
2769 else Command->CommandType = DAC960_WriteCommand;
2770 Command->Semaphore = Request->sem;
2771 Command->LogicalDriveNumber = DAC960_LogicalDriveNumber(Request->rq_dev);
2772 Command->BlockNumber =
2773 Request->sector
2774 + Controller->GenericDiskInfo.part[MINOR(Request->rq_dev)].start_sect;
2775 Command->BlockCount = Request->nr_sectors;
2776 Command->SegmentCount = Request->nr_segments;
2777 Command->BufferHeader = Request->bh;
2778 Command->RequestBuffer = Request->buffer;
2779 blkdev_dequeue_request(Request);
2780 blkdev_release_request(Request);
2781 DAC960_QueueReadWriteCommand(Command);
2782 return true;
2783 }
2784
2785
2786 /*
2787 DAC960_ProcessRequests attempts to remove as many I/O Requests as possible
2788 from Controller's I/O Request Queue and queue them to the Controller.
2789 */
2790
2791 static inline void DAC960_ProcessRequests(DAC960_Controller_T *Controller)
2792 {
2793 int Counter = 0;
2794 while (DAC960_ProcessRequest(Controller, Counter++ == 0)) ;
2795 }
2796
2797
2798 /*
2799 DAC960_RequestFunction is the I/O Request Function for DAC960 Controllers.
2800 */
2801
2802 static void DAC960_RequestFunction(RequestQueue_T *RequestQueue)
2803 {
2804 DAC960_Controller_T *Controller =
2805 (DAC960_Controller_T *) RequestQueue->queuedata;
2806 ProcessorFlags_T ProcessorFlags;
2807 /*
2808 Acquire exclusive access to Controller.
2809 */
2810 DAC960_AcquireControllerLockRF(Controller, &ProcessorFlags);
2811 /*
2812 Process I/O Requests for Controller.
2813 */
2814 DAC960_ProcessRequests(Controller);
2815 /*
2816 Release exclusive access to Controller.
2817 */
2818 DAC960_ReleaseControllerLockRF(Controller, &ProcessorFlags);
2819 }
2820
2821
2822 /*
2823 DAC960_ProcessCompletedBuffer performs completion processing for an
2824 individual Buffer.
2825 */
2826
2827 static inline void DAC960_ProcessCompletedBuffer(BufferHeader_T *BufferHeader,
2828 boolean SuccessfulIO)
2829 {
2830 blk_finished_io(BufferHeader->b_size >> 9);
2831 BufferHeader->b_end_io(BufferHeader, SuccessfulIO);
2832 }
2833
2834
2835 /*
2836 DAC960_V1_ReadWriteError prints an appropriate error message for Command
2837 when an error occurs on a Read or Write operation.
2838 */
2839
2840 static void DAC960_V1_ReadWriteError(DAC960_Command_T *Command)
2841 {
2842 DAC960_Controller_T *Controller = Command->Controller;
2843 unsigned char *CommandName = "UNKNOWN";
2844 switch (Command->CommandType)
2845 {
2846 case DAC960_ReadCommand:
2847 case DAC960_ReadRetryCommand:
2848 CommandName = "READ";
2849 break;
2850 case DAC960_WriteCommand:
2851 case DAC960_WriteRetryCommand:
2852 CommandName = "WRITE";
2853 break;
2854 case DAC960_MonitoringCommand:
2855 case DAC960_ImmediateCommand:
2856 case DAC960_QueuedCommand:
2857 break;
2858 }
2859 switch (Command->V1.CommandStatus)
2860 {
2861 case DAC960_V1_IrrecoverableDataError:
2862 DAC960_Error("Irrecoverable Data Error on %s:\n",
2863 Controller, CommandName);
2864 break;
2865 case DAC960_V1_LogicalDriveNonexistentOrOffline:
2866 DAC960_Error("Logical Drive Nonexistent or Offline on %s:\n",
2867 Controller, CommandName);
2868 break;
2869 case DAC960_V1_AccessBeyondEndOfLogicalDrive:
2870 DAC960_Error("Attempt to Access Beyond End of Logical Drive "
2871 "on %s:\n", Controller, CommandName);
2872 break;
2873 case DAC960_V1_BadDataEncountered:
2874 DAC960_Error("Bad Data Encountered on %s:\n", Controller, CommandName);
2875 break;
2876 default:
2877 DAC960_Error("Unexpected Error Status %04X on %s:\n",
2878 Controller, Command->V1.CommandStatus, CommandName);
2879 break;
2880 }
2881 DAC960_Error(" /dev/rd/c%dd%d: absolute blocks %d..%d\n",
2882 Controller, Controller->ControllerNumber,
2883 Command->LogicalDriveNumber, Command->BlockNumber,
2884 Command->BlockNumber + Command->BlockCount - 1);
2885 if (DAC960_PartitionNumber(Command->BufferHeader->b_rdev) > 0)
2886 DAC960_Error(" /dev/rd/c%dd%dp%d: relative blocks %d..%d\n",
2887 Controller, Controller->ControllerNumber,
2888 Command->LogicalDriveNumber,
2889 DAC960_PartitionNumber(Command->BufferHeader->b_rdev),
2890 Command->BufferHeader->b_rsector,
2891 Command->BufferHeader->b_rsector + Command->BlockCount - 1);
2892 }
2893
2894
2895 /*
2896 DAC960_V1_ProcessCompletedCommand performs completion processing for Command
2897 for DAC960 V1 Firmware Controllers.
2898 */
2899
2900 static void DAC960_V1_ProcessCompletedCommand(DAC960_Command_T *Command)
2901 {
2902 DAC960_Controller_T *Controller = Command->Controller;
2903 DAC960_CommandType_T CommandType = Command->CommandType;
2904 DAC960_V1_CommandOpcode_T CommandOpcode =
2905 Command->V1.CommandMailbox.Common.CommandOpcode;
2906 DAC960_V1_CommandStatus_T CommandStatus = Command->V1.CommandStatus;
2907 BufferHeader_T *BufferHeader = Command->BufferHeader;
2908 if (CommandType == DAC960_ReadCommand ||
2909 CommandType == DAC960_WriteCommand)
2910 {
2911 if (CommandStatus == DAC960_V1_NormalCompletion)
2912 {
2913 /*
2914 Perform completion processing for all buffers in this I/O Request.
2915 */
2916 while (BufferHeader != NULL)
2917 {
2918 BufferHeader_T *NextBufferHeader = BufferHeader->b_reqnext;
2919 BufferHeader->b_reqnext = NULL;
2920 DAC960_ProcessCompletedBuffer(BufferHeader, true);
2921 BufferHeader = NextBufferHeader;
2922 }
2923 /*
2924 Wake up requestor for swap file paging requests.
2925 */
2926 if (Command->Semaphore != NULL)
2927 {
2928 up(Command->Semaphore);
2929 Command->Semaphore = NULL;
2930 }
2931 add_blkdev_randomness(DAC960_MAJOR + Controller->ControllerNumber);
2932 }
2933 else if ((CommandStatus == DAC960_V1_IrrecoverableDataError ||
2934 CommandStatus == DAC960_V1_BadDataEncountered) &&
2935 BufferHeader != NULL &&
2936 BufferHeader->b_reqnext != NULL)
2937 {
2938 DAC960_V1_CommandMailbox_T *CommandMailbox =
2939 &Command->V1.CommandMailbox;
2940 if (CommandType == DAC960_ReadCommand)
2941 {
2942 Command->CommandType = DAC960_ReadRetryCommand;
2943 CommandMailbox->Type5.CommandOpcode = DAC960_V1_Read;
2944 }
2945 else
2946 {
2947 Command->CommandType = DAC960_WriteRetryCommand;
2948 CommandMailbox->Type5.CommandOpcode = DAC960_V1_Write;
2949 }
2950 Command->BlockCount = BufferHeader->b_size >> DAC960_BlockSizeBits;
2951 CommandMailbox->Type5.LD.TransferLength = Command->BlockCount;
2952 CommandMailbox->Type5.BusAddress =
2953 Virtual_to_Bus(BufferHeader->b_data);
2954 DAC960_QueueCommand(Command);
2955 return;
2956 }
2957 else
2958 {
2959 if (CommandStatus != DAC960_V1_LogicalDriveNonexistentOrOffline)
2960 DAC960_V1_ReadWriteError(Command);
2961 /*
2962 Perform completion processing for all buffers in this I/O Request.
2963 */
2964 while (BufferHeader != NULL)
2965 {
2966 BufferHeader_T *NextBufferHeader = BufferHeader->b_reqnext;
2967 BufferHeader->b_reqnext = NULL;
2968 DAC960_ProcessCompletedBuffer(BufferHeader, false);
2969 BufferHeader = NextBufferHeader;
2970 }
2971 /*
2972 Wake up requestor for swap file paging requests.
2973 */
2974 if (Command->Semaphore != NULL)
2975 {
2976 up(Command->Semaphore);
2977 Command->Semaphore = NULL;
2978 }
2979 }
2980 }
2981 else if (CommandType == DAC960_ReadRetryCommand ||
2982 CommandType == DAC960_WriteRetryCommand)
2983 {
2984 BufferHeader_T *NextBufferHeader = BufferHeader->b_reqnext;
2985 BufferHeader->b_reqnext = NULL;
2986 /*
2987 Perform completion processing for this single buffer.
2988 */
2989 if (CommandStatus == DAC960_V1_NormalCompletion)
2990 DAC960_ProcessCompletedBuffer(BufferHeader, true);
2991 else
2992 {
2993 if (CommandStatus != DAC960_V1_LogicalDriveNonexistentOrOffline)
2994 DAC960_V1_ReadWriteError(Command);
2995 DAC960_ProcessCompletedBuffer(BufferHeader, false);
2996 }
2997 if (NextBufferHeader != NULL)
2998 {
2999 DAC960_V1_CommandMailbox_T *CommandMailbox =
3000 &Command->V1.CommandMailbox;
3001 Command->BlockNumber +=
3002 BufferHeader->b_size >> DAC960_BlockSizeBits;
3003 Command->BlockCount =
3004 NextBufferHeader->b_size >> DAC960_BlockSizeBits;
3005 Command->BufferHeader = NextBufferHeader;
3006 CommandMailbox->Type5.LD.TransferLength = Command->BlockCount;
3007 CommandMailbox->Type5.LogicalBlockAddress = Command->BlockNumber;
3008 CommandMailbox->Type5.BusAddress =
3009 Virtual_to_Bus(NextBufferHeader->b_data);
3010 DAC960_QueueCommand(Command);
3011 return;
3012 }
3013 }
3014 else if (CommandType == DAC960_MonitoringCommand ||
3015 CommandOpcode == DAC960_V1_Enquiry ||
3016 CommandOpcode == DAC960_V1_GetRebuildProgress)
3017 {
3018 if (CommandType != DAC960_MonitoringCommand)
3019 {
3020 if (CommandOpcode == DAC960_V1_Enquiry)
3021 memcpy(&Controller->V1.NewEnquiry,
3022 Bus_to_Virtual(Command->V1.CommandMailbox.Type3.BusAddress),
3023 sizeof(DAC960_V1_Enquiry_T));
3024 else if (CommandOpcode == DAC960_V1_GetRebuildProgress)
3025 memcpy(&Controller->V1.RebuildProgress,
3026 Bus_to_Virtual(Command->V1.CommandMailbox.Type3.BusAddress),
3027 sizeof(DAC960_V1_RebuildProgress_T));
3028 }
3029 if (CommandOpcode == DAC960_V1_Enquiry &&
3030 Controller->ControllerInitialized)
3031 {
3032 DAC960_V1_Enquiry_T *OldEnquiry = &Controller->V1.Enquiry;
3033 DAC960_V1_Enquiry_T *NewEnquiry = &Controller->V1.NewEnquiry;
3034 unsigned int OldCriticalLogicalDriveCount =
3035 OldEnquiry->CriticalLogicalDriveCount;
3036 unsigned int NewCriticalLogicalDriveCount =
3037 NewEnquiry->CriticalLogicalDriveCount;
3038 if (NewEnquiry->NumberOfLogicalDrives > Controller->LogicalDriveCount)
3039 {
3040 int LogicalDriveNumber = Controller->LogicalDriveCount;
3041 while (LogicalDriveNumber < NewEnquiry->NumberOfLogicalDrives)
3042 {
3043 DAC960_Critical("Logical Drive %d (/dev/rd/c%dd%d) "
3044 "Now Exists\n", Controller,
3045 LogicalDriveNumber,
3046 Controller->ControllerNumber,
3047 LogicalDriveNumber);
3048 LogicalDriveNumber++;
3049 }
3050 Controller->LogicalDriveCount = LogicalDriveNumber;
3051 }
3052 if (NewEnquiry->StatusFlags.DeferredWriteError !=
3053 OldEnquiry->StatusFlags.DeferredWriteError)
3054 DAC960_Critical("Deferred Write Error Flag is now %s\n", Controller,
3055 (NewEnquiry->StatusFlags.DeferredWriteError
3056 ? "TRUE" : "FALSE"));
3057 if ((NewCriticalLogicalDriveCount > 0 ||
3058 NewCriticalLogicalDriveCount != OldCriticalLogicalDriveCount) ||
3059 (NewEnquiry->OfflineLogicalDriveCount > 0 ||
3060 NewEnquiry->OfflineLogicalDriveCount !=
3061 OldEnquiry->OfflineLogicalDriveCount) ||
3062 (NewEnquiry->DeadDriveCount > 0 ||
3063 NewEnquiry->DeadDriveCount !=
3064 OldEnquiry->DeadDriveCount) ||
3065 (NewEnquiry->EventLogSequenceNumber !=
3066 OldEnquiry->EventLogSequenceNumber) ||
3067 Controller->MonitoringTimerCount == 0 ||
3068 (jiffies - Controller->SecondaryMonitoringTime
3069 >= DAC960_SecondaryMonitoringInterval))
3070 {
3071 Controller->V1.NeedLogicalDriveInformation = true;
3072 Controller->V1.NewEventLogSequenceNumber =
3073 NewEnquiry->EventLogSequenceNumber;
3074 Controller->V1.NeedErrorTableInformation = true;
3075 Controller->V1.NeedDeviceStateInformation = true;
3076 Controller->V1.DeviceStateChannel = 0;
3077 Controller->V1.DeviceStateTargetID = -1;
3078 Controller->SecondaryMonitoringTime = jiffies;
3079 }
3080 if (NewEnquiry->RebuildFlag == DAC960_V1_StandbyRebuildInProgress ||
3081 NewEnquiry->RebuildFlag
3082 == DAC960_V1_BackgroundRebuildInProgress ||
3083 OldEnquiry->RebuildFlag == DAC960_V1_StandbyRebuildInProgress ||
3084 OldEnquiry->RebuildFlag == DAC960_V1_BackgroundRebuildInProgress)
3085 {
3086 Controller->V1.NeedRebuildProgress = true;
3087 Controller->V1.RebuildProgressFirst =
3088 (NewEnquiry->CriticalLogicalDriveCount <
3089 OldEnquiry->CriticalLogicalDriveCount);
3090 }
3091 if (OldEnquiry->RebuildFlag == DAC960_V1_BackgroundCheckInProgress)
3092 switch (NewEnquiry->RebuildFlag)
3093 {
3094 case DAC960_V1_NoStandbyRebuildOrCheckInProgress:
3095 DAC960_Progress("Consistency Check Completed Successfully\n",
3096 Controller);
3097 break;
3098 case DAC960_V1_StandbyRebuildInProgress:
3099 case DAC960_V1_BackgroundRebuildInProgress:
3100 break;
3101 case DAC960_V1_BackgroundCheckInProgress:
3102 Controller->V1.NeedConsistencyCheckProgress = true;
3103 break;
3104 case DAC960_V1_StandbyRebuildCompletedWithError:
3105 DAC960_Progress("Consistency Check Completed with Error\n",
3106 Controller);
3107 break;
3108 case DAC960_V1_BackgroundRebuildOrCheckFailed_DriveFailed:
3109 DAC960_Progress("Consistency Check Failed - "
3110 "Physical Device Failed\n", Controller);
3111 break;
3112 case DAC960_V1_BackgroundRebuildOrCheckFailed_LogicalDriveFailed:
3113 DAC960_Progress("Consistency Check Failed - "
3114 "Logical Drive Failed\n", Controller);
3115 break;
3116 case DAC960_V1_BackgroundRebuildOrCheckFailed_OtherCauses:
3117 DAC960_Progress("Consistency Check Failed - Other Causes\n",
3118 Controller);
3119 break;
3120 case DAC960_V1_BackgroundRebuildOrCheckSuccessfullyTerminated:
3121 DAC960_Progress("Consistency Check Successfully Terminated\n",
3122 Controller);
3123 break;
3124 }
3125 else if (NewEnquiry->RebuildFlag
3126 == DAC960_V1_BackgroundCheckInProgress)
3127 Controller->V1.NeedConsistencyCheckProgress = true;
3128 Controller->MonitoringAlertMode =
3129 (NewEnquiry->CriticalLogicalDriveCount > 0 ||
3130 NewEnquiry->OfflineLogicalDriveCount > 0 ||
3131 NewEnquiry->DeadDriveCount > 0);
3132 if (CommandType != DAC960_MonitoringCommand &&
3133 Controller->V1.RebuildFlagPending)
3134 {
3135 DAC960_V1_Enquiry_T *Enquiry = (DAC960_V1_Enquiry_T *)
3136 Bus_to_Virtual(Command->V1.CommandMailbox.Type3.BusAddress);
3137 Enquiry->RebuildFlag = Controller->V1.PendingRebuildFlag;
3138 Controller->V1.RebuildFlagPending = false;
3139 }
3140 else if (CommandType == DAC960_MonitoringCommand &&
3141 NewEnquiry->RebuildFlag >
3142 DAC960_V1_BackgroundCheckInProgress)
3143 {
3144 Controller->V1.PendingRebuildFlag = NewEnquiry->RebuildFlag;
3145 Controller->V1.RebuildFlagPending = true;
3146 }
3147 memcpy(&Controller->V1.Enquiry, &Controller->V1.NewEnquiry,
3148 sizeof(DAC960_V1_Enquiry_T));
3149 }
3150 else if (CommandOpcode == DAC960_V1_PerformEventLogOperation)
3151 {
3152 static char
3153 *DAC960_EventMessages[] =
3154 { "killed because write recovery failed",
3155 "killed because of SCSI bus reset failure",
3156 "killed because of double check condition",
3157 "killed because it was removed",
3158 "killed because of gross error on SCSI chip",
3159 "killed because of bad tag returned from drive",
3160 "killed because of timeout on SCSI command",
3161 "killed because of reset SCSI command issued from system",
3162 "killed because busy or parity error count exceeded limit",
3163 "killed because of 'kill drive' command from system",
3164 "killed because of selection timeout",
3165 "killed due to SCSI phase sequence error",
3166 "killed due to unknown status" };
3167 DAC960_V1_EventLogEntry_T *EventLogEntry =
3168 &Controller->V1.EventLogEntry;
3169 if (EventLogEntry->SequenceNumber ==
3170 Controller->V1.OldEventLogSequenceNumber)
3171 {
3172 unsigned char SenseKey = EventLogEntry->SenseKey;
3173 unsigned char AdditionalSenseCode =
3174 EventLogEntry->AdditionalSenseCode;
3175 unsigned char AdditionalSenseCodeQualifier =
3176 EventLogEntry->AdditionalSenseCodeQualifier;
3177 if (SenseKey == DAC960_SenseKey_VendorSpecific &&
3178 AdditionalSenseCode == 0x80 &&
3179 AdditionalSenseCodeQualifier <
3180 sizeof(DAC960_EventMessages) / sizeof(char *))
3181 DAC960_Critical("Physical Device %d:%d %s\n", Controller,
3182 EventLogEntry->Channel,
3183 EventLogEntry->TargetID,
3184 DAC960_EventMessages[
3185 AdditionalSenseCodeQualifier]);
3186 else if (SenseKey == DAC960_SenseKey_UnitAttention &&
3187 AdditionalSenseCode == 0x29)
3188 {
3189 if (Controller->MonitoringTimerCount > 0)
3190 Controller->V1.DeviceResetCount[EventLogEntry->Channel]
3191 [EventLogEntry->TargetID]++;
3192 }
3193 else if (!(SenseKey == DAC960_SenseKey_NoSense ||
3194 (SenseKey == DAC960_SenseKey_NotReady &&
3195 AdditionalSenseCode == 0x04 &&
3196 (AdditionalSenseCodeQualifier == 0x01 ||
3197 AdditionalSenseCodeQualifier == 0x02))))
3198 {
3199 DAC960_Critical("Physical Device %d:%d Error Log: "
3200 "Sense Key = %d, ASC = %02X, ASCQ = %02X\n",
3201 Controller,
3202 EventLogEntry->Channel,
3203 EventLogEntry->TargetID,
3204 SenseKey,
3205 AdditionalSenseCode,
3206 AdditionalSenseCodeQualifier);
3207 DAC960_Critical("Physical Device %d:%d Error Log: "
3208 "Information = %02X%02X%02X%02X "
3209 "%02X%02X%02X%02X\n",
3210 Controller,
3211 EventLogEntry->Channel,
3212 EventLogEntry->TargetID,
3213 EventLogEntry->Information[0],
3214 EventLogEntry->Information[1],
3215 EventLogEntry->Information[2],
3216 EventLogEntry->Information[3],
3217 EventLogEntry->CommandSpecificInformation[0],
3218 EventLogEntry->CommandSpecificInformation[1],
3219 EventLogEntry->CommandSpecificInformation[2],
3220 EventLogEntry->CommandSpecificInformation[3]);
3221 }
3222 }
3223 Controller->V1.OldEventLogSequenceNumber++;
3224 }
3225 else if (CommandOpcode == DAC960_V1_GetErrorTable)
3226 {
3227 DAC960_V1_ErrorTable_T *OldErrorTable = &Controller->V1.ErrorTable;
3228 DAC960_V1_ErrorTable_T *NewErrorTable = &Controller->V1.NewErrorTable;
3229 int Channel, TargetID;
3230 for (Channel = 0; Channel < Controller->Channels; Channel++)
3231 for (TargetID = 0; TargetID < Controller->Targets; TargetID++)
3232 {
3233 DAC960_V1_ErrorTableEntry_T *NewErrorEntry =
3234 &NewErrorTable->ErrorTableEntries[Channel][TargetID];
3235 DAC960_V1_ErrorTableEntry_T *OldErrorEntry =
3236 &OldErrorTable->ErrorTableEntries[Channel][TargetID];
3237 if ((NewErrorEntry->ParityErrorCount !=
3238 OldErrorEntry->ParityErrorCount) ||
3239 (NewErrorEntry->SoftErrorCount !=
3240 OldErrorEntry->SoftErrorCount) ||
3241 (NewErrorEntry->HardErrorCount !=
3242 OldErrorEntry->HardErrorCount) ||
3243 (NewErrorEntry->MiscErrorCount !=
3244 OldErrorEntry->MiscErrorCount))
3245 DAC960_Critical("Physical Device %d:%d Errors: "
3246 "Parity = %d, Soft = %d, "
3247 "Hard = %d, Misc = %d\n",
3248 Controller, Channel, TargetID,
3249 NewErrorEntry->ParityErrorCount,
3250 NewErrorEntry->SoftErrorCount,
3251 NewErrorEntry->HardErrorCount,
3252 NewErrorEntry->MiscErrorCount);
3253 }
3254 memcpy(&Controller->V1.ErrorTable, &Controller->V1.NewErrorTable,
3255 sizeof(DAC960_V1_ErrorTable_T));
3256 }
3257 else if (CommandOpcode == DAC960_V1_GetDeviceState)
3258 {
3259 DAC960_V1_DeviceState_T *OldDeviceState =
3260 &Controller->V1.DeviceState[Controller->V1.DeviceStateChannel]
3261 [Controller->V1.DeviceStateTargetID];
3262 DAC960_V1_DeviceState_T *NewDeviceState =
3263 &Controller->V1.NewDeviceState;
3264 if (NewDeviceState->DeviceState != OldDeviceState->DeviceState)
3265 DAC960_Critical("Physical Device %d:%d is now %s\n", Controller,
3266 Controller->V1.DeviceStateChannel,
3267 Controller->V1.DeviceStateTargetID,
3268 (NewDeviceState->DeviceState
3269 == DAC960_V1_Device_Dead
3270 ? "DEAD"
3271 : NewDeviceState->DeviceState
3272 == DAC960_V1_Device_WriteOnly
3273 ? "WRITE-ONLY"
3274 : NewDeviceState->DeviceState
3275 == DAC960_V1_Device_Online
3276 ? "ONLINE" : "STANDBY"));
3277 if (OldDeviceState->DeviceState == DAC960_V1_Device_Dead &&
3278 NewDeviceState->DeviceState != DAC960_V1_Device_Dead)
3279 {
3280 Controller->V1.NeedDeviceInquiryInformation = true;
3281 Controller->V1.NeedDeviceSerialNumberInformation = true;
3282 }
3283 memcpy(OldDeviceState, NewDeviceState,
3284 sizeof(DAC960_V1_DeviceState_T));
3285 }
3286 else if (CommandOpcode == DAC960_V1_GetLogicalDriveInformation)
3287 {
3288 int LogicalDriveNumber;
3289 for (LogicalDriveNumber = 0;
3290 LogicalDriveNumber < Controller->LogicalDriveCount;
3291 LogicalDriveNumber++)
3292 {
3293 DAC960_V1_LogicalDriveInformation_T *OldLogicalDriveInformation =
3294 &Controller->V1.LogicalDriveInformation[LogicalDriveNumber];
3295 DAC960_V1_LogicalDriveInformation_T *NewLogicalDriveInformation =
3296 &Controller->V1.NewLogicalDriveInformation[LogicalDriveNumber];
3297 if (NewLogicalDriveInformation->LogicalDriveState !=
3298 OldLogicalDriveInformation->LogicalDriveState)
3299 DAC960_Critical("Logical Drive %d (/dev/rd/c%dd%d) "
3300 "is now %s\n", Controller,
3301 LogicalDriveNumber,
3302 Controller->ControllerNumber,
3303 LogicalDriveNumber,
3304 (NewLogicalDriveInformation->LogicalDriveState
3305 == DAC960_V1_LogicalDrive_Online
3306 ? "ONLINE"
3307 : NewLogicalDriveInformation->LogicalDriveState
3308 == DAC960_V1_LogicalDrive_Critical
3309 ? "CRITICAL" : "OFFLINE"));
3310 if (NewLogicalDriveInformation->WriteBack !=
3311 OldLogicalDriveInformation->WriteBack)
3312 DAC960_Critical("Logical Drive %d (/dev/rd/c%dd%d) "
3313 "is now %s\n", Controller,
3314 LogicalDriveNumber,
3315 Controller->ControllerNumber,
3316 LogicalDriveNumber,
3317 (NewLogicalDriveInformation->WriteBack
3318 ? "WRITE BACK" : "WRITE THRU"));
3319 }
3320 memcpy(&Controller->V1.LogicalDriveInformation,
3321 &Controller->V1.NewLogicalDriveInformation,
3322 sizeof(DAC960_V1_LogicalDriveInformationArray_T));
3323 }
3324 else if (CommandOpcode == DAC960_V1_GetRebuildProgress)
3325 {
3326 unsigned int LogicalDriveNumber =
3327 Controller->V1.RebuildProgress.LogicalDriveNumber;
3328 unsigned int LogicalDriveSize =
3329 Controller->V1.RebuildProgress.LogicalDriveSize;
3330 unsigned int BlocksCompleted =
3331 LogicalDriveSize - Controller->V1.RebuildProgress.RemainingBlocks;
3332 if (CommandStatus == DAC960_V1_NoRebuildOrCheckInProgress &&
3333 Controller->V1.LastRebuildStatus == DAC960_V1_NormalCompletion)
3334 CommandStatus = DAC960_V1_RebuildSuccessful;
3335 switch (CommandStatus)
3336 {
3337 case DAC960_V1_NormalCompletion:
3338 Controller->EphemeralProgressMessage = true;
3339 DAC960_Progress("Rebuild in Progress: "
3340 "Logical Drive %d (/dev/rd/c%dd%d) "
3341 "%d%% completed\n",
3342 Controller, LogicalDriveNumber,
3343 Controller->ControllerNumber,
3344 LogicalDriveNumber,
3345 (100 * (BlocksCompleted >> 7))
3346 / (LogicalDriveSize >> 7));
3347 Controller->EphemeralProgressMessage = false;
3348 break;
3349 case DAC960_V1_RebuildFailed_LogicalDriveFailure:
3350 DAC960_Progress("Rebuild Failed due to "
3351 "Logical Drive Failure\n", Controller);
3352 break;
3353 case DAC960_V1_RebuildFailed_BadBlocksOnOther:
3354 DAC960_Progress("Rebuild Failed due to "
3355 "Bad Blocks on Other Drives\n", Controller);
3356 break;
3357 case DAC960_V1_RebuildFailed_NewDriveFailed:
3358 DAC960_Progress("Rebuild Failed due to "
3359 "Failure of Drive Being Rebuilt\n", Controller);
3360 break;
3361 case DAC960_V1_NoRebuildOrCheckInProgress:
3362 break;
3363 case DAC960_V1_RebuildSuccessful:
3364 DAC960_Progress("Rebuild Completed Successfully\n", Controller);
3365 break;
3366 case DAC960_V1_RebuildSuccessfullyTerminated:
3367 DAC960_Progress("Rebuild Successfully Terminated\n", Controller);
3368 break;
3369 }
3370 Controller->V1.LastRebuildStatus = CommandStatus;
3371 if (CommandType != DAC960_MonitoringCommand &&
3372 Controller->V1.RebuildStatusPending)
3373 {
3374 Command->V1.CommandStatus = Controller->V1.PendingRebuildStatus;
3375 Controller->V1.RebuildStatusPending = false;
3376 }
3377 else if (CommandType == DAC960_MonitoringCommand &&
3378 CommandStatus != DAC960_V1_NormalCompletion &&
3379 CommandStatus != DAC960_V1_NoRebuildOrCheckInProgress)
3380 {
3381 Controller->V1.PendingRebuildStatus = CommandStatus;
3382 Controller->V1.RebuildStatusPending = true;
3383 }
3384 }
3385 else if (CommandOpcode == DAC960_V1_RebuildStat)
3386 {
3387 unsigned int LogicalDriveNumber =
3388 Controller->V1.RebuildProgress.LogicalDriveNumber;
3389 unsigned int LogicalDriveSize =
3390 Controller->V1.RebuildProgress.LogicalDriveSize;
3391 unsigned int BlocksCompleted =
3392 LogicalDriveSize - Controller->V1.RebuildProgress.RemainingBlocks;
3393 if (CommandStatus == DAC960_V1_NormalCompletion)
3394 {
3395 Controller->EphemeralProgressMessage = true;
3396 DAC960_Progress("Consistency Check in Progress: "
3397 "Logical Drive %d (/dev/rd/c%dd%d) "
3398 "%d%% completed\n",
3399 Controller, LogicalDriveNumber,
3400 Controller->ControllerNumber,
3401 LogicalDriveNumber,
3402 (100 * (BlocksCompleted >> 7))
3403 / (LogicalDriveSize >> 7));
3404 Controller->EphemeralProgressMessage = false;
3405 }
3406 }
3407 }
3408 if (CommandType == DAC960_MonitoringCommand)
3409 {
3410 if (Controller->V1.NewEventLogSequenceNumber
3411 - Controller->V1.OldEventLogSequenceNumber > 0)
3412 {
3413 Command->V1.CommandMailbox.Type3E.CommandOpcode =
3414 DAC960_V1_PerformEventLogOperation;
3415 Command->V1.CommandMailbox.Type3E.OperationType =
3416 DAC960_V1_GetEventLogEntry;
3417 Command->V1.CommandMailbox.Type3E.OperationQualifier = 1;
3418 Command->V1.CommandMailbox.Type3E.SequenceNumber =
3419 Controller->V1.OldEventLogSequenceNumber;
3420 Command->V1.CommandMailbox.Type3E.BusAddress =
3421 Virtual_to_Bus(&Controller->V1.EventLogEntry);
3422 DAC960_QueueCommand(Command);
3423 return;
3424 }
3425 if (Controller->V1.NeedErrorTableInformation)
3426 {
3427 Controller->V1.NeedErrorTableInformation = false;
3428 Command->V1.CommandMailbox.Type3.CommandOpcode =
3429 DAC960_V1_GetErrorTable;
3430 Command->V1.CommandMailbox.Type3.BusAddress =
3431 Virtual_to_Bus(&Controller->V1.NewErrorTable);
3432 DAC960_QueueCommand(Command);
3433 return;
3434 }
3435 if (Controller->V1.NeedRebuildProgress &&
3436 Controller->V1.RebuildProgressFirst)
3437 {
3438 Controller->V1.NeedRebuildProgress = false;
3439 Command->V1.CommandMailbox.Type3.CommandOpcode =
3440 DAC960_V1_GetRebuildProgress;
3441 Command->V1.CommandMailbox.Type3.BusAddress =
3442 Virtual_to_Bus(&Controller->V1.RebuildProgress);
3443 DAC960_QueueCommand(Command);
3444 return;
3445 }
3446 if (Controller->V1.NeedDeviceStateInformation)
3447 {
3448 if (Controller->V1.NeedDeviceInquiryInformation)
3449 {
3450 DAC960_V1_DCDB_T *DCDB = &Controller->V1.MonitoringDCDB;
3451 DAC960_SCSI_Inquiry_T *InquiryStandardData =
3452 &Controller->V1.InquiryStandardData
3453 [Controller->V1.DeviceStateChannel]
3454 [Controller->V1.DeviceStateTargetID];
3455 InquiryStandardData->PeripheralDeviceType = 0x1F;
3456 Command->V1.CommandMailbox.Type3.CommandOpcode = DAC960_V1_DCDB;
3457 Command->V1.CommandMailbox.Type3.BusAddress =
3458 Virtual_to_Bus(DCDB);
3459 DCDB->Channel = Controller->V1.DeviceStateChannel;
3460 DCDB->TargetID = Controller->V1.DeviceStateTargetID;
3461 DCDB->Direction = DAC960_V1_DCDB_DataTransferDeviceToSystem;
3462 DCDB->EarlyStatus = false;
3463 DCDB->Timeout = DAC960_V1_DCDB_Timeout_10_seconds;
3464 DCDB->NoAutomaticRequestSense = false;
3465 DCDB->DisconnectPermitted = true;
3466 DCDB->TransferLength = sizeof(DAC960_SCSI_Inquiry_T);
3467 DCDB->BusAddress = Virtual_to_Bus(InquiryStandardData);
3468 DCDB->CDBLength = 6;
3469 DCDB->TransferLengthHigh4 = 0;
3470 DCDB->SenseLength = sizeof(DCDB->SenseData);
3471 DCDB->CDB[0] = 0x12; /* INQUIRY */
3472 DCDB->CDB[1] = 0; /* EVPD = 0 */
3473 DCDB->CDB[2] = 0; /* Page Code */
3474 DCDB->CDB[3] = 0; /* Reserved */
3475 DCDB->CDB[4] = sizeof(DAC960_SCSI_Inquiry_T);
3476 DCDB->CDB[5] = 0; /* Control */
3477 DAC960_QueueCommand(Command);
3478 Controller->V1.NeedDeviceInquiryInformation = false;
3479 return;
3480 }
3481 if (Controller->V1.NeedDeviceSerialNumberInformation)
3482 {
3483 DAC960_V1_DCDB_T *DCDB = &Controller->V1.MonitoringDCDB;
3484 DAC960_SCSI_Inquiry_UnitSerialNumber_T *InquiryUnitSerialNumber =
3485 &Controller->V1.InquiryUnitSerialNumber
3486 [Controller->V1.DeviceStateChannel]
3487 [Controller->V1.DeviceStateTargetID];
3488 InquiryUnitSerialNumber->PeripheralDeviceType = 0x1F;
3489 Command->V1.CommandMailbox.Type3.CommandOpcode = DAC960_V1_DCDB;
3490 Command->V1.CommandMailbox.Type3.BusAddress =
3491 Virtual_to_Bus(DCDB);
3492 DCDB->Channel = Controller->V1.DeviceStateChannel;
3493 DCDB->TargetID = Controller->V1.DeviceStateTargetID;
3494 DCDB->Direction = DAC960_V1_DCDB_DataTransferDeviceToSystem;
3495 DCDB->EarlyStatus = false;
3496 DCDB->Timeout = DAC960_V1_DCDB_Timeout_10_seconds;
3497 DCDB->NoAutomaticRequestSense = false;
3498 DCDB->DisconnectPermitted = true;
3499 DCDB->TransferLength =
3500 sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T);
3501 DCDB->BusAddress = Virtual_to_Bus(InquiryUnitSerialNumber);
3502 DCDB->CDBLength = 6;
3503 DCDB->TransferLengthHigh4 = 0;
3504 DCDB->SenseLength = sizeof(DCDB->SenseData);
3505 DCDB->CDB[0] = 0x12; /* INQUIRY */
3506 DCDB->CDB[1] = 1; /* EVPD = 1 */
3507 DCDB->CDB[2] = 0x80; /* Page Code */
3508 DCDB->CDB[3] = 0; /* Reserved */
3509 DCDB->CDB[4] = sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T);
3510 DCDB->CDB[5] = 0; /* Control */
3511 DAC960_QueueCommand(Command);
3512 Controller->V1.NeedDeviceSerialNumberInformation = false;
3513 return;
3514 }
3515 if (++Controller->V1.DeviceStateTargetID == Controller->Targets)
3516 {
3517 Controller->V1.DeviceStateChannel++;
3518 Controller->V1.DeviceStateTargetID = 0;
3519 }
3520 while (Controller->V1.DeviceStateChannel < Controller->Channels)
3521 {
3522 DAC960_V1_DeviceState_T *OldDeviceState =
3523 &Controller->V1.DeviceState[Controller->V1.DeviceStateChannel]
3524 [Controller->V1.DeviceStateTargetID];
3525 if (OldDeviceState->Present &&
3526 OldDeviceState->DeviceType == DAC960_V1_DiskType)
3527 {
3528 Command->V1.CommandMailbox.Type3D.CommandOpcode =
3529 DAC960_V1_GetDeviceState;
3530 Command->V1.CommandMailbox.Type3D.Channel =
3531 Controller->V1.DeviceStateChannel;
3532 Command->V1.CommandMailbox.Type3D.TargetID =
3533 Controller->V1.DeviceStateTargetID;
3534 Command->V1.CommandMailbox.Type3D.BusAddress =
3535 Virtual_to_Bus(&Controller->V1.NewDeviceState);
3536 DAC960_QueueCommand(Command);
3537 return;
3538 }
3539 if (++Controller->V1.DeviceStateTargetID == Controller->Targets)
3540 {
3541 Controller->V1.DeviceStateChannel++;
3542 Controller->V1.DeviceStateTargetID = 0;
3543 }
3544 }
3545 Controller->V1.NeedDeviceStateInformation = false;
3546 }
3547 if (Controller->V1.NeedLogicalDriveInformation)
3548 {
3549 Controller->V1.NeedLogicalDriveInformation = false;
3550 Command->V1.CommandMailbox.Type3.CommandOpcode =
3551 DAC960_V1_GetLogicalDriveInformation;
3552 Command->V1.CommandMailbox.Type3.BusAddress =
3553 Virtual_to_Bus(&Controller->V1.NewLogicalDriveInformation);
3554 DAC960_QueueCommand(Command);
3555 return;
3556 }
3557 if (Controller->V1.NeedRebuildProgress)
3558 {
3559 Controller->V1.NeedRebuildProgress = false;
3560 Command->V1.CommandMailbox.Type3.CommandOpcode =
3561 DAC960_V1_GetRebuildProgress;
3562 Command->V1.CommandMailbox.Type3.BusAddress =
3563 Virtual_to_Bus(&Controller->V1.RebuildProgress);
3564 DAC960_QueueCommand(Command);
3565 return;
3566 }
3567 if (Controller->V1.NeedConsistencyCheckProgress)
3568 {
3569 Controller->V1.NeedConsistencyCheckProgress = false;
3570 Command->V1.CommandMailbox.Type3.CommandOpcode =
3571 DAC960_V1_RebuildStat;
3572 Command->V1.CommandMailbox.Type3.BusAddress =
3573 Virtual_to_Bus(&Controller->V1.RebuildProgress);
3574 DAC960_QueueCommand(Command);
3575 return;
3576 }
3577 Controller->MonitoringTimerCount++;
3578 Controller->MonitoringTimer.expires =
3579 jiffies + DAC960_MonitoringTimerInterval;
3580 add_timer(&Controller->MonitoringTimer);
3581 }
3582 if (CommandType == DAC960_ImmediateCommand)
3583 {
3584 up(Command->Semaphore);
3585 Command->Semaphore = NULL;
3586 return;
3587 }
3588 if (CommandType == DAC960_QueuedCommand)
3589 {
3590 DAC960_V1_KernelCommand_T *KernelCommand = Command->V1.KernelCommand;
3591 KernelCommand->CommandStatus = Command->V1.CommandStatus;
3592 Command->V1.KernelCommand = NULL;
3593 if (CommandOpcode == DAC960_V1_DCDB)
3594 Controller->V1.DirectCommandActive[KernelCommand->DCDB->Channel]
3595 [KernelCommand->DCDB->TargetID] =
3596 false;
3597 DAC960_DeallocateCommand(Command);
3598 KernelCommand->CompletionFunction(KernelCommand);
3599 return;
3600 }
3601 /*
3602 Queue a Status Monitoring Command to the Controller using the just
3603 completed Command if one was deferred previously due to lack of a
3604 free Command when the Monitoring Timer Function was called.
3605 */
3606 if (Controller->MonitoringCommandDeferred)
3607 {
3608 Controller->MonitoringCommandDeferred = false;
3609 DAC960_V1_QueueMonitoringCommand(Command);
3610 return;
3611 }
3612 /*
3613 Deallocate the Command.
3614 */
3615 DAC960_DeallocateCommand(Command);
3616 /*
3617 Wake up any processes waiting on a free Command.
3618 */
3619 wake_up(&Controller->CommandWaitQueue);
3620 }
3621
3622
3623 /*
3624 DAC960_V2_ReadWriteError prints an appropriate error message for Command
3625 when an error occurs on a Read or Write operation.
3626 */
3627
3628 static void DAC960_V2_ReadWriteError(DAC960_Command_T *Command)
3629 {
3630 DAC960_Controller_T *Controller = Command->Controller;
3631 unsigned char *SenseErrors[] = { "NO SENSE", "RECOVERED ERROR",
3632 "NOT READY", "MEDIUM ERROR",
3633 "HARDWARE ERROR", "ILLEGAL REQUEST",
3634 "UNIT ATTENTION", "DATA PROTECT",
3635 "BLANK CHECK", "VENDOR-SPECIFIC",
3636 "COPY ABORTED", "ABORTED COMMAND",
3637 "EQUAL", "VOLUME OVERFLOW",
3638 "MISCOMPARE", "RESERVED" };
3639 unsigned char *CommandName = "UNKNOWN";
3640 switch (Command->CommandType)
3641 {
3642 case DAC960_ReadCommand:
3643 case DAC960_ReadRetryCommand:
3644 CommandName = "READ";
3645 break;
3646 case DAC960_WriteCommand:
3647 case DAC960_WriteRetryCommand:
3648 CommandName = "WRITE";
3649 break;
3650 case DAC960_MonitoringCommand:
3651 case DAC960_ImmediateCommand:
3652 case DAC960_QueuedCommand:
3653 break;
3654 }
3655 DAC960_Error("Error Condition %s on %s:\n", Controller,
3656 SenseErrors[Command->V2.RequestSense.SenseKey], CommandName);
3657 DAC960_Error(" /dev/rd/c%dd%d: absolute blocks %d..%d\n",
3658 Controller, Controller->ControllerNumber,
3659 Command->LogicalDriveNumber, Command->BlockNumber,
3660 Command->BlockNumber + Command->BlockCount - 1);
3661 if (DAC960_PartitionNumber(Command->BufferHeader->b_rdev) > 0)
3662 DAC960_Error(" /dev/rd/c%dd%dp%d: relative blocks %d..%d\n",
3663 Controller, Controller->ControllerNumber,
3664 Command->LogicalDriveNumber,
3665 DAC960_PartitionNumber(Command->BufferHeader->b_rdev),
3666 Command->BufferHeader->b_rsector,
3667 Command->BufferHeader->b_rsector + Command->BlockCount - 1);
3668 }
3669
3670
3671 /*
3672 DAC960_V2_ReportEvent prints an appropriate message when a Controller Event
3673 occurs.
3674 */
3675
3676 static void DAC960_V2_ReportEvent(DAC960_Controller_T *Controller,
3677 DAC960_V2_Event_T *Event)
3678 {
3679 DAC960_SCSI_RequestSense_T *RequestSense =
3680 (DAC960_SCSI_RequestSense_T *) &Event->RequestSenseData;
3681 unsigned char MessageBuffer[DAC960_LineBufferSize];
3682 static struct { int EventCode; unsigned char *EventMessage; } EventList[] =
3683 { /* Physical Device Events (0x0000 - 0x007F) */
3684 { 0x0001, "P Online" },
3685 { 0x0002, "P Standby" },
3686 { 0x0005, "P Automatic Rebuild Started" },
3687 { 0x0006, "P Manual Rebuild Started" },
3688 { 0x0007, "P Rebuild Completed" },
3689 { 0x0008, "P Rebuild Cancelled" },
3690 { 0x0009, "P Rebuild Failed for Unknown Reasons" },
3691 { 0x000A, "P Rebuild Failed due to New Physical Device" },
3692 { 0x000B, "P Rebuild Failed due to Logical Drive Failure" },
3693 { 0x000C, "S Offline" },
3694 { 0x000D, "P Found" },
3695 { 0x000E, "P Gone" },
3696 { 0x000F, "P Unconfigured" },
3697 { 0x0010, "P Expand Capacity Started" },
3698 { 0x0011, "P Expand Capacity Completed" },
3699 { 0x0012, "P Expand Capacity Failed" },
3700 { 0x0016, "P Parity Error" },
3701 { 0x0017, "P Soft Error" },
3702 { 0x0018, "P Miscellaneous Error" },
3703 { 0x0019, "P Reset" },
3704 { 0x001A, "P Active Spare Found" },
3705 { 0x001B, "P Warm Spare Found" },
3706 { 0x001C, "S Sense Data Received" },
3707 { 0x001D, "P Initialization Started" },
3708 { 0x001E, "P Initialization Completed" },
3709 { 0x001F, "P Initialization Failed" },
3710 { 0x0020, "P Initialization Cancelled" },
3711 { 0x0021, "P Failed because Write Recovery Failed" },
3712 { 0x0022, "P Failed because SCSI Bus Reset Failed" },
3713 { 0x0023, "P Failed because of Double Check Condition" },
3714 { 0x0024, "P Failed because Device Cannot Be Accessed" },
3715 { 0x0025, "P Failed because of Gross Error on SCSI Processor" },
3716 { 0x0026, "P Failed because of Bad Tag from Device" },
3717 { 0x0027, "P Failed because of Command Timeout" },
3718 { 0x0028, "P Failed because of System Reset" },
3719 { 0x0029, "P Failed because of Busy Status or Parity Error" },
3720 { 0x002A, "P Failed because Host Set Device to Failed State" },
3721 { 0x002B, "P Failed because of Selection Timeout" },
3722 { 0x002C, "P Failed because of SCSI Bus Phase Error" },
3723 { 0x002D, "P Failed because Device Returned Unknown Status" },
3724 { 0x002E, "P Failed because Device Not Ready" },
3725 { 0x002F, "P Failed because Device Not Found at Startup" },
3726 { 0x0030, "P Failed because COD Write Operation Failed" },
3727 { 0x0031, "P Failed because BDT Write Operation Failed" },
3728 { 0x0039, "P Missing at Startup" },
3729 { 0x003A, "P Start Rebuild Failed due to Physical Drive Too Small" },
3730 /* Logical Device Events (0x0080 - 0x00FF) */
3731 { 0x0080, "M Consistency Check Started" },
3732 { 0x0081, "M Consistency Check Completed" },
3733 { 0x0082, "M Consistency Check Cancelled" },
3734 { 0x0083, "M Consistency Check Completed With Errors" },
3735 { 0x0084, "M Consistency Check Failed due to Logical Drive Failure" },
3736 { 0x0085, "M Consistency Check Failed due to Physical Device Failure" },
3737 { 0x0086, "L Offline" },
3738 { 0x0087, "L Critical" },
3739 { 0x0088, "L Online" },
3740 { 0x0089, "M Automatic Rebuild Started" },
3741 { 0x008A, "M Manual Rebuild Started" },
3742 { 0x008B, "M Rebuild Completed" },
3743 { 0x008C, "M Rebuild Cancelled" },
3744 { 0x008D, "M Rebuild Failed for Unknown Reasons" },
3745 { 0x008E, "M Rebuild Failed due to New Physical Device" },
3746 { 0x008F, "M Rebuild Failed due to Logical Drive Failure" },
3747 { 0x0090, "M Initialization Started" },
3748 { 0x0091, "M Initialization Completed" },
3749 { 0x0092, "M Initialization Cancelled" },
3750 { 0x0093, "M Initialization Failed" },
3751 { 0x0094, "L Found" },
3752 { 0x0095, "L Gone" },
3753 { 0x0096, "M Expand Capacity Started" },
3754 { 0x0097, "M Expand Capacity Completed" },
3755 { 0x0098, "M Expand Capacity Failed" },
3756 { 0x0099, "L Bad Block Found" },
3757 { 0x009A, "L Size Changed" },
3758 { 0x009B, "L Type Changed" },
3759 { 0x009C, "L Bad Data Block Found" },
3760 { 0x009E, "L Read of Data Block in BDT" },
3761 { 0x009F, "L Write Back Data for Disk Block Lost" },
3762 /* Fault Management Events (0x0100 - 0x017F) */
3763 { 0x0140, "E Fan %d Failed" },
3764 { 0x0141, "E Fan %d OK" },
3765 { 0x0142, "E Fan %d Not Present" },
3766 { 0x0143, "E Power Supply %d Failed" },
3767 { 0x0144, "E Power Supply %d OK" },
3768 { 0x0145, "E Power Supply %d Not Present" },
3769 { 0x0146, "E Temperature Sensor %d Failed" },
3770 { 0x0147, "E Temperature Sensor %d Critical" },
3771 { 0x0148, "E Temperature Sensor %d OK" },
3772 { 0x0149, "E Temperature Sensor %d Not Present" },
3773 { 0x014A, "E Unit %d Access Critical" },
3774 { 0x014B, "E Unit %d Access OK" },
3775 { 0x014C, "E Unit %d Access Offline" },
3776 /* Controller Events (0x0180 - 0x01FF) */
3777 { 0x0181, "C Cache Write Back Error" },
3778 { 0x0188, "C Battery Backup Unit Found" },
3779 { 0x0189, "C Battery Backup Unit Charge Level Low" },
3780 { 0x018A, "C Battery Backup Unit Charge Level OK" },
3781 { 0x0193, "C Installation Aborted" },
3782 { 0x0195, "C Mirror Race Recovery In Progress" },
3783 { 0x0196, "C Mirror Race on Critical Drive" },
3784 { 0x019E, "C Memory Soft ECC Error" },
3785 { 0x019F, "C Memory Hard ECC Error" },
3786 { 0x01A2, "C Battery Backup Unit Failed" },
3787 { 0, "" } };
3788 int EventListIndex = 0, EventCode;
3789 unsigned char EventType, *EventMessage;
3790 if (Event->EventCode == 0x1C &&
3791 RequestSense->SenseKey == DAC960_SenseKey_VendorSpecific &&
3792 (RequestSense->AdditionalSenseCode == 0x80 ||
3793 RequestSense->AdditionalSenseCode == 0x81))
3794 Event->EventCode = ((RequestSense->AdditionalSenseCode - 0x80) << 8) |
3795 RequestSense->AdditionalSenseCodeQualifier;
3796 while (true)
3797 {
3798 EventCode = EventList[EventListIndex].EventCode;
3799 if (EventCode == Event->EventCode || EventCode == 0) break;
3800 EventListIndex++;
3801 }
3802 EventType = EventList[EventListIndex].EventMessage[0];
3803 EventMessage = &EventList[EventListIndex].EventMessage[2];
3804 if (EventCode == 0)
3805 {
3806 DAC960_Critical("Unknown Controller Event Code %04X\n",
3807 Controller, Event->EventCode);
3808 return;
3809 }
3810 switch (EventType)
3811 {
3812 case 'P':
3813 DAC960_Critical("Physical Device %d:%d %s\n", Controller,
3814 Event->Channel, Event->TargetID, EventMessage);
3815 break;
3816 case 'L':
3817 DAC960_Critical("Logical Drive %d (/dev/rd/c%dd%d) %s\n", Controller,
3818 Event->LogicalUnit, Controller->ControllerNumber,
3819 Event->LogicalUnit, EventMessage);
3820 break;
3821 case 'M':
3822 DAC960_Progress("Logical Drive %d (/dev/rd/c%dd%d) %s\n", Controller,
3823 Event->LogicalUnit, Controller->ControllerNumber,
3824 Event->LogicalUnit, EventMessage);
3825 break;
3826 case 'S':
3827 if (RequestSense->SenseKey == DAC960_SenseKey_NoSense ||
3828 (RequestSense->SenseKey == DAC960_SenseKey_NotReady &&
3829 RequestSense->AdditionalSenseCode == 0x04 &&
3830 (RequestSense->AdditionalSenseCodeQualifier == 0x01 ||
3831 RequestSense->AdditionalSenseCodeQualifier == 0x02)))
3832 break;
3833 DAC960_Critical("Physical Device %d:%d %s\n", Controller,
3834 Event->Channel, Event->TargetID, EventMessage);
3835 DAC960_Critical("Physical Device %d:%d Request Sense: "
3836 "Sense Key = %d, ASC = %02X, ASCQ = %02X\n",
3837 Controller,
3838 Event->Channel,
3839 Event->TargetID,
3840 RequestSense->SenseKey,
3841 RequestSense->AdditionalSenseCode,
3842 RequestSense->AdditionalSenseCodeQualifier);
3843 DAC960_Critical("Physical Device %d:%d Request Sense: "
3844 "Information = %02X%02X%02X%02X "
3845 "%02X%02X%02X%02X\n",
3846 Controller,
3847 Event->Channel,
3848 Event->TargetID,
3849 RequestSense->Information[0],
3850 RequestSense->Information[1],
3851 RequestSense->Information[2],
3852 RequestSense->Information[3],
3853 RequestSense->CommandSpecificInformation[0],
3854 RequestSense->CommandSpecificInformation[1],
3855 RequestSense->CommandSpecificInformation[2],
3856 RequestSense->CommandSpecificInformation[3]);
3857 break;
3858 case 'E':
3859 if (Controller->SuppressEnclosureMessages) break;
3860 sprintf(MessageBuffer, EventMessage, Event->LogicalUnit);
3861 DAC960_Critical("Enclosure %d %s\n", Controller,
3862 Event->TargetID, MessageBuffer);
3863 break;
3864 case 'C':
3865 DAC960_Critical("Controller %s\n", Controller, EventMessage);
3866 break;
3867 default:
3868 DAC960_Critical("Unknown Controller Event Code %04X\n",
3869 Controller, Event->EventCode);
3870 break;
3871 }
3872 }
3873
3874
3875 /*
3876 DAC960_V2_ReportProgress prints an appropriate progress message for
3877 Logical Device Long Operations.
3878 */
3879
3880 static void DAC960_V2_ReportProgress(DAC960_Controller_T *Controller,
3881 unsigned char *MessageString,
3882 unsigned int LogicalDeviceNumber,
3883 unsigned long BlocksCompleted,
3884 unsigned long LogicalDeviceSize)
3885 {
3886 Controller->EphemeralProgressMessage = true;
3887 DAC960_Progress("%s in Progress: Logical Drive %d (/dev/rd/c%dd%d) "
3888 "%d%% completed\n", Controller,
3889 MessageString,
3890 LogicalDeviceNumber,
3891 Controller->ControllerNumber,
3892 LogicalDeviceNumber,
3893 (100 * (BlocksCompleted >> 7)) / (LogicalDeviceSize >> 7));
3894 Controller->EphemeralProgressMessage = false;
3895 }
3896
3897
3898 /*
3899 DAC960_V2_ProcessCompletedCommand performs completion processing for Command
3900 for DAC960 V2 Firmware Controllers.
3901 */
3902
3903 static void DAC960_V2_ProcessCompletedCommand(DAC960_Command_T *Command)
3904 {
3905 DAC960_Controller_T *Controller = Command->Controller;
3906 DAC960_CommandType_T CommandType = Command->CommandType;
3907 DAC960_V2_CommandMailbox_T *CommandMailbox = &Command->V2.CommandMailbox;
3908 DAC960_V2_IOCTL_Opcode_T CommandOpcode = CommandMailbox->Common.IOCTL_Opcode;
3909 DAC960_V2_CommandStatus_T CommandStatus = Command->V2.CommandStatus;
3910 BufferHeader_T *BufferHeader = Command->BufferHeader;
3911 if (CommandType == DAC960_ReadCommand ||
3912 CommandType == DAC960_WriteCommand)
3913 {
3914 if (CommandStatus == DAC960_V2_NormalCompletion)
3915 {
3916 /*
3917 Perform completion processing for all buffers in this I/O Request.
3918 */
3919 while (BufferHeader != NULL)
3920 {
3921 BufferHeader_T *NextBufferHeader = BufferHeader->b_reqnext;
3922 BufferHeader->b_reqnext = NULL;
3923 DAC960_ProcessCompletedBuffer(BufferHeader, true);
3924 BufferHeader = NextBufferHeader;
3925 }
3926 /*
3927 Wake up requestor for swap file paging requests.
3928 */
3929 if (Command->Semaphore != NULL)
3930 {
3931 up(Command->Semaphore);
3932 Command->Semaphore = NULL;
3933 }
3934 add_blkdev_randomness(DAC960_MAJOR + Controller->ControllerNumber);
3935 }
3936 else if (Command->V2.RequestSense.SenseKey
3937 == DAC960_SenseKey_MediumError &&
3938 BufferHeader != NULL &&
3939 BufferHeader->b_reqnext != NULL)
3940 {
3941 if (CommandType == DAC960_ReadCommand)
3942 Command->CommandType = DAC960_ReadRetryCommand;
3943 else Command->CommandType = DAC960_WriteRetryCommand;
3944 Command->BlockCount = BufferHeader->b_size >> DAC960_BlockSizeBits;
3945 CommandMailbox->SCSI_10.CommandControlBits
3946 .AdditionalScatterGatherListMemory = false;
3947 CommandMailbox->SCSI_10.DataTransferSize =
3948 Command->BlockCount << DAC960_BlockSizeBits;
3949 CommandMailbox->SCSI_10.DataTransferMemoryAddress
3950 .ScatterGatherSegments[0].SegmentDataPointer =
3951 Virtual_to_Bus(BufferHeader->b_data);
3952 CommandMailbox->SCSI_10.DataTransferMemoryAddress
3953 .ScatterGatherSegments[0].SegmentByteCount =
3954 CommandMailbox->SCSI_10.DataTransferSize;
3955 CommandMailbox->SCSI_10.SCSI_CDB[7] = Command->BlockCount >> 8;
3956 CommandMailbox->SCSI_10.SCSI_CDB[8] = Command->BlockCount;
3957 DAC960_QueueCommand(Command);
3958 return;
3959 }
3960 else
3961 {
3962 if (Command->V2.RequestSense.SenseKey != DAC960_SenseKey_NotReady)
3963 DAC960_V2_ReadWriteError(Command);
3964 /*
3965 Perform completion processing for all buffers in this I/O Request.
3966 */
3967 while (BufferHeader != NULL)
3968 {
3969 BufferHeader_T *NextBufferHeader = BufferHeader->b_reqnext;
3970 BufferHeader->b_reqnext = NULL;
3971 DAC960_ProcessCompletedBuffer(BufferHeader, false);
3972 BufferHeader = NextBufferHeader;
3973 }
3974 /*
3975 Wake up requestor for swap file paging requests.
3976 */
3977 if (Command->Semaphore != NULL)
3978 {
3979 up(Command->Semaphore);
3980 Command->Semaphore = NULL;
3981 }
3982 }
3983 }
3984 else if (CommandType == DAC960_ReadRetryCommand ||
3985 CommandType == DAC960_WriteRetryCommand)
3986 {
3987 BufferHeader_T *NextBufferHeader = BufferHeader->b_reqnext;
3988 BufferHeader->b_reqnext = NULL;
3989 /*